Chapter 1 Register Transfer and Microoperations PDF
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KHALED HUSSEIN
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This document provides an overview of register transfer and microoperations, key concepts in computer organization and architecture. It explains the fundamentals of digital systems.
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Register Transfer & -operations 1 Chapter (1) Register Transfer and Microoperations By: Prof. KHALED HUSSEIN William Stallings, “Computer Organization and Architecture”, 6th Edition Computer Organizatio...
Register Transfer & -operations 1 Chapter (1) Register Transfer and Microoperations By: Prof. KHALED HUSSEIN William Stallings, “Computer Organization and Architecture”, 6th Edition Computer Organization Computer Architectures Lab Chapter Register Contents Transfer & -operations 2 1) WHAT IS COMPUTER ORGANIZATION? 2) BUS STRUCTURE 3) SIMPLE DIGITAL SYSTEMS 4) Microoperations Von Neumann architecture Inside the System Unit How the CPU Works (Inside the CPU) Registers in CPU Basic Computer Instructions Complete Computer Description (Microoperations) 5) ORGANIZATION OF A DIGITAL SYSTEM 6) REGISTER TRANSFER LANGUAGE 7) DESIGNATION OF REGISTERS 8) REGISTER TRANSFER CONTROL FUNCTIONS HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS SIMULTANEOUS OPERATIONS BASIC SYMBOLS FOR REGISTER TRANSFERS 9) CONNECTING REGISTRS 10) BUS AND BUS TRANSFER 1) From a source Register to bus: BUS R 2) From a BUS to a destination Register : RBUS 11) MEMORY (RAM) (Random Access Memory) MEMORY TRANSFER 1) MEMORY READ 2) MEMORY WRITE 12) Types of MICROOPERATIONS (-operations) ARITHMETIC -operations Computer Organization LOGIC -operations -operations Register Transfer Computer Architectures Lab Register Transfer & -operations 3 1) WHAT IS COMPUTER ORGANIZATION ? The purpose of Computer Organization and Computer Architecture is to prepare clear and complete understanding of the nature and characteristics of modern-day computer systems. Electronic Desired Devices Behavior a very wide semantic gap between the intended behavior and the workings of the underlying electronic devices that will actually do all the work. The forerunners to modern computers attempted to assemble the raw devices (mechanical, or electrical) into a separate purpose-built machine for each desired behavior. Computer Organization Computer Architectures Lab Register Transfer & -operations 4 1) WHAT IS COMPUTER ORGANIZATION ? It describes the functions and design of various units of digital computer that store and process information. It also deals with units of computer that receive information from external sources and send computed results to external destinations. Computer Organization Basic Computer Organization ALU Subsystem Memory Control unit CPU I/O I/O Device Device Computer Organization Computer Architectures Lab Register Transfer & -operations 5 1) WHAT IS COMPUTER ORGANIZATION ? Related Courses Computer Organization Computer Architectures Lab Register Transfer & -operations 6 2) Bus Structure A BUS is basically a subsystem which transfers data between the Computer components either within a computer or between two computers. It connects peripheral devices at the same time. Buffer Registers hold the data during the data transfer temporarily. Ex: printing. Computer Organization Computer Architectures Lab Register Transfer & -operations 7 3) SIMPLE DIGITAL SYSTEMS Combinational and sequential circuits (learned in Digital Logic Design) can be used to create simple Digital Systems (Computers). These are the low-level building blocks of a digital computer. A Digital System (Computer) is an interconnection of digital hardware modules that accomplish a specific information processing task. Generally, the sequential circuit is specify by means of state table. But, in large digital system, the state table will be very large. So, the system may be designed by modular approach. i.e. it’s partitioned into sub-systems. Each sub-system perform a different functional task. (Examples of such modules are Decoder, Counter, Arithmetic Logic Unit,……) Computer Organization Computer Architectures Lab Register Transfer & -operations 8 4) Microoperations Digital modules are best defined (or frequently characterized ) in terms of: – The Registers they contain, and – The Operations that they perform. Typically, – What operations are performed on the data in the Registers – What information is passed between Registers The operations executed on data stored in Registers are called Microoperations. A Microoperation is an elementary operation performed on the information stored in one or more Registers. This operation can be performed in parallel during one clock pulse period. The result of operation may replace the previous binary information of a Register or may be transferred to another Register. Examples of Microoperation are Shift, Count, Load, Add, Subtract, Increment, Decrement, and Clear 88888 Computer Organization Computer Architectures Lab Register Transfer & -operations 9 4) Microoperations Von Neumann Architecture Computer Organization Computer Architectures Lab Register Transfer & -operations 10 4) Microoperations Inside the System Unit (Computer) Computer Organization Computer Architectures Lab Register Transfer & -operations 11 4) Microoperations Inside the System Unit (Computer) Computer Organization Computer Architectures Lab Register Transfer & -operations 12 4) Microoperations Inside the System Unit (Computer) CPU Memory (RAM) Computer Organization Computer Architectures Lab Register Transfer & -operations 13 4) Microoperations Basic Computer Instructions Hex Code Symbol I=0 I=1 Description AND 0xxx 8xxx AND memory word to AC ADD 1xxx 9xxx Add memory word to AC LDA 2xxx Axxx Load AC from memory STA 3xxx Bxxx Store content of AC into memory BUN 4xxx Cxxx Branch unconditionally BSA 5xxx Dxxx Branch and save return address ISZ 6xxx Exxx Increment and skip if zero CLA 7800 Clear AC Assume we have a CLE 7400 Clear E CMA 7200 Complement AC simple Digital CME CIR 7100 7080 Complement E Circulate right AC and E System (Computer) CIL INC 7040 7020 Circulate left AC and E Increment AC have 25 Instruction SPA 7010 Skip next instr. if AC is positive SNA 7008 Skip next instr. if AC is negative Sets SZA 7004 Skip next instr. if AC is zero SZE 7002 Skip next instr. if E is zero HLT 7001 Halt computer To execute each INP F800 Input character to AC Instruction Set, a OUT F400 Output character from AC number of SKI F200 Skip on input flag SKO ION F100 F080 Skip on output flag Interrupt on Microoperations is IOF F040 Interrupt off required Computer Organization Computer Architectures Lab Register Transfer & -operations 14 4) Microoperations How the CPU Works ( Inside the CPU ) How the CPU have this organization can deals with group of Instruction Sets Program Computer Organization Computer Architectures Lab Register Transfer & -operations 15 4) Microoperations Registers in CPU Computer Organization Computer Architectures Lab Register Transfer & -operations 16 4) Microoperations An elementary operation performed on the information stored in one or more Registers (during one clock pulse) Registers ALU 1 clock cycle (R) (f) R f(R, R) f: Shift, Load , Clear , Increment , Add , Subtract , Complement Computer Organization Computer Architectures Lab Register Transfer & -operations 17 4) Microoperations Complete Computer Description (Microoperations) RT0: AR PC Fetch Cycle RT1: IR M[AR], PC PC + 1 (2- Clock Cycles) Fetch RT2: D0,..., D7 Decode IR(12 ~ 14), Decode Decode Cycle AR IR(0 ~ 11), I IR(15) (1- Clock Cycle) Indirect Interrupt D7IT3: AR M[AR] T0T1T2(IEN)(FGI + FGO): R 1 RT0: AR 0, TR PC Memory- RT1: M[AR] TR, PC 0 Reference RT2: PC PC + 1, IEN 0, R 0, SC 0 D0T4: DR M[AR] (2- Clock Cycles) AND D0T5: AC AC DR, SC 0 D1T4: DR M[AR] (2- Clock Cycles) ADD D1T5: AC AC + DR, E Cout, SC 0 Execute Cycle D2T4: DR M[AR] (2- Clock Cycles) Differ from one LDA D2T5: AC DR, SC 0 instruction to (1- Clock Cycles) another one STA D3T4: M[AR] AC, SC 0 Fetch Cycle Decode Cycle Requests Instruction or Data from RAM or Translates Instruction or Data to a form can Cache the Control unit understand Computer Organization Computer Architectures Lab Register Transfer & -operations 18 5) ORGANIZATION OF A DIGITAL SYSTEM Definition of the (internal) organization of a computer 1 - Setof Registers and their functions 2 - Microoperations set Set of allowable microoperations provided by the organization of the computer 3 -Control signals that initiate the sequence of microoperations (to perform the functions) Viewing a computer, or any digital system, in this way is called the Register Transfer Language. This is because we’re focusing on: The system’s Registers The data transformations in them, and The data transfers between them. Computer Organization Computer Architectures Lab Register Transfer & -operations 19 6) REGISTER TRANSFER LANGUAGE Rather than specifying a digital system in words, a specific notation is used, Register Transfer Language For any function of the computer, the Register Transfer Language can be used to describe the sequence of microoperations Register Transfer Language – A symbolic language – A convenient tool for describing the internal organization of digital computers – Can also be used to facilitate the design process of digital systems. Computer Organization Computer Architectures Lab Register Transfer & -operations 20 6) REGISTER TRANSFER LANGUAGE Registers are designated by capital letters, sometimes followed by numbers (e.g., A, R13, IR) Often the names indicate function: – MAR - MEMORY ADDRESS REGISTER – PC - Program Counter – IR - Instruction Register Registers and their contents can be viewed and represented in various ways: – A Register can be viewed as a single entity: – Registers may also be represented showing the bits of data they contain MAR Computer Organization Computer Architectures Lab Register Transfer & -operations 21 7) DESIGNATION OF REGISTERS Designation of a Register - a Register - portion of a Register - a bit of a Register Common ways of drawing the block diagram of a Register Register Showing individual bits R1 7 6 5 4 3 2 1 0 15 0 15 8 7 0 R2 PC(H) PC(L) Numbering of bits Subfields Computer Organization Computer Architectures Lab Register Transfer & -operations 22 8) REGISTER TRANSFER Copying the contents of one Register to another is a Register Transfer A Register Transfer is indicated as R2 R1 In this case the contents of Register R1 are copied (loaded) into Register R2 A simultaneous transfer of all bits from the source R1 to the destination register R2, during one clock pulse Note that this is a non-destructive; i.e. the contents of R1 are not altered by copying (loading) them to R2 Computer Organization Computer Architectures Lab Register Transfer & -operations 23 8) REGISTER TRANSFER A Register transfer such as R3 R5 Implies that the digital system has: The data lines from the source Register (R5) to the destination Register (R3) Parallel load in the destination Register (R3) r Control lines to perform the action Block diagram Control Circuit P Load R3 = Clock Control Circuit P Load R3 Clock n R5 R5 Computer Organization Computer Architectures Lab Register Transfer & -operations 24 8) REGISTER TRANSFER CONTROL FUNCTIONS Often actions need to only occur if a certain condition is true This is similar to an “if” statement in a programming language In digital systems, this is often done via a control signal, called a control function – If the signal is 1, the action takes place This is represented as: P: R2 R1 Which means “if P = 1, then load the contents of Register R1 into Register R2”, i.e., if (P = 1) then (R2 R1) Computer Organization Computer Architectures Lab Register Transfer & -operations 25 8) REGISTER TRANSFER HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS P: R2 R1 Block diagram Control P Load R2 Circuit Clock n R1 Timing diagram t t+1 Clock Load Transfer occurs here The same clock controls the circuits that generate the control function and the destination Register Registers are assumed to use positive-edge-triggered flip-flops Computer Organization Computer Architectures Lab Register Transfer & -operations 26 8) REGISTER TRANSFER SIMULTANEOUS OPERATIONS If two or more operations are to occur simultaneously, they are separated with commas P: R3 R5 MAR IR , Here, if the control function P = 1, load the contents of R5 into R3, and at the same time (clock), load the contents of Register IR into Register MAR Computer Organization Computer Architectures Lab Register Transfer & -operations 27 8) REGISTER TRANSFER BASIC SYMBOLS FOR REGISTER TRANSFERS Symbols Description Examples Capital letters Denotes a register MAR, R2 Subscript Denotes bit of the register R2 , R112 Parentheses () Denotes a part of a register R2(0-7), R2(L) Arrow Denotes transfer of information R2 R1 Colon: Denotes termination of control function P: Comma , Separates two micro-operations A B , B A Square bracket [] Specifies an address of memory location Computer Organization Computer Architectures Lab Register Transfer & -operations 28 9) CONNECTING REGISTRS In a digital system with many Registers, it is impractical to have data and control lines to directly allow each register to be loaded with the contents of every possible other registers To completely connect n Registers n(n-1) lines O(n2) cost – This is not a realistic approach to use in a large digital system Instead, take a different approach Have one centralized set of circuits for data transfer – the BUS Have control circuits to select which register is the source, and which is the destination R4 R1 n registers n(n-1) lines 5 registers 5(5-1) lines R3 5 registers 5(4) lines 5 registers 20 lines O(n2 - n) O(n2) R5 R2 Computer Organization Computer Architectures Lab Register Transfer & -operations 29 10) BUS AND BUS TRANSFER In digital systems, there are many Registers, the information is transferred from one Register to another through a path called BUS The number of lines in the BUS = the number of bits in the Register 1) From a source Register to bus: BUS R Register A Register B Register C Register D Bus lines Register A Register B Register C Register D Source registers 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 A1 B1 C1 D 1 A2 B2 C2 D 2 A3 B3 C3 D 3 A4 B4 C4 D 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 34 4 x1 MUX 4 x1 MUX 4 x1 MUX 4 x1 MUX select yx 4-line bus 4 A common bus system for data transfer between Registers can be constructed with There are (n) 4-to-1 multiplexers (to select one source Register) multiplexers, one for for the BUS. Computer Organization each bit of the Computer Registers. Architectures Lab Register Transfer & -operations 30 10) BUS AND BUS TRANSFER 2) From a BUS to a destination Register : RBUS 4-line bus 4 4 4 4 Load 4 Load Load Load Destination Reg. R0 Reg. R1 Reg. R2 Reg. R3 Registers D0 D1 D2 D3 2x4 E (enable) Select X Y Decoder A Decoder is used to select one destination Register for a data BUS. Computer Organization Computer Architectures Lab Register Transfer & -operations 31 10) BUS AND BUS TRANSFER Depending on whether the bus is to be mentioned explicitly or not, Register transfer can be indicated as either R2 R1 or BUS R1 R2 BUS, In the former case the bus is implicit. Computer Organization Computer Architectures Lab Register Transfer & -operations 32 11) MEMORY (RAM) (Random Access Memory) Memory (RAM) can be thought as a Sequential Circuits containing some number of Registers These Registers hold the words of memory. Each of the Registers is indicated by an address These addresses range from 0 to r-1 Each Register (word) can hold n bits of data Assume the RAM contains r = 2k words. It needs the following data input lines – n data input lines – n data output lines n address lines – k address lines k RAM Read – A Read control line unit Write –A Write control line n data output lines Computer Organization Computer Architectures Lab Register Transfer & -operations 33 11) MEMORY (RAM) (Random Access Memory) Byte is 8 bits. Word is 2 bytes (16 bits). Double word is 4 bytes (32 bits). Quad word is 8 bytes (64 bits). Computer Organization Computer Architectures Lab Register Transfer & -operations 34 11) MEMORY (RAM) (Random Access Memory) MEMORY TRANSFER Collectively, the memory is viewed at the Register Level as a device, M. Since it contains multiple locations, we must specify which address in memory we will be using. This is done by indexing memory references. Memory is usually accessed in computer systems by putting the desired address in a special Register, the Memory Address Register (MAR, or AR) When memory is accessed, the contents of the MAR get sent to the memory unit’s address lines M AR Memory Read Or address lines unit Write MAR Data out Data in Computer Organization Computer Architectures Lab Register Transfer & -operations 35 11) MEMORY (RAM) (Random Access Memory) MEMORY TRANSFER 1) MEMORY READ To READ a value from a location in memory M and load it into a Register, the Register Transfer Language notation looks like this: R1 M[MAR] This causes the following to occur: – The contents of the MAR get sent to the memory address lines (ADRESS BUS ) – A Read (= 1) gets sent to the memory unit – The contents of the specified address are put on the memory’s output data lines – These get sent over the DATA BUS to be loaded into Register R1 8-lines Read =1 CPU Control Signal address 0 M. bus 1 12-lines IR 2 DATA 3 MAR 14. BUS 8. 12 8. R1 FEE 14 FEE... 12 255 Computer Organization Computer Architectures Lab Register Transfer & -operations 36 11) MEMORY (RAM) (Random Access Memory) MEMORY TRANSFER 2) MEMORY Write To write a value from a register to a location in memory looks like this in Register Transfer Language: M[MAR] R1 This causes the following to occur: – The contents of the MAR get sent to the memory address lines. – A Write (= 1) gets sent to the memory unit. – The values in Register R1 get sent over the data bus to the data input lines of the memory – The values get loaded into the specified address in the memory Control 8-lines Write =1 CPU Signal 12-lines data address M bus bus 0. IR 1 2 3 MAR 14. 8. 12. R1 FEE 12 8 14 FEE... 255 Computer Organization Computer Architectures Lab Register Transfer & -operations 37 SUMMARY OF Register Transfer -operations Symbols Description AB Transfer content of Reg.(B) into Reg.(A) AR DR(AD) Transfer content of AD portion of Reg.(DR) into Reg. (AR) ABUS R1, Transfer content of R1 into bus A and, at the same time, R2 ABUS transfer content of bus A into R2 AR Address Register DR Data Register M[R] Memory word specified by Reg. (R) M Equivalent to M[MAR] DR M Memory read operation: transfers content of memory word specified by AR into DR M DR Memory write operation: transfers content of DR into memory word specified by AR Computer Organization Computer Architectures Lab Register Transfer & -operations 38 12) Types of Microoperations (-operation ) Computer system Microoperations -operation are of three types: 1) Register Transfer Microoperations √ 2) Arithmetic Microoperations 3) Logic Microoperations Computer Organization Computer Architectures Lab Register Transfer & -operations 39 12) Types of Microoperations (-operations) ARITHMETIC -operations The basic arithmetic Microoperations are: 1) Addition 2) Subtraction 3) Complement 4) Increment 5) Decrement The additional arithmetic Microoperations are Add with carry Subtract with borrow Transfer/Load etc. … Summary of Typical Arithmetic Microoperations R3 R1 + R2 Contents of R1 plus R2 transferred to R3 R3 R1 - R2 Contents of R1 minus R2 transferred to R3 R2 R2’ Complement the contents of R2 R2 R2’+ 1 2's complement the contents of R2 (negate) R3 R1 + R2’+ 1 subtraction R1 R1 + 1 Increment R1 R1 - 1 Decrement Computer Organization Computer Architectures Lab Register Transfer & -operations 40 Arithmetic Microoperations 12) Types of Microoperations (-operations) ARITHMETIC -operations BINARY ADDER / SUBTRACTOR / INCREMENTER B3 A3 B2 A2 B1 A1 B0 A0 Binary Adder FA C3 FA C2 FA C1 FA C0 A=A3A2A1A0 & B=B3B2B1B0 A=1001 B=1101 C4 S3 S2 S1 S0 B3 A3 B2 A2 B1 A1 B0 A0 M Binary Adder-Subtractor M=0 Adding operation FA C3 FA C2 FA C1 FA C0 M=1 Subtraction operation C4 S3 S2 S1 S0 A3 A2 A1 A0 1 Binary Incrementer x y x y x y x y HA HA HA HA C S C S C S C S C4 S3 S2 S1 S0 Computer Organization Computer Architectures Lab Register Transfer & -operations 41 Arithmetic Microoperations 12) Types of Microoperations (-operations) ARITHMETIC -operations ARITHMETIC CIRCUIT S1 Cin S0 A0 X0 C0 S1 Y0 FA D0 S0 B0 0 4x1 Y0 C1 1 MUX 2 3 A1 X1 C1 S1 D1 S0 Y1 FA B1 0 4x1 Y1 C2 1 MUX 2 3 A2 X2 C2 S1 Y2 FA D2 S0 B2 0 4x1 Y2 C3 1 MUX 2 3 A3 X3 C3 S1 Y3 FA D3 S0 B3 0 4x1 Y3 C4 1 MUX 2 3 Cout 0 1 SS1 1 S0 S0 Cin Cin YY Output D Microoperation 0 0 0 B D=A+B Add 0 0 1 B D=A+B+1 Add with carry 0 1 0 B’ D = A + B’ Subtract with borrow 0 1 1 B’ D = A + B’+ 1 Subtract A=1001 1 0 0 0 D=A Transfer A 1 0 1 0 D=A+1 Increment A B=1101 1 1 0 1 D=A-1 Decrement A 1 1 1 1 D=A Transfer A Computer Organization Computer Architectures Lab Register Transfer & -operations 42 Logic Microoperations 12) Types of Microoperations (-operations) LOGIC -operations Specify binary operations on the strings of bits in registers – Logic Microoperations are bit-wise operations, i.e., they work on the individual bits of data – useful for bit manipulations on binary data – useful for making logical decisions based on the bit value Computer Organization Computer Architectures Lab Register Transfer & -operations 43 Logic Microoperations 12) Types of Microoperations (-operations) Logic -operations Hardware Implementation Of Logic -operations Ai 0 Bi 1 4X1 Fi MUX 2 3 Select S1 Lines S0 S1 S0 Output -operation 0 0 F=AB AND 0 1 F = AB OR 1 0 F=AB XOR A=1001 1 1 F = A’ Complement B=1101 Function table Computer Organization Computer Architectures Lab
