Chapter 6 - Arithmetic Circuits PDF

CHAPTER 6 ARITHMETIC CIRCUITS LESSON OUTCOMES  At the end of this lesson, the students should be able to:  Perform the binary addition  Construct the half adder, full adder and parallel adder circuit  Differentiate between signed numbers and two...

CHAPTER 6 ARITHMETIC CIRCUITS LESSON OUTCOMES  At the end of this lesson, the students should be able to:  Perform the binary addition  Construct the half adder, full adder and parallel adder circuit  Differentiate between signed numbers and two complement numbers  Perform the conversion of signed and two complement numbers  Perform the two complement arithmetic  Construct the subtractor and adder-subtractor circuit INTRODUCTION An arithmetic circuit is a digital circuit designed to perform arithmetic operations like addition, subtraction, multiplication, and sometimes division. These circuits use combinations of logic gates to process binary numbers and execute arithmetic functions. Common types of arithmetic circuits include:  Adders (Half Adder, Full Adder) for addition.  Subtractor circuits for subtraction.  Multipliers for multiplication. INTRODUCTION  These circuits are fundamental in devices like computers and calculators, where numerical calculations are constantly needed. IMPORTANCE OF ARITHMETIC CIRCUIT  Core of Data Processing: Arithmetic circuits perform basic mathematical functions, which are essential for data processing in almost all digital systems, from simple calculators to complex microprocessors.  Performing Calculations in Computers: In computers, arithmetic circuits allow the central processing unit (CPU) to execute tasks like addition, subtraction, and multiplication, which are fundamental operations for any computing process.  Building More Complex Circuits: Arithmetic circuits form the foundation for more complex digital operations, including arithmetic logic units (ALUs), which handle both arithmetic and logical operations in processors. IMPORTANCE OF ARITHMETIC CIRCUIT  Efficient Data Handling: Arithmetic circuits make it possible for digital devices to handle numerical data efficiently, enabling quick and accurate computations in applications like financial software, gaming, and scientific simulations.  Essential for Embedded Systems: Many embedded systems, like control systems, robotics, and real-time systems, require arithmetic circuits to process inputs and perform calculations to control operations.  Supporting Digital Communication: In digital communication systems, arithmetic circuits are used in error detection and correction mechanisms, as well as in signal processing tasks that require numerical calculations. IMPORTANCE OF ARITHMETIC CIRCUIT  In summary, arithmetic circuits are vital for performing the mathematical operations necessary for processing and analyzing data in digital electronics. Without them, digital devices wouldn’t be able to function as efficiently or perform complex tasks. BINARY ADDITION  Binary addition is performed in the same way as decimal addition except that the values of individual digits can only be 0 or 1.  The addition of a one-bit number has 4 possible combinations as shown below: BINARY ADDITION  When adding a larger numbers that has multiple bits, it is still necessary to add each pair of bits with a carry-in Cin.  For example, A=1101 (13) and B=0110 (6). HALF ADDER AND FULL ADDER CIRCUIT  The 1s column adds 2 bits 𝐴𝐴 + 𝐵𝐵 and generates 2 outputs S and Co - half adder operation.  The half adder truth table and circuit : HALF ADDER AND FULL ADDER CIRCUIT  The 2s, 4s and 8s columns add 3 bits 𝐶𝐶𝐶𝐶𝐶𝐶 + 𝐴𝐴 + 𝐵𝐵 and generates S and Cout - full adder operation. HALF ADDER AND FULL ADDER CIRCUIT  The full adder truth table and circuit : PARALLEL ADDER CIRCUIT  To construct a 4 bit parallel adder, a single half adder and three full adder circuits are used.  The top half adder adds the 1s column A1+B1 and generates S1 and Co.  The 2s, 4s and 8s columns use a full adder.  The carry out Co is connected to the Cin of the next adder. PARALLEL ADDER CIRCUIT PARALLEL ADDER CIRCUIT  7483 is a commercial 4-bit full adder. It has four full adders connected as shown below.  To perform a 4 bit addition, the Cin is connected to GND (0). PARALLEL ADDER CIRCUIT  An 8-bit parallel adder is constructed using two 7483 ICs.  The Cout of the first IC is connected to the Cin of the preceding IC. SIGNED NUMBERS  A binary number can be represented as either a positive or a negative value.  The common representation of signed numbers is either in the form of sign-magnitude or in the form of 2’s complement.  In a sign-magnitude system, a number consists of two parts, the magnitude and the sign. SIGNED NUMBERS  A 0 signifies a positive number and a 1 signifies a negative number.  An n bit sign-magnitude number could represent integers ranging from – (2n-1-1) to +(2n-1-1).  E.g: A 4 bit sign-magnitude ranges from -7 to +7.  There are two possible representations of zero: -0 and +0. Thus +6 (0110) and -6 (1110) differ only in the sign bit. SIGNED NUMBERS TWO’S COMPLEMENT NUMBER The complement number system was invented to make addition and subtraction faster and easier.  It requires complementation which can be performed quite efficiently on binary numbers.  An n bit 2’s complement number could represent integers ranging from -2n-1 to +2n-1 - 1.  A four bit 2’s complement number ranges from -8 to +7. TWO’S COMPLEMENT NUMBER TWO’S COMPLEMENT NUMBER  In 2’s complement number system, a positive number is represented in the same fashion as in a sign-magnitude number. For example, +6 = 0110.  A negative number in 2’s complement is obtained from a positive number by complementing each bit including the sign bit and then adding 1 to it.  The carry that occurs out of the MSB is discarded. TWO’S COMPLEMENT NUMBER  As an example, the 2s complement for -6 is illustrated below: TWO’S COMPLEMENT NUMBER Example 1:  Find the 2’s complement number for +30 and -30. a) The magnitude for +30 is 11110. Attach sign bit = 0 2s complement for +30 = 011110 b) 2s complement for -30 = 100010 TWO’S COMPLEMENT NUMBER  Example 2:  Show how an 8-bit computer would represent a 2’s complement number for +30 and -30. a) 2s complement for + 30 using 8 bit = 00011110 b) 2s complement for -30 = 11100010 TWO’S COMPLEMENT NUMBER Example 3:  Determine the decimal value for the following 2’s complement number: a) 00100010  From the sign bit, 00100010 is a positive number. The decimal value is +34. b) 10100010  From the sign bit, 10100010 is a negative number. Complement each bit and add 1. The decimal value is -94. TWO’S COMPLEMENT NUMBER c) 11111111  From the sign bit, 11111111 is a negative number. Complement each bit and add 1. The decimal value is -1.  The number of bits available in the computer’s arithmetic unit, limits the range of numbers that can be represented in the machine. TWO’S COMPLEMENT NUMBER  Numbers that fall outside this range cannot be handled by the system.  Machines that uses 2’s complement number system can represent integers in the range -2n-1 ≤ N ≤ 2n-1 – 1, where n is the number of bits available for representing N.  If an operation produces a result that falls outside the available range, than an overflow occurs. TWO’S COMPLEMENT NUMBER  Example 1:  Determine the range of integers that can be represented in the 2’s complement number system having n bits: a) n = 8 bit  - 28-1 to + 28-1 -1 : -128 (10000000) to +127 (01111111) b) n =16 bit  - 32,768 to + 32,767 c) n = 32 bit  – 2,147,483,648 to +2,147,483,647  Exercises 1. Convert the following decimal numbers to two’s complement numbers: a) -2610 b) -4710 2. Convert the following two’s complement numbers to a decimal number: a) 10110101 b) 1100011010 Solution: 1. Convert the following decimal numbers to two’s complement numbers: a) -2610 b) -4710 +2610 = 011010 +4710 = 0101111 = 100101 = 1010000 + 1 + 1 100110 1010001 2. Convert the following two’s complement numbers to a decimal number: a) 10110101 b) 1100011010 = 01001010 = 0011100101 + 1 + 1 01001011 = -7510 0011100110 = -23010 TWO’S COMPLEMENT ARITHMETIC  Add and subtract using 2’s complement system.  Four cases will be considered: A+B, A-B, -A+B and –A-B. 1) Case 1: A+B Two positive numbers.  Since both A and B are positive, the result will also be positive. So, there is no need to use the 2’s complement. TWO’S COMPLEMENT ARITHMETIC  Example 1: 2 + 4 = +6  Example 2: 9 + 4 = +13 TWO’S COMPLEMENT ARITHMETIC  There are cases when an operation produces a result that exceeds the range of the number system -> overflow.  When we add two numbers with the same sign, which produce a sum that is larger than the largest representable number, we can obtain an incorrect result.  Addition overflow occurs whenever the sign of the sum is different from the signs of both addends. TWO’S COMPLEMENT ARITHMETIC Example 1: 6+3 = -7  The result 1001 is interpreted as -7. The sign bit shows that it is a negative number.  The correct answer is +9, which is outside the 4-bit 2’s complement range [-8,+7] -> an overflow has occurred.  The sum of the two given numbers requires more than the allotted 4 bits to represent it. TWO’S COMPLEMENT ARITHMETIC  Example 2: 12+7 = -13  The result 10011 is interpreted as -13.  The correct answer is +19, which is outside the 5-bit 2’s complement range [-16,+15].  The sum of the two given numbers requires more than the allotted 5 bits to represent it. TWO’S COMPLEMENT ARITHMETIC  Example 3: Compute 6+3 using 5 bits.  The range for a 5-bit 2’s complement is [-16,+15].  Since the sign bit is 0, it correctly represents the desired answer which is interpreted as +9. TWO’S COMPLEMENT ARITHMETIC  Example 4: Compute 12+7 using 6 bits.  The range for a 6-bit 2’s complement is [-32,+31].  Since the sign bit is 0, it correctly represents the desired answer which is interpreted as +19. TWO’S COMPLEMENT ARITHMETIC  Example 5: Compute 19+27 using 2’s complement system.  The sum is +46 which requires at least 7 bits, where the range for a 7-bit 2’s complement is [-64,+63]. TWO’S COMPLEMENT ARITHMETIC Case 2: -A-B Two negative numbers. 2)  Both –A and –B will be represented by the 2’s complement and the computation will be performed as (-A) + (-B).  Example 1: -3-2 = -5 -3 = -(0011)  1100 + 1 = 1101 -2 = -(0010)  1101 + 1 = 1110 TWO’S COMPLEMENT ARITHMETIC  Example 2: -12-5  The sum is -17 which requires 6 bits.  The range for a 6-bit 2’s complement is [-32,+31]. -12 = -(001100)  110011 + 1 = 110100 -5 = -(000101)  111010 + 1 = 111011  The result is 101111 = -17. TWO’S COMPLEMENT ARITHMETIC  Suppose we use 5 bits to compute -12-5, the answer is 01111 = +15.  Note that the sign bit (0) is incorrect, indicating an overflow.  The desired result (-17) exceeds the number range for a 5-bit 2’s complement [-16,+15]. -12 = -(01100)  10011 + 1 = 10100 -5 = -(00101)  11010 + 1 = 11011 TWO’S COMPLEMENT ARITHMETIC 3)Case 3: A-B  The positive number A is unchanged, however B is represented in 2’s complement form.  Example 1: 3-2 = 1 +3 = 0011 -2 = -(0010)  1101 + 1 = 1110  The result is 0001 = +1. TWO’S COMPLEMENT ARITHMETIC  Example 2: 12 - 5 +12 = 01100 -5 = -(00101)  11010 + 1 = 11011  The answer is 00111 = +7 TWO’S COMPLEMENT ARITHMETIC  Example 3: 5 -12 +5 = 00101 -12 = -(01100)  10011 + 1 = 10100  The answer is 11001 = -7 TWO’S COMPLEMENT ARITHMETIC 4)Case 4: -A+B  The negative number A is represented in 2’s complement form, however B is unchanged.  Example 1: -3+2 -3 = -(0011)  1100 + 1 = 1101 +2 = 0010  The result is 1111 = -1. Exercises 1. Perform the following operations using two’s complement number system: a) 2110 + 4510 c) –1310 – 610 b) –3010 + 6710 d) 7310 – 5610 Solution: a) 2110 + 4510 2110 = 00010101 4510 = 00101101 2110 + 4510  00010101 + 00101101 01000010 b) –3010 + 6710 6710 = 01000011 –3010 = – (00011110)  11100001 + 1 = 11100010 – 3010 + 6710  11100010 + 01000011 100100101 c) –1310 – 610 -13 + (-6)) –1310 = – (001101)  110010 + 1 = 110011 –610 = – (000110)  111001 + 1 = 111010 –1310 + (–610)  110011 + 111010 1101101 d) 7310 – 5610 7310 = 01001001 – 5610 = – (00111000)  11000111 + 1 = 11001000 7310 + (– 5610)  01001001 + 11001000 100010001 SUBTRACTOR CIRCUIT  The 4-bit parallel adder can be modified slightly to form a subtractor circuit.  Subtraction S= A-B in the 2’s complement number system is performed as follows: 𝑆𝑆 = 𝐴𝐴 − 𝐵𝐵 = 𝐴𝐴 + 𝐵𝐵 + 1 SUBTRACTOR CIRCUIT  The 2’s complement for B is obtained by complementing each bit and then adding 1 to the LSB. SUBTRACTOR CIRCUIT  A 4-bit subtractor circuit is shown below:  The 2’s complement is formed by the inverters on the B input and adding Cin = 1 to the LSB.  The MSB (A4, B4 and S4) is used for the sign bit and the C4 output is not used. Co SUBTRACTOR CIRCUIT  The diagram shown below is a 4-bit subtractor circuit using a 7483 adder and NOT gates.  This circuit can only accept values between -7 (1001) and +7 (0111), and the result is also limited to values between -7 to +7.  Some arithmetic operation can result in an overflow condition if the output result is beyond the range of valid numbers. SUBTRACTOR CIRCUIT  Example 1: 7-1 = 6  Example 2: 7-0 = 7 SUBTRACTOR CIRCUIT  An 8-bit subtractor circuit is constructed by connecting two 4-bit subtractor circuit.  The output of C4 is connected to the Cin of the preceding subtractor.  This circuit can accept values between -127 (10000001) and +127 (01111111), and the result is also limited to values between -127 to +127. SUBTRACTOR CIRCUIT  Example 1: 127-0=127 SUBTRACTOR CIRCUIT  Example 2: 7-1=6 ADDER-SUBTRACTOR CIRCUIT  The 4-bit adder and subtractor circuits are almost identical.  These circuits can be combined to form an adder-subtractor circuit.  The circuit has an additional input called the control.  If the control input is 0, the circuit performs addition, A+B+0 , where Cin=0. ADDER-SUBTRACTOR CIRCUIT  If the control input is 1, the circuit performs subtraction 𝐴𝐴 + 𝐵𝐵 + 1 , where Cin =1. Co ADDER-SUBTRACTOR CIRCUIT  From the truth table, we can write the expression as: 𝑌𝑌 = 𝐵𝐵. 𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶 + 𝐵𝐵. 𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶 = 𝐵𝐵 ⊕ 𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶 ADDER-SUBTRACTOR CIRCUIT  The 4 bit adder- subtractor circuit is shown beside.  When the control input is 1, the input Cin=1 and the XOR gate will act as inverter to perform subtraction.  When the control input is 0, the input Cin=0 and the XOR Co gate has no effect on B. END OF CHAPTER 6 ARITHMETIC CIRCUITS