Computer Architecture: CISC vs RISC (PDF)

What are some of the characteristics of a processor in which CISC and RISC differ? CISC and RISC processors differ in a few key ways. CISC (Complex Instruction Set Computing) processors have a lot of different instructions, and those instructions can be very complicated. RISC (Reduced Instruction S...

What are some of the characteristics of a processor in which CISC and RISC differ? CISC and RISC processors differ in a few key ways. CISC (Complex Instruction Set Computing) processors have a lot of different instructions, and those instructions can be very complicated. RISC (Reduced Instruction Set Computing) processors, on the other hand, have a smaller number of simpler instructions. This makes RISC processors easier and faster to build. What did the HLLs provide? More powerful HLLs made it easier for programmers to write complex programs. They allowed programmers to express ideas more concisely and supported better program organization without having to know the underlying complex workings of the language (abstraction). The generation of more power HLLs led to a problem called the semantic gap. What is this? The semantic gap is the difference between what high-level languages (HLLs) can express and what computer processors can actually do. To address this, processors were designed with more complex instructions that more closely resembled the more powerful HLLs. What are the key features of the architectures that were designed to close this gap? To close the semantic gap, processors were designed with lots of instructions and with instructions that could perform very complicated tasks. A number of studies were carried out to determine the characteristics and patterns of execution of machine instructions generated from HLL programs. The results of these studies inspired some researchers to look for a different approach: namely, to make the architecture that supports the HLL simpler, rather than more complex. What are the 3 main characteristics/patterns of execution that were found that supports simpler rather than complex architectures? Studies found that the following processor characteristics were best for efficiently executing programs written in high-level languages: 1. A large number of registers for the processor. 2. A limited and simple instruction set. 3. An emphasis on optimizing the instruction pipeline. What are two approaches for implementing the use of a Large Register File? There is a software approach and a hardware approach. In the software approach, the compiler tries to make the best use of the registers. In the hardware approach, processors are designed with more registers. Because most operand references are to local scalars, the obvious approach is to store these in registers, with perhaps a few registers reserved for global variables. The problem is that the definition of local changes with each procedure call and return; furthermore, parameters must be passed. Describe the solution to this problem called Overlapping Register Windows. Each time a procedure is called, a new set of registers, called a register window, is used. Each window overlaps with the previous window, which is used to pass parameters between procedures. Compare and contrast the characteristics of a Large Register File and Cache organizations. A large register file is similar to a cache in that it acts as a small, fast memory for holding a subset of all variables. However, a large register file is typically much faster than a cache. Also, a cache can hold both data and instructions, while a register file typically only holds data. Explain one characteristic which makes the Large Register File superior to a Cache based system. A large register file can be accessed much faster than a cache because the address of a register in the register file is much shorter than the address of a memory location in a cache. What is CISC? CISC stands for Complex Instruction Set Computer. It is a type of computer architecture that uses a large and complex set of instructions. Why was it used? CISC was used to support high-level languages (HLLs) and to improve performance. Compiler simplification is cited as a reason for the CISC trend. However, RISC researchers have found that this is not true. Explain their reasoning. RISC researchers argue that a large and complex instruction set does not simplify compilers, because the compiler must find those cases that exactly fit the construct. Another reason for the CISC trend is the expectation that CISC will yield smaller, faster programs. Explain the reasoning behind why this has not been found to be true. It was expected that CISC would yield smaller, faster programs because CISC instructions are more complex and can perform more operations in a single instruction. However, this has not been found to be true because CISC programs are often larger than RISC programs. This is because CISC instructions are also more complex to decode and execute. Describe the characteristics of RISC. RISC processors have a small number of simple instructions, use register-to-register operations, simple addressing modes, and simple instruction formats. What are some of the “Circumstantial Evidence” in favour of RISC architectures? Some of the circumstantial evidence in favor of RISC architectures is that they can be more easily optimized by compilers, that they can execute instructions faster, and that they can be more easily pipelined. What are 3 techniques for achieving optimization in pipelining in RISC architectures? Three techniques for achieving optimization in pipelining in RISC architectures are delayed branch, delayed load, and loop unrolling. Distinguish between the 2 classes of processors: Superscalar and Super-pipelined architectures, stating their limitations. Superscalar processors have multiple pipelines, while superpipelined processors have a single pipeline with many stages. The limitation of superscalar processors is that dependencies between instructions in different pipelines can slow down the system. The limitation of superpipelined processors is that there is overhead associated with transferring instructions from one stage to the next. Describe some enhancements that are possible to the pipeline organization in RISC architectures. Some enhancements that are possible to the pipeline organization in RISC architectures are the use of multiple reservation stations, forwarding, and the reorder buffer.