CSE211.pdf

CSE211: COMPUTER ORGANIZATION AND DESIGN L:3 T:1 P:0 Credits:4 Course Outcomes: Through this course, students should be able to CO1:: apply their knowledge of computing fundamentals, hardware components...

CSE211: COMPUTER ORGANIZATION AND DESIGN L:3 T:1 P:0 Credits:4 Course Outcomes: Through this course, students should be able to CO1:: apply their knowledge of computing fundamentals, hardware components, and operating systems to set up, configure, and troubleshoot various computing environments effectively. CO2:: Trace the digital systems principles and implementation strategies to develop efficient digital electronics solutions. CO3:: Analyze the design and functionality of sequential circuits by integrating combinational and sequential logic components for various applications. CO4:: understand different instruction set architectures and their implementation to appreciate their impact on CPU performance and assembly language programming. CO5:: Analyze and optimize memory management techniques and cache performance for improved computational efficiency CO6:: articulate the advanced pipelining and parallelism techniques to enhance the performance of modern processors. Unit I Introduction to Hardware and Operating Systems: Introduction to Computing Fundamentals, Computing Devices and Peripherals, Interfaces and Connectors, Internal Computer Components, Windows workstation: setup, evaluation, and troubleshooting, Exploring additional desktop and mobile operating systems. Unit II Digital Systems: Introduction to Digital Systems: Digital Systems, Digital System Description, Digital Electronics Systems, Processor Specification, Examples of programs, Combinational Circuits I: Combinational Circuits, Boolean Algebra, NAND NOR XOR and TRI-States, Functional and structural specification, VerilUOC_Desktop tools: Introduction to VerilUOC_Desktop (I). Logisim and VerilCirc, Introduction to VerilUOC_Desktop (II). BoolMin and VerilChart, combinational Circuits II: Synthesis tools, propagation time, other logic blocks, programming language structures, structure specification, Arithmetic components, and Introduction to VHDL. Large multiprocessors (Directory Protocols) Unit III Sequential Circuits: Sequential Circuits I: Sequential Circuits, Latches, and flip-flops, Explicit Functional Description, Synthesis from the table and an example of synthesis, explicit functional description, Combinational blocks, Sequential blocks Sequential Circuits II: Registers, Counters, Memories, sequential blocks, Finite State Machines, and their examples, Sequential implementation of algorithms, Instructions Session 2024-25 Page:1/2  control complete circuits, Implementation of digital systems: Physical implementation, implementation strategies, and synthesis tools, test and design methods, Multiprocessor interconnect 1, Multiprocessor interconnect 2. Unit IV Instruction Set Architecture: Introduction to Instruction Set Architecture and Microcode: Architecture & Microcode, Machine Models, ISA characteristics, Pipeline Review: Micro coded Microarchitecture, Pipeline basics, Structural and data Hazards, Cache Review: Control hazards -jump, branch, others, Superscalar1: Classifying Caches, Cache Performance, two-way in ordering superscalar, Fetch logic and alignment. Unit V Memory Management: Memory Protection: Introduction, base &bound registers, page- based memory systems, translation and protection, TLB processing, Superscalar2 & Exception: Interrupts, exceptions & by-passing, out-of-order processors, Superscalar3: I2O2, I2O1, IO3, IO2I processor, Superscalar4, VLIW1, VLIW2, Branch Prediction. Unit VI Pipelining: Advanced Caches-I: Cache pipelining, Write buffers, multilevel caches, victim caches, prefetching, Advanced Caches-II: Software memory optimization, non- blocking caches, Vector processors and GPUs: Introduction, hardware optimization, vector software, and compiler optimization, Multithreading: SIMD, GPUs, coarse- grained multithreading, Parallel Programming-I: Introduction, Sequential consistency, Locks, Parallel Programming-II: Atomic operations, memory fences, lock and semaphores, Small Multiprocessors: bus implementation, cache coherence protocols Reference Textbook: 1. Computer System Architecture by M. Morris Mano, Rajib Mall, Pearson Session 2024-25 Page:2/2