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Questions and Answers
Which register should be accessed to send data in the STM Arm microcontroller USART?
Where is the received data stored in the STM Arm microcontroller USART?
In the STM Arm microcontroller USART, which action requires writing to a separate register?
Which of the following is NOT a configuration register in the STM Arm microcontroller USART?
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What is the purpose of USART_TDR in the STM Arm microcontroller USART?
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Which register in the STM Arm microcontroller USART directly interacts with the serial transmit pin (TXD)?
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What is the purpose of the RXNE bit in USART?
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Which register is responsible for setting the baud rate in USART configuration?
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In USART configuration, what does the USART_SR register check for?
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What is the purpose of the USART2_CR1 register in configuration?
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Why is it important to enable USART2 after completing the configuration steps?
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What action does the USART2_read() function in the code perform?
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Which control register is responsible for specifying the oversampling rate in USART configuration?
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In the context of STM Arm USART, what does the AF7 stand for?
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What role does the TXE flag play in USART data transmission?
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Which register enables the USART2 after configuration steps in the provided code snippet?
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Study Notes
USART Registers
- USART Control 1 (USART_CR1) register: a 32-bit register used to set the number of bits per character (data length) in a frame, among other things.
- USART Control 2 (USART_CR2) register: a 32-bit register used for configuration.
USART_CR1 Register Bits
- Bit 15: OVER8: Oversampling mode (0: oversampling by 16, 1: oversampling by 8)
- Bit 13: UE: USART enable (0: USART prescaler and outputs disabled, 1: USART enabled)
- Bit 12: M: Word length (0: 1 Start bit, 8 Data bits, n Stop bit, 1: 1 Start bit, 9 Data bits, n Stop bit)
- Bit 7: TXEIE: TXE interrupt enable (0: interrupt is inhibited, 1: an USART interrupt is generated whenever TXE=1)
- Bit 6: TCIE: Transmission complete interrupt enable (0: interrupt is inhibited, 1: an USART interrupt is generated whenever TC=1)
- Bit 5: RXNEIE: RXNE interrupt enable (0: interrupt is inhibited, 1: an USART interrupt is generated whenever ORE=1 or RXNE=1)
- Bit 4: IDLEIE: IDLE interrupt enable (0: interrupt is inhibited, 1: an USART interrupt is generated whenever IDLE=1)
- Bit 3: TE: Transmitter enable (0: transmitter is disabled, 1: transmitter is enabled)
- Bit 2: RE: Receiver enable (0: receiver is disabled, 1: receiver is enabled and begins searching for a start bit)
- Bits 13:12: STOP: STOP bits (00: 1 Stop bit, 01: 0.5 Stop bit, 10: 2 Stop bits, 11: 1.5 Stop bit)
- Bit 11: CLKEN: Clock enable (0: SCLK pin disabled, 1: SCLK pin enabled)
USART Data Register (USART_DR)
- Used to transmit a byte of data
- A write to this register initiates a transmission from the USART
- The same register is used for both transmit and receive data in STM Arm microcontrollers
Simplified Block Diagram of USART
- Transmit Data register (USART_TDR): used to send data
- Receive Data register (USART_RDR): used to store received data
- USART peripheral sends out the content of the data transmit register through the serial transmit pin (TXD)
- Received data is stored in the Receive Data register (USART_RDR)
Enabling the USART
- Before enabling the USART, the bus clock to the USART should be enabled
- The USART module should be configured properly before it is enabled
- The USART module can be disabled by writing a 0 to the UE bit (UE, USART Enable) of the CR1 register
GPIO Pins Used for USART TxD and RxD
- In addition to the USART registers setup, the I/O pins for USART (TxD and RxD) must be configured to use their alternate functions
- This is done using the AFRx (Alternative Function Register) registers
Steps to Configure USART for Receiving Data
- Enable the Clock to GPIOA
- Enable the Clock to USART2
- Select the peripheral function AF7 for PA3 (USART2_RxD) pin using the GPIO_MODER and GPIO_AFRL registers
- Set the baud rate for USART2 using USART2_BRR register
- Configure the CR1 (Control 1) register for oversampling rate, character size (8bit or 9-bit) and enabling receive (RE)
- Configure the CR2 (Control 2) register for number of stop bit(s) and so on
- Configure the CR3 (Control 3) register for no hardware flow control and so on
- Enable USART2 after configuration complete
- Wait until the RXNE (Receive Not Empty) bit of the USART_SR register is set
- Read a byte from USART2_DR register that was received
Importance of the RXNE Flag Bit
- The RXNE flag bit is used to indicate when a character is received
- The receiver's shift register receives the start bit indicating that the next bit is the first bit of the character it is about to receive
- The character is received one bit at a time
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Description
Learn about the USART Control 1 (USART_CR1) register and USART Control 2 (USART_CR2) register in microcontrollers. Understand how these 32-bit registers are used to control aspects like data length and oversampling modes in USART communication.
