SCC.131: ARM Assembly Serialization

• The lecture covers SCC.131: ARM Assembly serialization.

Plan for the Day

• It is expected that by now you know how to perform numerical operations with registers and constants, along with how to change the execution flow of a program
• Convert ARM Assembly to binary
• The lecture will deep dive in the ISA design

The Instruction

• An instruction represents the most basic unit of computer processing
• Instructions serve as words in a computer's language
• An instruction set architecture (ISA) is the vocabulary
• The language of the computer can be written as machine and assembly code
• Machine language is the computer-readable representation of that language composed of 0's and 1's
• Assembly language is the human-readable representation
• ARM will be studied in detail
• The principles are comparable across all ISAs like x86, SPARC, and RISC-V.

Executable File Creation

• A preprocessor utilises macros, #include directives, and #xxxx statements, to output "pure" C code.
• Compilation transforms C code into assembly code. However, it still remains human-readable and is dependent on machine architecture
• Assemblies create machine code, stored in an object file
• Linkers combine several object files together

Assembler in Detail

• Assemblers convert each instruction into either a 16-bit or 32-bit representation in a process that is well-defined
• Each binary instruction contains an instruction, registers and immediate values
• ARM-Cortex M3 supports both ARM T32 and Thumb-2, with Thumb-2 used by default

MIPS Code

• MIPS machine code is used for demonstration other architectures, and not ARM
• MIPS can be categorized into three instructions: Register (R-type), Immediate (I-type), and Jump (J-type)

Example Instruction – Add ARM

• add r0, r1, r2 is an example of an ARM instruction
•   The ARM instruction type is characterized as ADD{S}<c>.W <Rd>, <Rn>, <Rm>{, <shift>}.
• This includes the instruction opcode which is unique for each instruction, registers and optional shift

ARM Data Processing Instruction

• ARM instructions are encoded using a specific data processing instruction format

Example Addition Instruction – Add ARM

• Registers RO-R7 are "low registers" where as R8, R9, R10, R11, R12, SP, LR and PC are considered "High Registers."
• Showing how add ro, r1, r2 can be represented
• R0 = 0: 0000
•  R1 = 1: 0001
•  R2 = 2: 0010
• The instruction can be written as 1110 1011 0000 0000 1000 0000 0000 0010
• In hex this looks like 0x 4 4 0 2

Moore's Law Revisited

• Speeding up the CPU is generally easier than speeding up memory
• Off-chip memory such as SRAM (Static Random-Access Memory) is slower compared to on-chip memory such as M1, M2 caches
• flash memory has slower read and write speeds relative to RAM, and fast RAM is more expensive than slow RAM
• CPUs use caches (small fast RAM) to make main memory look faster at a lower cost
• Alternatively, CPUs have memory on-chip with the CPU. RAM, or flash ROM.
• Flash ROM bandwidth can be increased by widening the memory bus, as well as adding a prefetch buffer, together with a branch target buffer, and cache
• The size of the instruction set can also be changed to reduce instruction bandwidth needed.

ARM and Thumb

• Thumb reduces program memory size and bandwidth requirements through a subset of instructions, re-encoded into fewer bits, most being 16 bits but some reaching 32 bits
• Thumb-1 was introduced as 16-bit instructions (1995)
• Thumb-2 was introduced, adding some 32-bit instructions in 2003 resulting in faster execution and lowermemory overhead
• Some ARM CPUs allow controlling the operating state
• With registers, the program status register T bit, which decodes instructions in Thumb or ARM state. The thumb state is indicated by the program counter being and odd number
• Microbit always uses Thumb instructions

Instruction Encoding

• The CPU reads instructions as a stream
• The first five bits determine if an instruction is 16 or 32 bit
• Otherwise, the halfword is considered a 16-bit instruction.

Conclusion

• The lecture briefly covered machine code, its relationship to Moore's Law, and ARM encoding
• The next lecture will cover MMΙΟ