Assembly Coding and ARM Architecture

• Assembly programming involves identifying when/why to use assembly language and understanding addressing modes.

Assembly Program

• Assembly level statements, unlike high-level languages, are known as mnemonics.
• Mnemonics have a direct, one-to-one correspondence with machine code.
• Assembly is hardware-dependent and addresses the processor architecture directly.
• An assembler converts Assembly to machine code.

Why Use Assembly Language?

• Assembly enables codes with faster execution speed, important where real-time signal processing is needed.
• Low-cost embedded devices needing high functionality can benefit from it.
• Optimized features of a processor's ISA can be exploited (something high-level languages may not).
• Knowing Assembly is useful in cybersecurity.

When to Use Assembly Language?

• For critical parts of an operating system's software (e.g., system kernel, interrupt handlers).
• Where input/output is intensive (e.g., device drivers, video decoders).
• Where codes are time-critical (e.g., anti-lock brake systems/ABS).

Addressing Modes (AM)

• Addressing mode is concerned with how data is accessed.
• The processor instruction set architecture supports different addressing modes.
• Appropriate AMs help the CPU identify the actual operand/storage address location.
• Addressing modes supported:
  • Register direct
  • Immediate data
  • Register indirect
  • Register indirect with offset
  • Register indirect with index register
  • Pre and post auto-indexing

Addressing Mode Examples

• Addressing modes in ARM and Intel:
  • Absolute (Direct): MOV AX, [1000h] (Intel)
  • Register Direct: MOV R1, R0 (ARM)
  • Immediate: MOV R1, #3 (ARM), MOV AX, 0003h (Intel)
  • Register Indirect: LDR R1, [R0] (ARM), MOV AX, [BX] (Intel)
  • Register Indirect with Offset: LDR R1, [R0, #4] (ARM), MOV AX, [BX + 4] (Intel)
  • Register Indirect with Index: LDR R1, [R0, R2] (ARM), MOV AH, [BX + DI] (Intel)
  • Implied: BNE LOOP (ARM), JMP -8 (Intel)

Summary of addressing modes

• Assembly codes can run faster and occupy less memory.
• Assembly-level coding significantly benefits low-level OS kernels, I/O intensive, and time-critical operations.
• Understanding ISA addressing modes helps with writing efficient code.

Register Direct and Immediate Addressing

• Describe what is register direct and immediate data and its application.

Register Direct

• The operand is specified as the register's content.
• Register direct can be used for destination and source operands.
• In the MOV instruction, the right operand is the source and the left operand is the destination.
• Due to no further memory access being involved during execution, it's a fast addressing mode.
• For optimizing execution speed, register direct should be used

Immediate Addressing

• The operand is specified directly within the instruction itself.
• A "#" symbol precedes the immediate value.
• Assembly: MOV R1, #3: The immediate value is copied into destination register after execution.
• Immediate addressing is only applicable as a source operand.
• For loading constant values into registers, immediate addressing is used.
• Values must be known when coding.

Immediate Addressing (cont)

• 32-bit immediate values are encoded within the instruction bit pattern.
• Only a subset of all possible values can be described.
• Immediate value is a number between (0..255) rotated right by 2n bits, where value of n is 4 bits (0 ≤ n ≤ 15).
• A combination of instructions can make up the desired immediate values outside of the valid range.
• Assembler does the calculations, giving a warning if the value is un-encodeable.
• MOV R3, #0xFF: immediate values < 8 bits are valid.
  • MOV R0, #0x100: right rotate the 8-bit 0x01 value with n=12.
  • MOV R1, #0x102: Invalid.

Summary

• Register direct is efficient because it does not involve memory access during execution.
• Immediate addressing encodes the operand within the instruction.
• Immediate addressing in ARM, like register direct, does not incur memory access during execution, only during instruction fetching.
• Only a subset of immediate values are available because data is encoded within fixed-length instructions.
• Immediate addressing is used if operand value is known during coding (e.g., known constants).

Register Indirect with Base Register:

• What is register indirect and ARM instructions that support this addressing mode.
• It is necessary to understand the variants/application of register indirect (uses base plus offset, index register).
• Allows comparison of the relative pros and cons of register direct and indirect addressing modes.

Limitation of Register Direct and Immediate Addressing

• Register direct and immediate addressing don't allow the CPU to operands in memory to be accessed.
• C variables are typically allocated to memory for storage.
• The ARM specifies the 32-bit address for the operand using a register
• Memory operand is fetched with register indirect addressing during instruction execution.
• ARM uses LDR, STR mnemonics to access memory operands.

The LDR Instruction

• The LDR operator copies memory content to a register.
• Left operand is for the destination register.
• The right-source operand is a memory location where address is contained in register (register-indirect addressing).

The STR Instruction

• This operator copies register content to memory.
• The left operand is the source register.
• The right destination operand is a memory location whose address is contained in the indirect register.

Data Alignment Constraints

• Access of 32-bit operand from memory must adhere to data alignment constraints.
• 4-byte data that’s read/written to memory must start at an address with multiples of 4.
• Effects of non-aligned memory access lead to performance degradation.

Register Indirect With Offset

• The effective address (EA) in memory is computed with a specific offset value and added to indirect register.
• Base Plus Offset addressing does not change indirect register's content.
• Offset value can allow array element to be retrieved with base RO address.

Accessing Array Elements:

• Base-plus offset is used to access array elements where the index during coding is known.
• Base offset of array i is initialized into register R2.
• Register R1 is used to load a value of 7.
• Values of 7 are stored within the i[0], i[4] addresses, using respective 0, 16 offsets of register R2.

Register Indirect with Index Register:

• The content of index register is added to the indirect register to compute EA.
• Base Plus Index Register does not change base register's content.
• Modifiable index value allows different array elements to be retrieved using a base address during program execution.

Clearing All Array Elements:

• Base plus index register is used to access each array element in turn:
  • The base array i address in register R2 is initialized.
  • Value 0 is loaded into index register R0 and R1.
  • R0 stores 0 in i[n] using R1's current index value, plus base address in R2.
  • Index is incremented by 4, the size of each of integer element in the array.

Summary

• Register indirect (LDR, STR operators) provides access to memory operands.
• There are two versions using base address which can use offset, or an index register
• Base register contents after execution do not change.
• Given the base address of an array, register indirect is useful for accessing the array's contents.
• Use base plus offset if array element position is known during coding.
• Use base plus index if array element position is computed during run time.

Register Indirect with Autoindexing Feature

• Autoindexing allows the indirect register to be modified/modified.
• The indirect register content should be modified during execution.
• Autoindexing allows efficient access to consecutive array elements

Explore benefits of assembly-level coding and ARM architecture. Covers addressing modes, MOV instructions, and data alignment. Understand register direct addressing and its optimization.