Microprocessor Handout 1 Prelim

• A microprocessor executes instructions at a very high speed
• It has five basic components: the arithmetic logic unit (ALU), control unit (CU), registers, buses, and a timing unit

Instruction Set Architecture Classification

• Microprocessor architecture is classified based on instruction set architecture

Complexity-Based Classification

• Complexity-based classification measures based on the complexity of instructions
• Complex Instruction Set Computers (CISC) perform multiple operations in one instruction
• CISC architecture advantage: single complex instruction performs multiple operations, many instructions can access the memory
• Complex instructions need many clock cycles to complete
• Reduced Instruction Set Computers (RISC) are suited when the processor speed matches memories, so the penalty for fetching is reduced

Instruction Operand-Based Classification

• Instructions in assembly language programs have multiple operand types
• Memory-memory ISA allows more than one operand of most instructions in memory
• Register-memory ISA allows one operand of an instruction to be specified in memory and the other in the CPU register
• Register-register ISA (or load-store architecture) does not allow most instructions to directly access memory

Memory Interface-Based Architecture Classification

• The Von Neumann architecture uses a common bus for both code and data memory
• With Von Neumann, either an instruction is fetched or data is read/written during each memory access cycle
• The Harvard architecture uses separate buses for code and data memories, allowing simultaneous access

Software Sub-Systems

• An operating system (OS) manages the microprocessor, memory, I/O devices, and other resources
• OS manages these resources with the hardware architecture-dependent OS components
• Device drivers allow the OS to communicate with hardware devices
• A software library is a collection of function calls developed for a specific job
• Applications are one or more programs designed to perform operations for a specific application requirement

Software Development Tools

• Software development tools convert user programs into executables that the microprocessor can interpret and execute

Compilation Process

• Assemblers convert assembly language programs to machine code
• Assembly language programs referred to as low-level
• Compilers convert high-level language programs to machine code
• Compilation converts a user program to machine code with a compiler or assembler

Building an Executable Using a Linker

• A linker constructs an executable by combining object codes from user program files
• During linking, the linker decides the locations (addresses) of different object codes and data segments
• Linkers can use lists of filed and are leveraged by debugging tools
• Static linking involves using libraries when building an executable
• Dynamic link libraries (DLL) are not used when building the executable, but while running

Software-Only Methods

• Software simulators simulate the instruction set and I/O behavior of a target microcontroller, running on an independent computer hardware platform
• Monitors reside in microcontroller memory that downloads code, executes it, sets breakpoints, and visualizes/modifies memory

Software-Hardware Debugging Tools

Burn and Learn

• The burn and learn method is conventional for non-complex embedded system development
• With burn and learn, code is written/modified, burned to the microcontroller, then run (reset) and observed
• In-circuit emulators (ICE) are small hardware tools connected to the targeted microcontroller for in-depth debugging
• In-circuit debuggers (ICD) are small hardware tools that debug the targeted microcontroller in real-time

Bus Architecture

• A bus is a common pathway for information flow between computer components
• Data buses carry data between components and are unidirectional for I/O devices, bi-directional for memory and CPU
• Data buses typically connect components internally or externally with wires
• Parallel buses transfer several data bits at the same time via typically 8, 16, 32, or 64 data lines
• (Ex: ISA, PCI, VESA, and EISA)
• Serial bus transfers data bits of the same byte/word using one data line
• (Ex: USB and IEEE 1394)
• Control buses carry control signals, unidirectional from the CPU used for controlling components
• Data communication requires established bus protocols that involve data bus width, transfer size, protocols, and clocking
  • Synchronous buses synchronize operations via a clock signal derived from the (slower) computer system clock
  • Asynchronous buses lack a system clock, using handshaking for data transmission
• Bus arbitration: a bus master initiates data transfers in a computer system and is either a DMA controller or a processor
  • Centralized arbitration: a single hardware device (processor or arbiter) controls the required arbitration
  • Daisy chaining is a simple, cheaper method where all the masters use the same line for making bus requests Polling use a controller to generate address lines for the master
  • Independent request has its bus request and grant; the built-in priority decoder selects the highest priority requests and asserts the system
  • Distributed arbitration: each module may claim the bus; all modules have their control logic to manage present buses
• Address buses carry a memory address, a numerical value used for identifying a memory location
  • Used by the CPU or DMA to locate the physical address and communicate read/write commands
  • All address buses are read/written by the CPU or DMA in the form of bits
  • (eg: 32-bit address bus: 4 gibibytes of memory space)

Tristate Logic

• Tristate logic is used in electronic circuits where a third state (Hi-Z) is added to the original logic states
  • Aside from A and Z terminals, the Enable terminal acts as a selector that blocks out unused circuits
  • It can be thought of as an input controlled switch

Characteristics of Tristate Logic in Computer Buses

• Allows multiple circuits to share the same output/bus lines if they cannot listen to more than one device/circuit at a time
  • The processor controls device bus access by setting the address on the address bus
  • Only one tristate device can use the bus at a time
  • Unused devices are disconnected and set to high impedance (Hi-Z)
  • Tristate devices respond to address bus
  • When disconnected other devices can share the same data bus line