Microprocessor Instruction Set
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Questions and Answers

What is the opcode for the instruction ADD M?

  • C6
  • 86 (correct)
  • 3E
  • 78

    • What is the opcode for the instruction MVI A, 7FH?

  • 86
  • C6
  • 78
  • 3E (correct)

    • What is the opcode for the instruction JMP 9050H?

  • 3A
  • 78
  • C3 (correct)
  • 86

    • What is the opcode for the instruction LDA 8850H?

    <p>3A</p> Signup and view all the answers

    What is the size of each RAM chip in the IC 6116?

    <p>2 K x 8</p> Signup and view all the answers

    What is the opcode for the instruction MOV A, B?

    <p>78</p> Signup and view all the answers

    How many address lines does the IC 6116 have?

    <p>11</p> Signup and view all the answers

    What is the opcode for the instruction ADI 0FH?

    <p>C6</p> Signup and view all the answers

    What is the machine code for the instruction ADD M?

    <p>86</p> Signup and view all the answers

    What is the purpose of the 74LS138 decoder in the interfacing of IC 6116 RAM chips?

    <p>To select the correct RAM chip based on the address signals</p> Signup and view all the answers

    What is the machine code for the instruction MVI A, 7FH?

    <p>3E 7F</p> Signup and view all the answers

    What is the address range for RAM chip 1 in the IC 6116?

    <p>8000H - 87FFH</p> Signup and view all the answers

    What is the purpose of the IOR and IOW control signals in peripheral mapped I/O interfacing?

    <p>To activate input and output devices</p> Signup and view all the answers

    What is the instruction used to access an output device in peripheral mapped I/O interfacing?

    <p>OUT</p> Signup and view all the answers

    What is the purpose of the IO/M signal in peripheral mapped I/O interfacing?

    <p>To differentiate between I/O and memory operations</p> Signup and view all the answers

    What is the advantage of using peripheral mapped I/O interfacing?

    <p>It provides a separate address space for I/O devices</p> Signup and view all the answers

    What is the interrupt type of the NMI interrupt?

    <p>2</p> Signup and view all the answers

    What is the use of the IRET instruction?

    <p>To return from an interrupt processing routine</p> Signup and view all the answers

    What is the purpose of the INTO instruction?

    <p>To generate an interrupt on overflow</p> Signup and view all the answers

    What is the type of the single-step interrupt?

    <p>1</p> Signup and view all the answers

    What is the purpose of the INT instruction?

    <p>To generate a software interrupt</p> Signup and view all the answers

    What is the effect of setting the TF flag?

    <p>It generates a single-step interrupt</p> Signup and view all the answers

    What is the type of the Divide Error interrupt?

    <p>0</p> Signup and view all the answers

    What is the purpose of the STI instruction?

    <p>To enable maskable interrupts</p> Signup and view all the answers

    Study Notes

    Instruction Set

    • One byte instructions:
      • Opcode: MOV, Operand: A, B, Machine code/Hex code: 78
      • Opcode: ADD, Operand: M, Machine code/Hex code: 86
    • Two byte instructions:
      • Opcode: MVI, Operand: A, 7FH, Machine code/Hex code: 3E, 7F
      • Opcode: ADI, Operand: 0FH, Machine code/Hex code: C6, 0F
    • Three byte instructions:
      • Opcode: JMP, Operand: 9050H, Machine code/Hex code: C3, 50, 90
      • Opcode: LDA, Operand: 8850H, Machine code/Hex code: 3A, 50, 88

    Addressing Modes

    • Immediate addressing
    • Memory direct addressing
    • Register direct addressing
    • Indirect addressing
    • Specification of IC 6116:
      • 2 K x 8 RAM
      • 2 KB = 211 bytes
      • 11 address lines

    Interfacing

    • 6116 chip address range: 8000H - 87FFH (chip 1) and 9000H - 97FFH (chip 2)
    • Interfacing with 8085 and 74LS138 decoder:
      • A0 – A10 lines of 8085 connected to 11 address lines of RAM chips
      • Three address lines of 8085 connected to select inputs (C, B, and A) of decoder
      • Enable inputs of decoder connected to remaining lines of 8085

    Peripheral Mapped I/O Interfacing

    • I/O devices treated differently from memory chips
    • Control signals: I/O read (IOR) and I/O write (IOW)
    • Generation of IOR and IOW signals shown in Fig. 20
    • IN instruction for accessing input device
    • OUT instruction for accessing output device

    Addressing Modes (continued)

    • Based Indexed: contents of base register (BX or BP) + index register (SI or DI) = pointer to location
    • Based Indexed with displacement: base register + index register + 8-bit or 16-bit instruction operand = pointer to location

    Interrupts

    • INTR: maskable hardware interrupt
    • NMI: non-maskable interrupt
    • Software interrupts: INT, INTO, and single-step interrupt
    • Interrupt types:
      • 0: Divide Error
      • 1: Single-step interrupt
      • 2: NMI
      • 3: Breakpoint interrupt
      • 6: Unused opcode
      • 7: Escape opcode
    • Interrupt processing: store FLAGS register, disable further interrupts, fetch interrupt type, and jump to interrupt processing routine

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    Description

    This quiz covers examples of one-byte and two-byte instructions in microprocessor programming, including opcodes, operands, and machine code.

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