36 Questions
used when one unit is sending address info(location) of data residing in memory to another unit
. Address Bus
Send IAC contents to MAR perform Memory Read Operation and get the instruction
Instruction Fetch
special purpose, high-speed temporary memory units used by processor holding data
Register
science of selecting and interconnecting hardware components to create computer that meet functional, performance and cost goals
Computer organization and architecture
rate which processor process info and measured in millions cycle per second(Megahertz)
Clock speed
any peripheral used to provide data and control signals to information processing system such as computer or other information appliance
Input Device
fastest cache and usually comes within processor chip istelf. Range from 8KB to 64KB. Uses high-speed SRAM
L1 cache
dOnly Memory (EPROM) erased by exposure to strong uultraviolet light then rewritten with process that again needs higher than usual voltage applied
Erasable Programmable Read Only Memory (EPROM)
provide location of data(in register) to be fetched from memory to address bus and data carries required data to processor
processor
brain of computer. Bus master decides who should control bus when more than one unit wants bus at same time
CPU
Instruction fetched and executed by control unit one by one.
Instruction cycle
Determine operand address
. Operand Address Calculations
interconnects processor, memory and I/O devices
system bus
contains electronic circuits necessary to perform Arithmetic and logical operations
- Arithmetic Logic Unit
not found nowadays as functuion is replaced by L2. Found on motherboard rather tha processor. Kept between Ram and L2.
- L3 cache
piece of computer hardware used to communicate the results of processed data to user
Output device
written to programmed via special device(PROM Programmer)
- Programmable Read-Only Memory (PROM)
Fetch operands one by one, from Memory or form Registers and supply operands to ALU
- Operand Fetch
responsible for directing & coordinating computer system activities. Does not execute instructions. It tells other part of computer what to do. Determines movement between main memory & arithmetic logic unit as well as control signals between CPU and I/O
- Control Unit
similar semiconducor to EPROM, but allows its entire contents to be electrically erased, then rewritten electrically, so they need not be removed from computer
- Electrically Erasable Programmable Read-Only Memory
piece of very fast memory made from high-speed static RAM that reduces the access time of data. Very expensive and generally incorporated in processor, where valuable data and program segments are kept
Cache
comes between L1 and RAM and bigger than primary cache
- L2 cache
rate which processor process info and measured in millions cycle per second(Megahertz)
Clock speed
responsible for making CPU/ memory and I/O work together as functional system. Determine instruction according tooperation type(Read or Write)
Control Bus
Analyze the OPCODE and determine type of instructions
- Instruction Decode
set of wires used for interconnection of different units of a computer system.
System bus
consists instruction and data
Computer program
Modern type of EEPROM. Use on transistor per memory cell and come in capacities ranging from 1MB to 32GB. Read time smaller(tens of nonseconds) compared write time(tens of microseconds)
Flash Memory
the less Number of hertz , the faster
False
larger bus width, the faster. The grater amount of data can travel on it in given amount of time
True
speed of computer system
Processor speed
used when unit is sending data, instruction/ command code to some other units
data bus
hold bi-directional relationship with control and data bus
⚪processor and memory units
data stored can't modified. Can modify only slowly. Mainly used to distribute. Random access and Non-volatile.instructions build into electronic circuits of chip(firmware)
Read Only Memory (ROM)
commuication with processor and memory is unidirectional
⚪address bus
Do the required or logical operation for instruction
Encode
Study Notes
Computer Architecture and Memory
- Memory Address Register (MAR) receives IAC contents and performs a Memory Read Operation to fetch an instruction.
- The science of selecting and interconnecting hardware components to create a computer that meets functional, performance, and cost goals is known as computer architecture.
- The processor's speed is measured in millions of cycles per second (Megahertz).
Cache Memory
- Level 1 (L1) cache is the fastest cache, usually located within the processor chip, and ranges from 8KB to 64KB in size. It uses high-speed SRAM.
- Level 2 (L2) cache is larger than L1 cache and is located between the primary cache and RAM.
Input/Output (I/O) Devices
- Any peripheral device that provides data and control signals to an information processing system, such as a computer or other information appliance, is an I/O device.
- The communication between the processor and I/O devices is unidirectional.
Memory Types
- EPROM (Erasable Programmable Read-Only Memory) is erased by exposure to strong ultraviolet light and then rewritten with a process that requires higher-than-usual voltage applied.
- PROM (Programmable Read-Only Memory) is written to and programmed via a special device (PROM Programmer).
- EEPROM (Electrically Erasable Programmable Read-Only Memory) is similar to EPROM, but allows its entire contents to be electrically erased and rewritten, so they do not need to be removed from the computer.
- Flash memory is a modern type of EEPROM, using one transistor per memory cell, and comes in capacities ranging from 1MB to 32GB.
Bus and Interconnects
- The bus is a set of wires used for interconnection of different units of a computer system, consisting of instruction and data buses.
- The bus width determines the speed of the computer system, with a larger bus width allowing for more data to travel on it in a given amount of time.
- The control unit is responsible for directing and coordinating computer system activities, determining movement between main memory and the arithmetic logic unit, as well as control signals between the CPU and I/O.
Control Unit and Processor
- The control unit is the brain of the computer, deciding who should control the bus when more than one unit wants to use it at the same time.
- The control unit is responsible for making the CPU, memory, and I/O work together as a functional system.
- The processor speed is measured in millions of cycles per second (Megahertz).
- The Arithmetic Logic Unit (ALU) performs the required or logical operation for an instruction.
Instruction Cycle
- The instruction cycle involves fetching instructions one by one, determining the operand address, and executing the instruction.
- The control unit analyzes the opcode and determines the type of instruction.
- Fetch operands one by one, from memory or from registers, and supply operands to the ALU.
Memory Addressing Quiz: Test your knowledge on the process of sending address information from one unit to another in order to access data residing in memory.
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