LPC 2148 Peripherals Quiz
37 Questions
0 Views

Choose a study mode

Play Quiz
Study Flashcards
Spaced Repetition
Chat to lesson

Podcast

Play an AI-generated podcast conversation about this lesson

Questions and Answers

What effect does setting BURST to 1 have on the function of the ADC?

  • The ADC will only convert if the input voltage is above a certain threshold.
  • The ADC requires a manual start for each conversion.
  • The ADC will reduce the clock cycles needed for conversion.
  • The ADC enters burst mode, continuously converting analog signals. (correct)
  • What must the START bits be set to for the ADC to begin conversions in burst mode?

  • 001
  • 100
  • 000 (correct)
  • 111
  • What does the CLKS field determine in burst mode operations of the ADC?

  • The sampling rate of the selected analog input.
  • The maximum input voltage the ADC can handle.
  • The number of clocks used for each conversion and accuracy. (correct)
  • The specific analog channels that can be converted.
  • Which of the following combinations refers to the least number of clocks and bits for a conversion in burst mode?

    <p>011 - 9 clocks / 8 bits</p> Signup and view all the answers

    What is the step size of the smallest change in analog voltage for a 10-bit ADC?

    <p>3.2 mV</p> Signup and view all the answers

    What is the primary function of a GPIO pin?

    <p>To configure as input or output at runtime</p> Signup and view all the answers

    How many pins of PORT0 in LPC2148 can be configured as general-purpose input or output?

    <p>28</p> Signup and view all the answers

    Which of the following pins in PORT0 is configured as general-purpose output only?

    <p>P0.31</p> Signup and view all the answers

    Which register is used to configure PORT0 pins P0.0 to P0.15?

    <p>PINSEL0</p> Signup and view all the answers

    How many usable pins does PORT1 in LPC2148 have for general-purpose input or output?

    <p>16</p> Signup and view all the answers

    What is the role of the Pin Function Select Registers (PINSEL)?

    <p>To select or configure specific pin functionality</p> Signup and view all the answers

    What alternate function can P0.0 be configured for?

    <p>UART0 Transmit (TXD)</p> Signup and view all the answers

    Which of the following statements is true concerning reserved pins on PORT0?

    <p>Some pins in PORT0 are not available for use.</p> Signup and view all the answers

    What happens when a bit is set to ‘0’ in GPIO configuration?

    <p>The corresponding pin is configured as an input pin.</p> Signup and view all the answers

    What is the role of the IOxSET register in GPIO?

    <p>To make specific pins HIGH.</p> Signup and view all the answers

    Which statement best describes the IOxCLR register?

    <p>It clears a pin by writing a one to the specific bit.</p> Signup and view all the answers

    What should be done to avoid writing to the wrong pin in the IOxPIN register?

    <p>Use masking to ensure the write affects the desired pin.</p> Signup and view all the answers

    What do bits 7:0 in the AD0CR register do?

    <p>They select the ADC0 channel as an analog input.</p> Signup and view all the answers

    What does setting a bit to ‘1’ in the IOxCLR register accomplish?

    <p>It turns that pin LOW.</p> Signup and view all the answers

    To which ADC module does x=1 correspond?

    <p>ADC1</p> Signup and view all the answers

    In software-controlled mode, how many of the SEL bits should be set to 1 at a time?

    <p>One SEL bit should be set to 1.</p> Signup and view all the answers

    What function does bit 7 (10000000) serve in the ADC?

    <p>Selects AD0.7 channel as analog input</p> Signup and view all the answers

    What is the maximum allowable clock rate for the ADC according to the provided information?

    <p>4.5 MHz</p> Signup and view all the answers

    How is the PCLK derived from the CCLK in the ADC configuration?

    <p>It is divided based on the value of y</p> Signup and view all the answers

    What does a CLKDIV value of 0000 1101 represent in the ADC?

    <p>135 in decimal, adjusted from 145</p> Signup and view all the answers

    What happens when BURST is set to 0 in the LPC2148 ADC?

    <p>The ADC requires manual triggering for every conversion</p> Signup and view all the answers

    In the LPC2148 ADC configuration, what is added to the CLKDIV value to prevent division by zero?

    <p>1</p> Signup and view all the answers

    Which of the following is true about the ADC clock derived from the APB clock?

    <p>It must be less than or equal to 4.5 MHz</p> Signup and view all the answers

    If PCLK is set to 30 MHz, what should be the value of y in the VPB DIV block?

    <p>2</p> Signup and view all the answers

    What voltage change is required for a transition to the next digital output value?

    <p>3.2 mv</p> Signup and view all the answers

    What does Bit 21 of the ADC register indicate?

    <p>ADC is in Power Down mode</p> Signup and view all the answers

    What does the START field do when BURST bit is set to 0?

    <p>Controls whether A/D conversion starts</p> Signup and view all the answers

    What range of values can be found in the RESULT field of the ADxGDR when the DONE bit is set to 1?

    <p>0 to 1023</p> Signup and view all the answers

    When the EDGE bit is set to 0, what type of event does the ADC start conversion on?

    <p>Rising edge</p> Signup and view all the answers

    Which of the following indicates that the ADC is operational?

    <p>Bit 21</p> Signup and view all the answers

    What happens when the START field is set to 000?

    <p>Indicates no conversion start</p> Signup and view all the answers

    Which start mode corresponds to the START field value of 100?

    <p>Start conversion when an edge on MAT0.1 pin occurs</p> Signup and view all the answers

    Study Notes

    General Purpose Input and Output (GPIO)

    • GPIO pins on an integrated circuit can serve as either input or output, configurable during runtime.
    • LPC2148 features two 32-bit GPIO ports: PORT0 and PORT1.

    PORT0

    • PORT0 has 32 pins; 28 are configurable as general-purpose input/output.
    • Pin P0.31 is designated for general-purpose output only.
    • Pins P0.24, P0.26, and P0.27 are reserved and not available for use.

    PORT1

    • PORT1 also comprises 32 pins, but only pins P1.16 to P1.31 are usable for general-purpose I/O.
    • Most pins on both PORT0 and PORT1 have alternate functions (e.g., P0.0 as TXD for UART0 or PWM1).

    Pin Function Select Registers (PINSEL)

    • There are three 32-bit PINSEL registers for configuring port functionalities:
      • PINSEL0: Configures PORT0 pins P0.0 to P0.15.
      • PINSEL1: Configures PORT0 pins P0.16 to P0.31.
      • PINSEL2: Configures PORT1 pins P1.16 to P1.31.
    • A bit set to ‘0’ within PINSEL configures the respective pin as an input.

    GPIO Control Registers

    • IOxSET: This register sets specified PORT pins HIGH.
    • IOxCLR: This register sets specified PORT pins LOW.
    • IOxPIN: This register is used to read/write the current values of PORT pins with masking for specific pins.

    Analog to Digital Converter (ADC)

    • ADxCR: The 32-bit ADC control register where ‘x’ indicates the ADC module (0 or 1).
    • ADC0 channel selection is made through bits 7:0 of AD0CR; only one bit should be high at any time.

    Clock Division

    • The ADC clock should not exceed 4.5MHz, derived from dividing the APB clock (PCLK).
    • PCLK can be set to 60MHz or 30MHz, depending on division factor settings in the VPB DIV block.

    ADC Operation Modes

    • Manual Triggering: When BURST = 0, the ADC needs user input to initiate each conversion.
    • Burst Mode: When BURST = 1, the ADC continuously converts selected analog inputs without manual intervention.

    ADC Conversion Parameters

    • CLKS bits determine the number of clocks needed for conversions and the resolution in bits.
    • Various configurations allow for different clock and bit resolution settings for analog signals.

    Additional ADC Control Bits

    • PDN: Determines if the ADC is in power down mode (0) or operational (1).
    • START bits control initiation conditions for A/D conversions based on user settings or external signals.
    • EDGE: Dictates whether the conversion starts on a rising or falling edge of a signal.

    Global Data Register

    • ADxGDR: This 32-bit register indicates the result of the latest conversion and includes a DONE bit, which signals conversion completion.
    • Bits 15:6 of ADxGDR contain the 10-bit result of the conversion, representing values from 0 to 1023, depending on input voltage relative to VREF.

    Studying That Suits You

    Use AI to generate personalized quizzes and flashcards to suit your learning preferences.

    Quiz Team

    Related Documents

    LPC 2148 Peripherals PDF

    Description

    Test your knowledge on the peripherals of the LPC 2148 microcontroller. This quiz covers essential concepts such as general-purpose input/output (GPIO) and its applications. Perfect for electronics and communication engineering students.

    More Like This

    LCSW vs. LPC Quiz
    10 questions

    LCSW vs. LPC Quiz

    BestKnownAphorism6540 avatar
    BestKnownAphorism6540
    Texas LPC Jurisprudence Exam Flashcards
    99 questions
    ADC - LPC2148 Overview
    5 questions

    ADC - LPC2148 Overview

    EloquentBildungsroman5802 avatar
    EloquentBildungsroman5802
    Use Quizgecko on...
    Browser
    Browser