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Questions and Answers
What effect does setting BURST to 1 have on the function of the ADC?
What effect does setting BURST to 1 have on the function of the ADC?
- The ADC will only convert if the input voltage is above a certain threshold.
- The ADC requires a manual start for each conversion.
- The ADC will reduce the clock cycles needed for conversion.
- The ADC enters burst mode, continuously converting analog signals. (correct)
What must the START bits be set to for the ADC to begin conversions in burst mode?
What must the START bits be set to for the ADC to begin conversions in burst mode?
- 001
- 100
- 000 (correct)
- 111
What does the CLKS field determine in burst mode operations of the ADC?
What does the CLKS field determine in burst mode operations of the ADC?
- The sampling rate of the selected analog input.
- The maximum input voltage the ADC can handle.
- The number of clocks used for each conversion and accuracy. (correct)
- The specific analog channels that can be converted.
Which of the following combinations refers to the least number of clocks and bits for a conversion in burst mode?
Which of the following combinations refers to the least number of clocks and bits for a conversion in burst mode?
What is the step size of the smallest change in analog voltage for a 10-bit ADC?
What is the step size of the smallest change in analog voltage for a 10-bit ADC?
What is the primary function of a GPIO pin?
What is the primary function of a GPIO pin?
How many pins of PORT0 in LPC2148 can be configured as general-purpose input or output?
How many pins of PORT0 in LPC2148 can be configured as general-purpose input or output?
Which of the following pins in PORT0 is configured as general-purpose output only?
Which of the following pins in PORT0 is configured as general-purpose output only?
Which register is used to configure PORT0 pins P0.0 to P0.15?
Which register is used to configure PORT0 pins P0.0 to P0.15?
How many usable pins does PORT1 in LPC2148 have for general-purpose input or output?
How many usable pins does PORT1 in LPC2148 have for general-purpose input or output?
What is the role of the Pin Function Select Registers (PINSEL)?
What is the role of the Pin Function Select Registers (PINSEL)?
What alternate function can P0.0 be configured for?
What alternate function can P0.0 be configured for?
Which of the following statements is true concerning reserved pins on PORT0?
Which of the following statements is true concerning reserved pins on PORT0?
What happens when a bit is set to ‘0’ in GPIO configuration?
What happens when a bit is set to ‘0’ in GPIO configuration?
What is the role of the IOxSET register in GPIO?
What is the role of the IOxSET register in GPIO?
Which statement best describes the IOxCLR register?
Which statement best describes the IOxCLR register?
What should be done to avoid writing to the wrong pin in the IOxPIN register?
What should be done to avoid writing to the wrong pin in the IOxPIN register?
What do bits 7:0 in the AD0CR register do?
What do bits 7:0 in the AD0CR register do?
What does setting a bit to ‘1’ in the IOxCLR register accomplish?
What does setting a bit to ‘1’ in the IOxCLR register accomplish?
To which ADC module does x=1 correspond?
To which ADC module does x=1 correspond?
In software-controlled mode, how many of the SEL bits should be set to 1 at a time?
In software-controlled mode, how many of the SEL bits should be set to 1 at a time?
What function does bit 7 (10000000) serve in the ADC?
What function does bit 7 (10000000) serve in the ADC?
What is the maximum allowable clock rate for the ADC according to the provided information?
What is the maximum allowable clock rate for the ADC according to the provided information?
How is the PCLK derived from the CCLK in the ADC configuration?
How is the PCLK derived from the CCLK in the ADC configuration?
What does a CLKDIV value of 0000 1101 represent in the ADC?
What does a CLKDIV value of 0000 1101 represent in the ADC?
What happens when BURST is set to 0 in the LPC2148 ADC?
What happens when BURST is set to 0 in the LPC2148 ADC?
In the LPC2148 ADC configuration, what is added to the CLKDIV value to prevent division by zero?
In the LPC2148 ADC configuration, what is added to the CLKDIV value to prevent division by zero?
Which of the following is true about the ADC clock derived from the APB clock?
Which of the following is true about the ADC clock derived from the APB clock?
If PCLK is set to 30 MHz, what should be the value of y in the VPB DIV block?
If PCLK is set to 30 MHz, what should be the value of y in the VPB DIV block?
What voltage change is required for a transition to the next digital output value?
What voltage change is required for a transition to the next digital output value?
What does Bit 21 of the ADC register indicate?
What does Bit 21 of the ADC register indicate?
What does the START field do when BURST bit is set to 0?
What does the START field do when BURST bit is set to 0?
What range of values can be found in the RESULT field of the ADxGDR when the DONE bit is set to 1?
What range of values can be found in the RESULT field of the ADxGDR when the DONE bit is set to 1?
When the EDGE bit is set to 0, what type of event does the ADC start conversion on?
When the EDGE bit is set to 0, what type of event does the ADC start conversion on?
Which of the following indicates that the ADC is operational?
Which of the following indicates that the ADC is operational?
What happens when the START field is set to 000?
What happens when the START field is set to 000?
Which start mode corresponds to the START field value of 100?
Which start mode corresponds to the START field value of 100?
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Study Notes
General Purpose Input and Output (GPIO)
- GPIO pins on an integrated circuit can serve as either input or output, configurable during runtime.
- LPC2148 features two 32-bit GPIO ports: PORT0 and PORT1.
PORT0
- PORT0 has 32 pins; 28 are configurable as general-purpose input/output.
- Pin P0.31 is designated for general-purpose output only.
- Pins P0.24, P0.26, and P0.27 are reserved and not available for use.
PORT1
- PORT1 also comprises 32 pins, but only pins P1.16 to P1.31 are usable for general-purpose I/O.
- Most pins on both PORT0 and PORT1 have alternate functions (e.g., P0.0 as TXD for UART0 or PWM1).
Pin Function Select Registers (PINSEL)
- There are three 32-bit PINSEL registers for configuring port functionalities:
- PINSEL0: Configures PORT0 pins P0.0 to P0.15.
- PINSEL1: Configures PORT0 pins P0.16 to P0.31.
- PINSEL2: Configures PORT1 pins P1.16 to P1.31.
- A bit set to ‘0’ within PINSEL configures the respective pin as an input.
GPIO Control Registers
- IOxSET: This register sets specified PORT pins HIGH.
- IOxCLR: This register sets specified PORT pins LOW.
- IOxPIN: This register is used to read/write the current values of PORT pins with masking for specific pins.
Analog to Digital Converter (ADC)
- ADxCR: The 32-bit ADC control register where ‘x’ indicates the ADC module (0 or 1).
- ADC0 channel selection is made through bits 7:0 of AD0CR; only one bit should be high at any time.
Clock Division
- The ADC clock should not exceed 4.5MHz, derived from dividing the APB clock (PCLK).
- PCLK can be set to 60MHz or 30MHz, depending on division factor settings in the VPB DIV block.
ADC Operation Modes
- Manual Triggering: When BURST = 0, the ADC needs user input to initiate each conversion.
- Burst Mode: When BURST = 1, the ADC continuously converts selected analog inputs without manual intervention.
ADC Conversion Parameters
- CLKS bits determine the number of clocks needed for conversions and the resolution in bits.
- Various configurations allow for different clock and bit resolution settings for analog signals.
Additional ADC Control Bits
- PDN: Determines if the ADC is in power down mode (0) or operational (1).
- START bits control initiation conditions for A/D conversions based on user settings or external signals.
- EDGE: Dictates whether the conversion starts on a rising or falling edge of a signal.
Global Data Register
- ADxGDR: This 32-bit register indicates the result of the latest conversion and includes a DONE bit, which signals conversion completion.
- Bits 15:6 of ADxGDR contain the 10-bit result of the conversion, representing values from 0 to 1023, depending on input voltage relative to VREF.
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