ISA指令集架构测验与闪卡

Definition: ISA is the interface between the computer's hardware and software, defining the syntax and semantics of the instructions that a computer's processor can execute.
Components:
- Instruction format: defines the layout of an instruction in memory
- Instruction types: e.g., arithmetic, load/store, control flow, etc.
- Operand formats: defines how operands are represented in memory
- Addressing modes: defines how memory addresses are calculated
Types of ISA:
- CISC (Complex Instruction Set Computer): many complex instructions, e.g., x86
- RISC (Reduced Instruction Set Computer): fewer, simpler instructions, e.g., ARM
- VLIW (Very Long Instruction Word): instructions are very long and encode multiple operations

Definition: a technique for improving CPU performance by breaking down the instruction execution process into a series of stages, each of which performs a specific function.
Stages:
1. Instruction Fetch (IF)
2. Instruction Decode (ID)
3. Operand Fetch (OF)
4. Execution (EX)
5. Memory Access (MEM)
6. Write Back (WB)
Pipeline hazards:
- Structural hazards: conflicts between instructions for resources
- Data hazards: dependencies between instructions
- Control hazards: conflicts between instructions for control flow
Techniques to improve pipeline performance:
- Instruction-level parallelism (ILP): execute multiple instructions concurrently
- Pipelining: execute multiple stages of the pipeline concurrently
- Superscalar execution: execute multiple instructions in a single clock cycle

Definition: I/O systems manage the exchange of data between the computer and external devices.
Types of I/O systems:
- Programmed I/O: CPU directly controls I/O operations
- Interrupt-driven I/O: CPU is interrupted by I/O devices to perform I/O operations
- Direct Memory Access (DMA): I/O devices access memory directly without CPU intervention
I/O interfaces:
- Parallel I/O: multiple bits are transmitted simultaneously
- Serial I/O: single bits are transmitted sequentially
- Bus-based I/O: I/O devices share a common bus
I/O management techniques:
- I/O scheduling: prioritize I/O requests to optimize performance
- I/O buffering: use buffers to reduce the overhead of I/O operations

Definition: a multi-level structure for organizing and managing memory, with each level serving as a cache for the next level.
Levels of the memory hierarchy:
1. Registers: small, fast on-chip memory
2. Cache: small, fast memory that stores frequently accessed data
3. Main Memory: larger, slower memory that stores program instructions and data
4. Secondary Storage: non-volatile storage for long-term data storage
Memory hierarchy design goals:
- Minimize memory access time
- Maximize memory bandwidth
- Optimize memory usage

Definition: a mechanism for handling asynchronous events, such as I/O completions or errors, by temporarily suspending normal program execution.
Interrupt types:
- External interrupts: generated by external devices, e.g., keyboard presses
- Internal interrupts: generated by internal events, e.g., divide-by-zero errors
Interrupt handling process:
1. Interrupt detection: CPU detects an interrupt request
2. Interrupt acknowledgement: CPU acknowledges the interrupt request
3. Context saving: CPU saves the current program context
4. Interrupt handling: CPU executes the interrupt handler routine
5. Context restoration: CPU restores the original program context
Interrupt handling techniques:
- Interrupt nesting: allow multiple interrupts to be handled concurrently
- Interrupt prioritization: prioritize interrupts based on their urgency

ISA 定義了電腦硬體和軟體之間的接口，規定了指令的语法和語意
ISA 组成部分：
- 指令格式：定義指令在記憶體中的布局
- 指令類型：例如算術、加載/存儲、控制流等
- 運算元格式：定義運算元在記憶體中的表示方式
- 地址模式：定義記憶體地址的計算方式
ISA 類型：
- CISC（複雜指令集電腦）：許多複雜的指令，例如 x86
- RISC（精簡指令集電腦）：較少、簡單的指令，例如 ARM
- VLIW（非常長指令字）：指令非常長，編碼多個操作

输入/输出系統定義：管理電腦和外部設備之間的數據交換
输入/输出系統類型：
- 程式化输入/输出：CPU 直接控制输入/输出操作
- 中斷驅動输入/输出：CPU受到输入/输出設備的中斷，以執行输入/输出操作
- 直接記憶體存取（DMA）：输入/输出設備直接訪問記憶體，不需要 CPU 干預
输入/输出接口：
- 并行输入/输出：同時傳輸多個位元
- 串行输入/输出：單個位元的序列传输
- 总線基礎输入/输出：输入/输出設備共享同一個总線
输入/输出管理技術：
- 输入/输出排程：優先输入/输出請求以優化性能
- 输入/输出緩衝區：使用緩衝區以減少输入/输出操作的開銷

記憶體層次定義：多層次的結構，以組織和管理記憶體，每個層次充當下一個層次的緩存
記憶體層次級別：
- 註冊器：小、高速的晶片內記憶體
- 快取：小、高速的記憶體，存儲頻繁訪問的數據
- 主記憶體：較大、較慢的記憶體，存儲程序指令和數據
- 次記憶體：非易失性存儲，長期存儲數據
記憶體層次設計目標：
- 最小化記憶體訪問時間
- 最大化記憶體頻寬
- 優化記憶體使用