Field-Effect Transistors (FETs)

Introduction to Field-Effect Transistors (FETs)

• Field-effect transistors (FETs) are three-terminal devices used in a variety of applications
• Bipolar Junction Transistor (BJT) is a current-controlled device
• Junction Field-Effect Transistor (JFET) is a voltage-controlled device
• The current through a BJT is a function of the input current (IB)
• The current through a FET is a function of the input voltage (VGS)
• FETs are unipolar devices, depending solely on electron (n-channel) or hole (p-channel) conduction
• BJTs rely on both holes and electrons for its operation, and are therefore bipolar devices
• FETs have high input impedance
• There are important distinctions between BJT and JFET transistors
  • BJTs are current-controlled devices, while FETs are voltage-controlled devices.
  • BJTs are bipolar devices, while FETs are unipolar devices.
  • BJTs have lower input impedance compared to FETs.
  • BJTs are more sensitive to changes in the applied signal, while FETs exhibit low sensitivity.
  • BJTs exhibit less temperature stability than FETs
  • BJTs are larger in construction compared to FETs

Types of FETs

• Junction field-effect transistor (JFET)
• Metal-oxide-semiconductor field-effect transistor (MOSFET)
• MOSFET transistors are important in design and produce integrated circuits for computers
• MOSFETs are thermally stable, making it popular in computer circuit design

Construction and Characteristics of JFETs

• A JFET is a three-terminal device with one terminal controlling the current between the other two
• The depletion region, void of free carriers, is unable to support conduction
• A JFET's main structure is n-type material, which forms the channel
• The channel is between embedded layers of made of p-type material
• The drain and source are connected to the ends of the n-type channel
• The gate is connected to the two layers of p-type material
• The input circuit (gate to source) of a JFET is reverse biased, that means the device has high input impedance
• The drain is biased with respect to the source; current (ID) flows from drain to source

JFET States and Values

• In all JFETs, ID equals IS
• When VGS = 0 V and VDS is some positive value
  • A positive voltage VDS is applied across the channel
  • The gate is connected directly to the source establishing a VGS of 0
  • Charge flow is uninhibited, limited only by the n-channel resistance between the drain/source
  • Depletion region is wider near the top of both p-type materials
• ID versus VDS for VGS = 0V
  • Initial ID rises rapidly with VDS
  • VDS becomes constant
  • The VDS above which ID becomes constant defines "pinch-off voltage."
  • ID maintains a saturation level (IDSS) with a current of very high density
• Pinch-off (VGS = 0 V, VDS = VP)
  • IDSS is the maximum drain current for a JFET
  • IDSS defined by VGS = 0 V and VDS > VP
  • The pinch-off voltage is specified as VGS(off) on specification sheets.
  • Resistance between drain and source for VDS < Vp is a function of applied voltage VGs
• VGS <0 V
  • VGS is the voltage from gate to source, applying a negative voltage between G and S
  • Saturation level for ID is reduced as VGS becomes more negative
  • Pinch-off voltage drops as VGS becomes more negative, eventually "turning off" the device
• VGS that results in ID = 0 mA is defined by VGS =VP
  • VP is a negative voltage for n-channel devices
  • VP is a positive voltage for p-channel JFETs.
• Voltage-Controlled Resistor
  • Region to the left of the pinch-off locus of a voltage-controlled resistance region for automatic gain control

FET Channels

• In p-channel devices, current directions are reversed
• Applied voltage constitutes positive voltages from gate to source
• VDS notation will result in negative voltages for VDS

FET Symbols and Summary

• The maximum current is defined as IDSS and occurs when VGS =0 V and VDS > VP
• For gate-to-source voltages VGS is less than the pinch-off level, drain current is 0 A ( ID =0A)
• For all levels of VGS between 0 V and the pinch-off level, the current ID will range between IDSS and 0 A
• A similar list can be developed for p-channel JFET

Transfer Characteristics

• For the BJT transistor the output current IC and input controlling current IB were related by beta, which was considered constant for the analysis to be performed
• A linear relationship exists between IC and IB; doubling IB doubles IC
• A linear relationship does not exist between the output and input quantities of a JFET
• The relationship between ID and VGS is defined by Shockley's equation
• The transfer curve can be obtained using Shockley's equation
• When VGS = 0 V, ID = Ipss
• When VGS = VP = -4 V, the drain current is zero milliamperes
• Shockley's Equation can be used to get values of IDss and Vp

Applying Shorthand Methods in Equations

• If VGS is one-half the pinch-off value VP that is ID = IDSS/4 | VGS = VP/2
• General equation for any level of Vp as long as VGs = VP/2.
• Drain current will always be one-fourth of the saturation level IDss as long as the gate-to-source voltage is one-half the pinch-off value
• If ID = IDSS/2 then VGS = 0.3VP|ID = IDSS/2
• Two plot points are defined by
  • IDSS = 12 mA and VGS = 0 V
  • ID = 0 mA and VGS = VP
    • At VGS = Vp/2 = -6 V/2 = -3 V the drain current will be determined by ID = IDSS/4 = 12 mA/4 = 3 mA.
    • At ID = IDSS/2 = 12 mA/2 = 6 mA the gate-to-source voltage is determined by VGs = 0.3Vp = 0.3(-6 V) = -1.8

FET Biasing

• The general relationships applied to the dc analysis of all FET amplifiers are

  • IG = 0 A
  • ID = IS

• For JFETS and depletion-type MOSFETs, Shockley's equation is applied to re- late the input and output quantities

• Coupling capacitors are "open circuits" for dc analysis and low impedances (essentially short circuits) for ac analysis

• Kirchhoff's voltage law application

  • The negative terminal of the battery is connected directly to the defined positive potential of VGS, indicating the contrary polarity between VGS and VGG

• This relationship shows VGS=-VGG

• Use Shockley's equation to find the level of drain current ID controlled controlled by VGS

• ID = IDSS 1 VGS2Vp

An introduction to Field-Effect Transistors (FETs) which are three-terminal devices. FETs are voltage-controlled and unipolar devices with high input impedance. They differ from BJTs as BJTs are current-controlled and bipolar with lower input impedance.