Engineering Semester 1: Integrated Circuits

International & Access Foundation Programmes

• Module: Engineering - Semester 1
• Subject: Electronic & Electrical Engineering
• Topic: Integrated Circuits & Microprocessors

Integrated Circuits

• Defined as a collection of electronic devices (transistors, diodes, resistors) fabricated and interconnected onto a small chip of semiconductor material.
• Silicon (Si) is the most commonly used semiconductor material due to its properties and low cost.
• Other materials used include germanium (Ge) and gallium arsenide (GaAs).
• Integrated circuits use the principle of solid state electronics.

Levels of Integration in Microelectronics

• The advancement of integrated circuits is shown through different levels of integration, each with increasing complexity.
• Small-scale integration (SSI) : 10-50 devices (1959)
• Medium-scale integration (MSI): 50-10³ devices (1960s)
• Large-scale integration (LSI): 10³-10⁴ devices (1970s)
• Very large-scale integration (VLSI): 10⁴-10⁶ devices (1980s)
• Ultra large-scale integration (ULSI): 10⁶-10⁸ devices (1990s)
• Giga-scale integration: 10⁹-10¹⁰ devices (2000s)

Overview of IC Technology

• Integrated circuits (ICs) contain hundreds, thousands, or millions of microscopic electronic devices interconnected on a silicon chip.
• IC chips are typically square or rectangular, with a thickness of ~0.5 mm and sides ranging from 5 to 25 mm.
• Each device on the chip has layers and regions with different electrical properties working together to perform specific functions.

Packaging of ICs

• Protect the chip from damage
• Connect the chip to external circuits.
• This involves attaching the chip to a lead frame and encapsulating it in a package (usually plastic or ceramic).
• The package provides mechanical and environmental protection.
• Includes electrical leads to connect it to external circuits.

Processing Sequence for Silicon-based ICs

• Silicon processing involves reducing sand to pure silicon and shaping it into wafers.
• Integrated circuit fabrication involves steps adding, altering, and removing thin layers in selected regions to create electronic devices.
• Lithography is essential for defining the areas to be processed on the wafer surface.
• Finally, individual chips are encapsulated in the appropriate package after wafer testing.

Clean Rooms

• IC processing requires clean rooms that mimic hospital operating rooms to maintain the necessary cleanliness for microscopic features.
• Cleanliness is critical because the feature sizes on ICs are continually decreasing.
• Class 100 clean rooms are designed to contain less than 100 particles of 0.5 µm or greater per cubic foot of air.
• Class 10 clean rooms have counts less than 10.

Clean Room Classification System

• A numerical classification system that measures the number of particles of a certain size in a cubic foot of air.
• The higher the clean room class, the fewer the particles.
• Class 100 and 10 are common.
• Clean rooms are typically kept at 21°C (70°F) and 45% relative humidity.

Silicon Processing

• Electronic circuits are made primarily from silicon, with an important production sequence.
• Silicon is the main semiconductor material today (over 95% of semiconductor devices).
• The production of silicon substrates is divided into three main steps:
• Production of electronic grade silicon (EGS)
• Crystal growing (e.g. Czochralski process)
• Shaping of Si into wafers

Electronic Grade Silicon

• Silicon is found naturally as silica (e.g., sand) and silicates (e.g., clay).
• Quartzite (very pure SiO2) is used as raw material.
• Electronic-grade silicon (EGS) is ultra-high purity silicon with impurities measured in parts per billion (ppb).

Crystal Growing

• Silicon substrates are single crystals, with their unit cells oriented in a specific direction
• Semiconductor device fabrication requires ultra-high purity silicon.
• Wafer production requires precise cutting in desired planes.
• Czochralski process is commonly used for crystal pulling from a pool of molten silicon.

Wafer Slicing

• Thin diamond-grit saw blades, with internal diameters, are used to cut wafers from ingots.
• Controlled thicknesses (e.g., 0.5-0.7 mm) are important along with parallelism and flatness.
• Blades are thin (~0.33 mm) to minimize kerf (slicing) loss.

Wafer Preparation

• Wafer rims are rounded (contour grinding).
• Surface damage (from slicing) is removed by chemical etching.
• Flat polishing gives higher smoothness for photolithography.
• Final cleaning removes residues and organic films from the wafer’s surface.

Lithography

• ICs have microscopic regions and connections created through lithography steps.
• Steps add, alter, or remove layers on the wafer for the designed circuit pattern.
• Each layer follows a geometric pattern and is transferred onto the wafer surface through the lithography process.

Lithographic Technologies

• Different technologies use various radiation (light, electrons, X-rays, or ions) to transfer patterns from a mask to the wafer surface.
  • Photolithography, Electron lithography, X-Ray lithography, and Ion lithography

Photolithography

• Light (ultraviolet) is used to expose a photoresist coating on the wafer.
  • Masks contain desired patterns
• The exposed parts of the photoresist are hardened, while unexposed parts are removed by development steps.

The Mask in Photolithography

• A flat glass plate with a thin film of opaque material is the mask.
• The mask has patterns transferring circuit design data that is fabricated through lithography.

Photoresist

• Organic polymer that is responsive to light radiation in specific wavelength ranges.
  • Sensitivity causes changes in solubility of the material to specific chemicals.

Contact Printing, Proximity Printing, & Projection Printing

• Different approaches to transferring the mask patterns to resist layers on wafers.
  • Contact: mask in direct contact, high resolution, but quickly wears out.
  • Proximity: mask slightly separated, no mask wear, but slightly lower resolution.
  • Projection: high-quality lenses magnify mask patterns, excellent resolution, non-contact.

Processing Sequence in Photolithography

• The wafer is cleaned to ensure good resist adhesion.
• A liquid resist layer is applied and spun onto the whole wafer.
• Soft bake (heating) removes solvents and hardens the resist.
• Pattern alignment, wafer exposed with the pattern mask (through ultraviolet radiation)
• Developing the resist (exposed areas remaining); dissolving unexposed resist areas.
• Hard bake to enhance resist adhesion and expel volatiles.
• Etching removes unwanted layers.

Resist Coating Removal

• Resist (unwanted coating) removal is done through chemical or plasma etching.

IC Packaging (Part III)

• The wafer is transformed into individual chips.
• Preparation for circuits and harsh environmental conditions outside the clean room.
• Happens after all processing steps.

Design Issues in IC Packaging

• Creating electrical connections with external circuits.
• Protecting chips from environment (humidity, corrosion, temperature, vibration).
• Heat dissipation.
• Performance, reliability, and service life.
• Cost.

Manufacturing Issues in IC Packaging

• Chip separation (cutting wafer into chips).
• Chip connection to the package.
• Encapsulation of the chip.
• Circuit testing (final tests).

Input/Output (I/O) Terminals

– Connecting internal circuits to the outside world.

• More I/O terminals are needed with increased device number.
• Trend of smaller device size and greater device numbers.

IC Package Materials

• Ceramic (Aluminum Oxide): high sealing with dimensional control issues.
• Plastic (epoxies, polyimides, silicones): lower cost.

Two Basic IC Package Styles for Mounting to a Printed Circuit Board (PCB)

• Through-hole mounting (pin-in-hole – PIH): components with pins inserted through holes and soldered to the PCB.
• Surface-mount technology (SMT): components mounted on the PCB surface.

Major IC Package Styles

• Types of IC packages including Dual in-line package (DIP), Square package, Pin grid array (PGA).
• Some have both through-hole and surface-mount styles.

Final Testing

– Final testing procedure upon completion of the encapsulation sequence ensures damaged and faulty circuits are identified and rejected, measuring performance (before being shipped).

Yields in IC Processing

• IC fabrication involves numerous processing steps.
  • Any processing step failure leading to wafer or portion loss.

Wafer Processing is Key to Successful IC Fabrication

• High yields are critical.
• Purest possible materials, latest technologies, and good process control are crucial.
• Efficient clean room and testing processes are necessary and contribute to high yields.

Any Questions?

• End of presentation. This is a question slide.

This quiz covers Integrated Circuits and Microprocessors, focusing on their definitions, materials, and levels of integration. Dive into the advancements of integrated circuits and understand the role of silicon and other semiconductor materials in electronics.