Engineering Module: Integrated Circuits & Microprocessors

<p>Achieving high yields (D)</p> Signup and view all the answers

<p>Heat dissipation (B)</p> Signup and view all the answers

<p>To check for damage and ensure functional performance (C)</p> Signup and view all the answers

<p>Lower robustness compared to ceramics (B)</p> Signup and view all the answers

<p>Pin grid array (PGA) (B)</p> Signup and view all the answers

<p>Encapsulating the chip in a package (B)</p> Signup and view all the answers

<p>Increased complexity of interconnects (A)</p> Signup and view all the answers

<p>Silicon (C)</p> Signup and view all the answers

<p>To minimize contamination affecting microscopic features (C)</p> Signup and view all the answers

<p>Very Large Scale Integration (VLSI) (A)</p> Signup and view all the answers

<p>EGS is the main material for fabricating microelectronic chips. (D)</p> Signup and view all the answers

<p>To protect from environmental damage (C)</p> Signup and view all the answers

<p>To pull a single crystal boule from molten silicon (D)</p> Signup and view all the answers

<p>Number of particles per cubic foot of air (A)</p> Signup and view all the answers

<p>Lithography (C)</p> Signup and view all the answers

<p>They are fabricated into a solid piece of material. (D)</p> Signup and view all the answers

<p>Chemical composition of the saw blade (A)</p> Signup and view all the answers

<p>To provide easier handling and reduce chipping (C)</p> Signup and view all the answers

<p>5 to 25 mm on a side (A)</p> Signup and view all the answers

<p>Fabrication (B)</p> Signup and view all the answers

<p>To remove damaged surfaces from slicing (B)</p> Signup and view all the answers

<p>Electronic grade silicon with ultra-high purity (D)</p> Signup and view all the answers

<p>To prevent contamination of sensitive materials (B)</p> Signup and view all the answers

<p>Transistor (A)</p> Signup and view all the answers

<p>Wafer slicing (B)</p> Signup and view all the answers

<p>Ultra Large Scale Integration (D)</p> Signup and view all the answers

<p>Higher cleanliness levels are crucial for maintaining smaller feature sizes. (A)</p> Signup and view all the answers

<p>To transfer a geometric pattern to the wafer surface (A)</p> Signup and view all the answers

<p>Photolithography (B)</p> Signup and view all the answers

<p>Physical wear on the mask (A)</p> Signup and view all the answers

<p>By eliminating mask wear (C)</p> Signup and view all the answers

<p>It changes the photoresist's solubility based on the mask pattern (B)</p> Signup and view all the answers

<p>To define the geometric pattern for circuit designs (C)</p> Signup and view all the answers

<p>It provides improved resolution and eliminates mask wear (A)</p> Signup and view all the answers

<p>It is oxidized to form SiO2 (B)</p> Signup and view all the answers

<p>To selectively modify the wafer surface using photoresist (A)</p> Signup and view all the answers

<p>Connecting components to external circuits (C)</p> Signup and view all the answers

A controlled environment used for IC fabrication to minimize contamination by foreign particles and airborne contaminants.

Extremely pure polycrystalline silicon, used as the material for making microelectronic chips.

Process of creating a single crystal silicon boule from molten silicon for IC substrates.

Cutting a silicon ingot into individual microchip wafers using a saw with diamond grit.

Process of polishing wafer rims for handling, etching to remove slicing damage, and chemical cleaning to remove contaminants.

Creating microscopic patterns on the wafer by using light or other forms of energy to expose specific areas of the wafer to a photoresist.

A crystal structure where all the atoms are arranged in a repeating, uniform pattern .

Measured by the number of particles per cubic foot of air (e.g., class 100 or class 10).

A large block of silicon, from which wafers are cut.

A method to pull a single crystal boule from molten silicon, used for crystal growing.

Challenges in IC packaging, including electrical connections, environmental protection, heat dissipation, and cost-effectiveness.

Problems in the process of making IC packages, like separating chips, connecting them, encapsulating them, and testing them.

The input/output connection points on an IC package, which link the internal circuits to external devices.

The materials used to make IC packages, categorized as ceramic (e.g., alumina) and plastic.

A method of mounting IC packages to PCBs by inserting leads through holes.

A method of mounting IC packages directly onto the PCB surface using solder.

A common IC package style with leads arranged in two parallel lines.

Verification of IC functionality and performance after packaging to detect defects.

The percentage of functional ICs produced from a wafer, a key factor in manufacturing profitability.

Crucial steps in IC fabrication leading to high-quality chips and profitability.

A collection of electronic components like transistors, diodes, and resistors interconnected on a small semiconductor chip.

A material with conductivity between a conductor and an insulator, allowing controlled flow of electricity.

The most common semiconductor material used in ICs due to its desirable properties and affordability.

A classification system for ICs based on the number of components on a chip, progressing from SSI (small scale) to ULSI (ultra large scale) and beyond.

The earliest level of integration with only a few components on a chip.

A level of integration with thousands to tens of thousands of components on a chip.

The process of protecting the chip from damage by attaching leads and encapsulating it in a protective shell.

A thin, circular plate of silicon used as the base material for IC fabrication.

The complex sequence of steps involved in creating, modifying, and removing thin layers of materials on a wafer to build electronic devices.

Methods used to add, alter, or remove layers on a wafer in specific areas, creating complex circuit designs.

A thin film on a transparent material, containing the circuit pattern, used to selectively block light during exposure.

An organic polymer coating on the wafer, sensitive to light, that changes its solubility based on exposure.

A lithographic technique where the mask is pressed directly against the photoresist for exposure, yielding high resolution.

A variation of contact printing where the mask is slightly separated from the photoresist during exposure, reducing mask wear.

A more advanced method using lenses or mirrors to project the mask pattern onto the wafer, offering higher resolution and non-contact exposure.

Series of steps involving oxidation, photoresist application and exposure, development, etching, and resist removal to transfer the mask pattern onto the wafer.