Computer Organization and Architecture - Chapter 3

Computer Organization and Architecture - Chapter 3

• Top-Level View of Computer Function and Interconnection:
  • Computer components are discussed, along with their functions and interconnection structures. This involves bus interconnection, PCI (Peripheral Component Interconnect) buses, and multiple-bus hierarchies.
  • Key components of the computer function are involved in instruction fetch and execute, interrupts, and input/output (I/O) functionalities.

Program Concept: Hardwired Systems

• Hardwired Systems:
  • Hardwired systems use a fixed configuration of logic components to perform specific computations. These circuits are customized and inflexible.
  • Data is input, processed according to the hardwired logic, and results are produced. This approach is less flexible than software-based systems.

Program Concept: Software Systems

• Software Systems:
  • Software systems use general-purpose hardware that can be reconfigured for various tasks simply by changing the control signals.
  • Instead of rewiring, a new set of commands (the "program") is supplied.
  • This approach allows more flexibility in tasks.

Program Concept: System Components

• Central Processing Unit (CPU):
  • The CPU contains a control unit and an arithmetic logic unit (ALU).
• Input/Output (I/O) Modules:
  • These modules are needed to facilitate the transfer of data and instructions between the CPU and the outside world.
• Main memory:
  • Main memory (RAM) stores both instructions and data needed for computations.

Components and Buses

• Memory Organization:
  • Memory locations are sequentially numbered, in binary, to be readily accessed. This allows an instruction or data to be located using its address.
  • Buses are crucial connections that transfer data between the CPU and memory or I/O modules. These include data buses, address buses, and control buses.

Instruction Cycle

• Instruction Cycle Stages:

  • Fetch: Fetching the next instruction from memory. The program counter (PC) keeps track of where the next instruction is.
  • Execute: Executing the fetched instruction. This might involve memory access, I/O operations, or arithmetic/logic operations.

• Fetch Cycle Details:

  • The PC holds the address of the next instruction to fetch.
  • The processor fetches the instruction from memory.
  • The PC is incremented after each instruction fetch. The IR (Instruction Register) holds the instruction.
  • The processor interprets and performs the actions.

• Execute Cycle Details:

  • Includes data transfer between CPU and memory or I/O, data processing, altering the execution sequence (e.g., jumps), or even multiple combinations of these tasks.

Program Execution Examples

• Details on Hypothetical Machine:
  • Specific (example) instruction formats and operation codes are detailed as applied to accumulator (AC) based systems.
  • The example illustrates how instructions are read from memory and executed. The registers and memory maps are presented.

Instruction Cycle State Diagram

• States: Steps in the instruction cycle can be described as:
  • Instruction address calculation (IAC)
  • Instruction fetch
  • Instruction operation decoding
  • Operand address calculation
  • Operand fetch
  • Data operation
  • Operand store. Multiple operands and return data can be involved at different stages.