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What is the purpose of dividing a 16-bit address into tag bits, block bits, and word bits in a direct-mapped cache?
What is the purpose of dividing a 16-bit address into tag bits, block bits, and word bits in a direct-mapped cache?
- To identify which cache block a memory block should be placed in (correct)
- To indicate the number of words in a cache block
- To determine the size of cache blocks
- To differentiate between read and write operations
What is the main function of a dirty bit in the cache memory?
What is the main function of a dirty bit in the cache memory?
- To manage the cache replacement policy
- To indicate whether a cache block has been modified (correct)
- To determine the number of cache misses
- To track the number of cache hits
What does the write-through protocol involve when updating data in the cache?
What does the write-through protocol involve when updating data in the cache?
- Data is never written to main memory
- Data is written to both the cache and main memory simultaneously (correct)
- Data is updated in the cache after being updated in main memory
- Data is only written to the cache
What is the fundamental idea behind pipelining a CPU?
What is the fundamental idea behind pipelining a CPU?
In a pipelined CPU, what can cause instruction hazards?
In a pipelined CPU, what can cause instruction hazards?
How many clock cycles are typically required to execute each instruction in a 4-stage execution model without using a pipeline?
How many clock cycles are typically required to execute each instruction in a 4-stage execution model without using a pipeline?
What is the primary purpose of overlapping execution stages in pipelining?
What is the primary purpose of overlapping execution stages in pipelining?
What does it mean when the address in the PC is sent to memory to 'fetch' the instruction to be executed?
What does it mean when the address in the PC is sent to memory to 'fetch' the instruction to be executed?
When can the address in the PC be incremented by the CPU?
When can the address in the PC be incremented by the CPU?
In the simple accumulator machine, what do the three most significant bits of a one-byte instruction represent?
In the simple accumulator machine, what do the three most significant bits of a one-byte instruction represent?
What function does the ALU perform in the simple accumulator machine?
What function does the ALU perform in the simple accumulator machine?
How are MAR, MDR, and the read enable line used to read data from memory in the simple accumulator machine?
How are MAR, MDR, and the read enable line used to read data from memory in the simple accumulator machine?
How many clock cycles does each instruction require in the simple accumulator machine?
How many clock cycles does each instruction require in the simple accumulator machine?
Why does the simple accumulator machine only allow sequential execution of instructions?
Why does the simple accumulator machine only allow sequential execution of instructions?
How does the use of a cache improve performance in a computer system?
How does the use of a cache improve performance in a computer system?
What is typically the size relationship between CPU caches and main memory/RAM?
What is typically the size relationship between CPU caches and main memory/RAM?
What is one significant reason why a cache is faster than accessing data from main memory?
What is one significant reason why a cache is faster than accessing data from main memory?
What can be deduced given that there are no branch/jump instructions in the simple accumulator machine?
What can be deduced given that there are no branch/jump instructions in the simple accumulator machine?
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