Computer Architecture: RISC vs CISC

Complex Instruction Set Computer, used in early architectures, with many addressing modes and instructions, resulting in dense code requiring manual optimization.

Reduced Instruction Set Computer, using compact and uniform instructions for efficient pipelining. Although it requires more lines of code, it allows for effective compiler optimization.

A communication endpoint for processes, analogous to a door. Sending processes send messages through the socket, relying on the transport infrastructure to deliver them to the receiving process.

A client-server communication method using TCP sockets. The client initiates contact with a server process, establishing a connection via TCP. The server creates a new socket for each client, allowing for multiple connections.

To determine the best path for data packets from a source host to a destination host through a network of routers, considering factors like cost, speed, and congestion.

A line in SPI communication where the master device sends data to the slave device.

A pin that allows the master device to select and enable specific slave devices in SPI communication.

Both are synchronous serial protocols for embedded applications, but differ in key features.

A system where missing deadlines causes failure, often critical in safety systems like ABS.

A system where missing deadlines results in degraded performance, like video streaming.

A computer architecture where data and instructions share the same memory address space.

A computer architecture where data and instructions have separate memory spaces.

Two network protocols with contrasting characteristics: TCP is reliable and connection-oriented, while UDP is faster and connectionless.

Combining data from multiple sources into one channel for transmission.

Separating data streams received on a single channel into their original sources.

Simultaneous transmission of data between a device and the CPU using multiple wires, allowing faster data transfer.

Sequential transmission of data bits one after the other using a single wire, ideal for long distances.

Data transfer using a shared clock signal synchronized between both sender and receiver.

Data transfer without a shared clock signal, where the receiver uses a separate clock derived from data.

Communication in only one direction, with sender unable to receive data.

Communication where data can be sent and received but only one direction at a time.

Routers operate at the network layer, examining IP addresses and using routing algorithms to forward packets. Switches work at the link layer, examining MAC addresses and learning their forwarding table using flooding.

Wireless networks consist of wireless hosts (laptops, smartphones), a base station connected to the wired network, a wireless link connecting mobiles to the base station, and infrastructure or ad hoc mode for connectivity.

A base station connects the wired network to wireless hosts, acting as a relay for communication between them and the wired network.

Infrastructure mode uses a base station to connect wireless devices to the wired network. Ad hoc mode allows devices to communicate directly without a base station.

Passive scanning involves listening for beacon frames from access points (APs) and sending an Association Request frame to the desired AP.

Active scanning involves broadcasting a Probe Request frame, receiving Probe Response frames from APs, and then sending an Association Request frame.

Priorities determine the order in which interrupts from different devices are handled by the CPU, deciding which interrupt gets processed first.

Vectors specify the code that is executed when a particular type of interrupt occurs. This allows the CPU to respond correctly to different interrupt types.

A mechanism to block interrupts with a lower priority than the current interrupt being handled. This prevents lower-priority interrupts from interrupting higher-priority tasks.

The highest priority interrupt, which cannot be masked and is always handled immediately.

Both are incremented, but a timer is incremented by a periodic signal while a counter is incremented by an asynchronous signal.

A device that monitors system operation and triggers an interrupt if the system malfunctions (e.g., not resetting the watchdog timer).

A two-wire serial communication protocol that simplifies communication between a master device and multiple slave devices.

The device that initiates communication on the I2C bus and controls the data flow. It generates the clock signal and sends data to slaves.

A process to determine which master device will gain control of the I2C bus when multiple masters are connected.

A type of HTTP connection where only one object is sent over a TCP connection before it is closed. Multiple objects require multiple connections.

A type of HTTP connection where multiple objects can be sent over a single TCP connection between the client and server.

The time it takes for a small packet to travel from the client to the server and back.

The time it takes for a non-persistent HTTP request to complete, calculated as 2RTT + file transmission time.

Persistent HTTP improves efficiency by reducing the number of TCP connections, leading to fewer RTTs and less OS overhead.

The layer in the network model responsible for logical communication between hosts.

The layer in the network model responsible for logical communication between processes.

A MAC protocol strategy that divides the communication channel into smaller pieces (time slots, frequency bands, or codes) for exclusive use by different nodes.

A MAC protocol where multiple nodes can access the channel simultaneously, allowing for collisions, which are then handled through mechanisms like retransmission.

A channel partitioning MAC protocol that divides time into fixed-length slots, assigning a slot to each node in a round-robin fashion.