Microprocessor Architecture: CISC and RISC

• A microprocessor executes instructions at a very high speed
• The 5 basic components are: the arithmetic logic unit (ALU), the control unit (CU), registers, buses, and the timing unit

Microprocessor Architecture

• This classification is based on the instruction set architecture

Complexity-Based Classification

• Is measured by the complexity of instructions

Complex Instruction Set Computers (CISC)

• CISC architecture performs multiple operations in a single complex instruction
• Complex instructions require many processor clock cycles to complete
• Most instructions can access memory

Reduced Instruction Set Computers (RISC)

• Suited for scenarios where the processor speed-matches memories which reduces the penalty for instruction or parameter fetching from memory

Instruction Operand-Based Classification

• Instructions in an assembly language program have multiple operand types

Memory-memory

• This type of ISA allows more than one operand of most instructions to be specified in memory

Register-memory

• One operand of an instruction can be specified in memory, while the other operand is in the CPU register

Register-register

• Called load-store architecture
• Direct access to memory is not allowed for most instructions in this ISA

Memory Interface-Based Architecture

Von Neumann Architecture

• Employs a shared bus for both data and code memory, meaning only one operation (instruction fetch or data read/write) can occur during each memory access cycle

Harvard Architecture

• Uses separate buses for accessing both code and data memories, which enables simultaneous instruction and data access

Software Sub-Systems

• Refer to the system software components that support the operation of a computer system

Operating System (OS)

• Manages resources like the microprocessor, memory, and I/O devices using hardware architecture-dependent components

Device Drivers/Drivers

• Allows the OS to communicate with hardware devices

Libraries (Software Library)

• Assemblage of function calls developed to accomplish particular tasks
• Generally made available to the user or other programs

Applications

• One or more programs designed to perform operations for a specific application requirement

Software Development Tools

• Used to convert user programs into executable formats interpretable by the microprocessor

Compilation Process

• In assembly language programs, the code is called low-level programs
• An assembler is needed to convert it to machine code
• High-level language programs code is converted to machine code using a compiler or assembler

Building an Executable Using a Linker

• A linker constructs an executable file by merging different object codes, deciding memory locations for object codes and data segments
• Using libraries at the build time of an executable is referred to as static linking
• Libraries used during runtime and not at building time are called dynamic link libraries (DLL)

Software-Only Methods

Software Simulators

• It is a program that runs on an independent computer hardware platform
• It stimulates the instruction set and the behavior of I/O of the target microcontroller

Monitors

• Used to download/burn the program code in the microcontroller, execute the code, set breakpoints, visualize and modify memory contents or registers

Software-Hardware Debugging Tools

Burn and Learn

• A conventional method used in non-complex embedded system developments
• The program code is written or modified, burned to the microcontroller using a programmer or in-circuit programming capability, and tested to observe the code's functioning

In-Circuit Emulators (ICE)

• A hardware tool which is connected to the targeted microcontroller for in-depth debugging

In-Circuit Debuggers (ICD)

• A hardware tool for debugging the targeted microcontroller in realtime

Bus Architecture

• A bus is a common pathway for information to flow from one component to another

Common Processor Bus Lines

Data Bus

• Carries data between components and is bidirectional for memory and the CPU, and unidirectional for I/O devices

Parallel Bus

• Transfers data bits simultaneously using multiple lines, like ISA, PCI, VESA, and EISA (8, 16, 32, or 64 data lines)

Serial Bus

• Transfers data bits sequentially over a single line
• Examples include USB and IEEE 1394

Control Bus

• Carries control signals from the CU (control unit) to manage all the components
• The bus signals are unidirectional from the CPU to all other components

Bus protocols

• Established for data communication including data bus width, transfer size, clocking, etc

Synchronous Buses

• Its operations are synchronized by a clock signal, generally derived from the system clock (often slower than the master clock)

Asynchronous Buses

• Lack of synchronization between the sender and receiver
• Uses handshaking protocols to properly conduct data transmission

Bus Arbitration

• Occurs when the current bus master relinquishes control to another bus master, such as a DMA controller or a processor

Centralized Arbitration

• A single hardware device (processor or arbiter) manages the required arbitration

Daisy Chaining

• A simple method where all the masters use the same line for making bus requests

Polling Method

• Utilizes a controller to generate address lines for the master

Independent Request

• Each bus has its request and a grant, and the system selects the highest priority requests

Distributed Arbitration

• Each module may claim the bus using its control logic

Address Bus

• Carries a memory address, which is a numerical ID for a memory location
• It is read and written by the CPU or DMA to locate physical addresses and communicate read/write commands
• A 32-bit address bus can address 4 Gibibytes of memory space

Tristate Logic

• It is a logic used in electronic circuits where a third state, the high-impedance state (Hi-Z), is added to the original Logic 1 and Logic 0 states

• Aside from the two (2) terminals (namely A and Z), the third terminal (Enable) acts as a selector that blocks out circuits that are not being used

• It can be thought of as an input-controlled switch with an output that can be electronically turned “ON” or “OFF” through an external "Control" or "Enable" (EN) signal input

Characteristics of a Tristate Logic in Computer Buses

• Tristate Logic is used to allow multiple circuits to share the same output or bus lines, which may not be capable of listening to more than one device or circuit at a time
• The processor controls which device has access to the bus by setting the address on the address bus
• Only one tristate device can use the bus at any time
• The devices not using the bus are disconnected where their outputs are set to have a high impedance (Hi-Z)
• The devices respond to a unique address on the address bus
• When the main tristate device is disconnected, other devices can share/use the same data bus line