(The Morgan Kaufmann Series in Computer Architecture and Design) David A. Patterson, John L. Hennessy - Computer Organization and Design RISC-V Edition_ The Hardware Software Interface-Morgan Kaufmann-102-258-pages-2.pdf

2.2 Operations of the Computer Hardware 69 more primitive one. Our examples are in the C programming language; Section 2.15 shows how these would change for an object-oriented language like Java. By learning how to repre...

2.2 Operations of the Computer Hardware 69 more primitive one. Our examples are in the C programming language; Section 2.15 shows how these would change for an object-oriented language like Java. By learning how to represent instructions, you will also discover the secret of computing: the stored-program concept. Moreover, you will exercise your “foreign stored-program language” skills by writing programs in the language of the computer and running them concept The idea that on the simulator that comes with this book. You will also see the impact of programming instructions and data of many types can be stored languages and compiler optimization on performance. We conclude with a look at the in memory as numbers historical evolution of instruction sets and an overview of other computer dialects. and thus be easy to We reveal our first instruction set a piece at a time, giving the rationale along with change, leading to the the computer structures. This top-down, step-by-step tutorial weaves the components stored-program computer. with their explanations, making the computer’s language more palatable. Figure 2.1 gives a sneak preview of the instruction set covered in this chapter. Elaboration: RISC-V is an open architecture that is controlled by RISC-V International, not a proprietary architecture that is owned by a company like ARM, MIPS, or x86. In 2020, more than 200 companies are members of RISC-V International, and its popularity is growing rapidly. There must certainly be instructions 2.2 Operations of the Computer Hardware for performing the fundamental Every computer must be able to perform arithmetic. The RISC-V assembly arithmetic operations. language notation Burks, Goldstine, and von Neumann, 1946 add a, b, c instructs a computer to add the two variables b and c and to put their sum in a. This notation is rigid in that each RISC-V arithmetic instruction performs only one operation and must always have exactly three variables. For example, suppose we want to place the sum of four variables b, c, d, and e into variable a. (In this section, we are being deliberately vague about what a “variable” is; in the next section, we’ll explain in detail.) The following sequence of instructions adds the four variables: add a, b, c     // The sum of b and c is placed in a add a, a, d     // The sum of b, c, and d is now in a add a, a, e     // The sum of b, c, d, and e is now in a Thus, it takes three instructions to sum the four variables. The words to the right of the double slashes (//) on each line above are comments for the human reader, so the computer ignores them. Note that unlike other programming languages, each line of this language can contain at most one instruction. Another difference from C is that comments always terminate at the end of a line. 70 Chapter 2 Instructions: Language of the Computer FIGURE 2.1 RISC-V assembly language revealed in this chapter. This information is also found in Column 1 of the RISC-V Reference Data Card at the front of this book.  2.2 Operations of the Computer Hardware 71 FIGURE 2.1 (Continued). The natural number of operands for an operation like addition is three: the two numbers being added together and a place to put the sum. Requiring every instruction to have exactly three operands, no more and no less, conforms to the philosophy of keeping the hardware simple: hardware for a variable number of operands is more complicated than hardware for a fixed number. This situation illustrates the first of three underlying principles of hardware design: Design Principle 1: Simplicity favors regularity. We can now show, in the two examples that follow, the relationship of programs written in higher-level programming languages to programs in this more primitive notation. Compiling Two C Assignment Statements into RISC-V EXAMPLE This segment of a C program contains the five variables a, b, c, d, and e. Since Java evolved from C, this example and the next few work for either high-level programming language: a = b + c; d = a − e; The compiler translates from C to RISC-V assembly language instructions. Show the RISC-V code produced by a compiler. ANSWER A RISC-V instruction operates on two source operands and places the result in one destination operand. Hence, the two simple statements above compile directly into these two RISC-V assembly language instructions: add a, b, c sub d, a, e 72 Chapter 2 Instructions: Language of the Computer Compiling a Complex C Assignment into RISC-V EXAMPLE A somewhat complicated statement contains the five variables f, g, h, i, and j: f = (g + h) − (i + j); What might a C compiler produce? The compiler must break this statement into several assembly instructions, ANSWER since only one operation is performed per RISC-V instruction. The first RISC-V instruction calculates the sum of g and h. We must place the result somewhere, so the compiler creates a temporary variable, called t0: add t0, g, h // temporary variable t0 contains g + h Although the next operation is subtract, we need to calculate the sum of i and j before we can subtract. Thus, the second instruction places the sum of i and j in another temporary variable created by the compiler, called t1: add t1, i, j // temporary variable t1 contains i + j Finally, the subtract instruction subtracts the second sum from the first and places the difference in the variable f, completing the compiled code: sub f, t0, t1 // f gets t0 − t1, which is (g + h) − (i + j) Check For a given function, which programming language likely takes the most lines of Yourself code? Put the three representations below in order. 1. Java 2. C 3. RISC-V assembly language Elaboration: To increase portability, Java was originally envisioned as relying on a software interpreter. The instruction set of this interpreter is called Java bytecodes (see Section 2.15), which is quite different from the RISC-V instruction set. To get performance close to the equivalent C program, Java systems today typically compile Java bytecodes into the native instruction sets like RISC-V. Because this compilation is normally done much later than for C programs, such Java compilers are often called Just In Time (JIT) compilers. Section 2.12 shows how JITs are used later than C compilers in the start-up process, and Section 2.13 shows the performance consequences of compiling versus interpreting Java programs.