Lecture - Pattern Transfer and Plasma Processing Theory v4 JWNC Template PDF

Lecture 8 – Pattern Transfer and Theory of Plasma Processing James Grant JWNC Research Engineer in Plasma Processing Re-Cap First seven lectures: Electron beam lithography Photolithography Pattern inspection (microscopy & metrology) Next two lectu...

Lecture 8 – Pattern Transfer and Theory of Plasma Processing James Grant JWNC Research Engineer in Plasma Processing Re-Cap First seven lectures: Electron beam lithography Photolithography Pattern inspection (microscopy & metrology) Next two lectures: Pattern transfer (additive & subtractive) and plasma processing Advanced Plasma Processing Outline of this lecture Pattern Transfer Additive pattern transfer (lift-off) Subtractive pattern transfer Figures of merit Wet etching Plasma (dry) etching What is a plasma? Types of plasma chambers Some basic plasma theory Chemical versus physical etching Mechanisms of anisotropic etching Plasma etching chemistries Challenges of plasma etching Lithography before pattern transfer Lithography used as a means to define regions where you do/do not want your pattern transferred Photons OR Electrons Resist Substrate Substrate Substrate Additive pattern transfer – “Lift-Off” Typically used to transfer metals (e.g. Au, Al, Pt, Pd, W) onto your substrate. Need to generate resist profile conducive for lift-off Lithography Evaporate metal Resist Substrate Substrate Substrate Resist 1 Resist 2 Substrate Substrate Substrate Additive pattern transfer – “Lift-Off” (2) Typically used to transfer metals (e.g. Au, Al, Pt, Pd, W) onto your substrate. Need to generate resist profile conducive for lift-off Evaporate metal Immerse in solvent/agitate Substrate Substrate Substrate Substrate Substrate Substrate Formation of undercut profile Full description is in your project specification, but in brief: 1. Spin S1818 on sample 2. Soak in 1:1 solution of RO water : Microposit developer for 100s 3. Water rinse for 5 minutes 4. Expose in MA6 for 5 seconds 5. Develop 6. An oxygen plasma “resist ash” step is often used after development to make sure that the substrate surface is completely free of residual resist. SEM of undercut profile “developer soak” method Courtesy of Corrie Farmer 300 nm Al deposited SEM of undercut profile bi-layer LOR/S1818 In my experience more reliable than developer soak approach S1818 LOR SEM of metal profile after lift-off The metal does not form a vertical profile Angle is typically 70-75 degrees Metal landing on resist gradually fills in the opening Common Lift-Off Faults Flagging (wing like features which arise from metal sticking to the edge of the resist) Non-removal of metal Non-removal of metal Flags Etch as a means of pattern transfer Simple explanation Lithography Resist Substrate Substrate ETCH Resist/mask removal Etching figures of merit Target material etch rate (ER1) Etch rate of underlying material (ER2) Mask material etch rate (ER3) Ratio ER1/ER2 gives selectivity of target material to underlying material Ratio ER1/ER3 gives selectivity of target material to mask material The critical dimension (CD) is the finished dimension after the etching is complete. e.g. CD has direct impact on transistor performance (threshold voltage) Etch profile (taper angle j) Etching figures of merit (2) CD Mask (ER3) Target Film (ER1) Taper angle Underlying film (ER2) Substrate Taxonomy of etch profile Generally anisotropic desired but not always!!! mask substrate perfectly anisotropic, Sloped or tapered vertical Re-entrant Undercut, lateral etch Microtrenched Foot Notched Faceting of the mask Wet and dry etching Wet etch Plasma (Dry) etch → Takes place in solution → Takes place in a plasma → Typically in a beaker → Low pressure ionised gas → Often involves acids or → Requires a vacuum alkalis → Typically requires dangerous → Care needs to be taken gases → Material is removed by a → Safety precautions are very chemical process important → Material is removed in two ways: Chemically By physical bombardment (sputtering) Wet etching Simplistic view of wet etching resist Before Etch isotropic poor Blocking undercut adhesion After resist Isotropic Etch Wet etching characteristics Advantages: Simple equipment High throughput (batch process) High selectivity Disadvantages: Isotropic etching leads to undercutting Small geometries difficult, etch block caused by surface tension Surface to be etched must be very pure Critical etch time, dimensions change with etch time, bias develops Wet etching substrate preparation In general……… Any residuals of resist can cause the etch to be very rough. This is because etch selectivity is very high in a wet etch. Therefore remove residuals before the etch using an oxygen dry etch, called an “ash. This is standard for many processes where small residuals of resist on the surface would be a problem. Dedicated ashing tools exist in JWNC (Plasmafab 505 asher and TePla ashers) to make this easy. Residual resist layers can be around 20 nm thick Wet versus dry etching Many pros and cons Plasma (Dry) Etch Wet Etch Resist Adhesion Not usually an issue Very important – etches sometimes atack alongthe interface Selectivity You have to be careful about resist Usually very high andnot an issue loss duringthe etch Etchprofile Typicallyanisotropic; vertical profiles Generally eitherisotropic or possible crystallographic Resolution Can be as good as 10 nm or better Generally limited toa few microns Dry (plasma) etching Instead of liquid to etch material we use a plasma A plasma is an ionised gas in which there are approximately the same number of electrons and ions Plasma etching proceeds in three steps: 1. Reactive species (neutral radicals and ions) are generated in the plasma 2. Species are transported and adsorb on the etch target film 3. Reactions take place and etch products created 4. Etch products de-sorb from the film and pumped away Plasma processing (etching only 1 aspect) Plasma etching (Dry etch) RIE (Reactive Ion Etching ICP (Inductively Coupled Plasmas) Plasma deposition PECVD (Plasma enhanced CVD) ICP-CVD ALD (Atomic Layer Deposition) Plasma surface treatment H2, O2, N2 plasma surface modifications Wafer surface passivation What is a plasma? What is plasma? Ionised gas (neutrals plus equal ions & electrons) Negative particles: electrons, negative ions, Cl-, SF6- Positive particles: positive ions, Ar+, He++ Neutral radicals, CF4, N2 Formed & sustained by electric field enable to ionize Te >> Tion ~ Tgas General plasma etch mechanism General Plasma Etch Mechanism 2 Form etchant species 1 Gases in Radicals Ions + 6 3 + 5 4 3 Ions & radicals move towards substrate by diffusion, collision or electric force (DC bias) 4 Ions & radicals stick & migrate on surface for a while 5 Perform chemical reactions & generate by-products 6 Pump out by-products Capacitively coupled plasma General Plasma Etch Gas inlet Mechanism More Strikes Radical molecule electrons Electron gains energy in plasma + Ions accelerated across the sheath Wafer Sheath (electric field) -Vbias (13.56 Ions and radicals react MHz) with materials on wafer To pump RF power ~ Electrons gain energy, strike other molecules, create ions, radicals and more electrons Electrons travel much much faster than ions Produce a negative DC voltage on lower electrode Accelerate positive ions towards electrode Ions & radicals react with substrate by physical bombardment & chemical reactions converting solid to gases pumped away Inductively coupled plasma General Plasma Etch B field Mechanism RF current Coil Induced E field The electrical field of ICP coil is parallel to the plane of ICP coil Electrons follow the oscillating RF current planar of ICP coil and gain energy Accelerated electrons ionize gas in the cylinder and create ions & radicals, which have little directionality ICP’s high ion efficiency creates high density plasma Inductively coupled plasma (2) High density plasma General Plasma High etch rate Etch Separate powers for ICP & electrode Mechanism Wider process window Low process pressure Anisotropy, Uniformity, Cleanliness ↑ Inductive regime: ICP power ↑ DC bias ↓ Low ion bombardment energy Damage ↓ & Selectivity ↑ Gas inlet Strikes molecule More electrons RF powered Inductive coil (13.56 MHz) Radical Electron gains + Ions accelerated energy in plasma across the sheath (acquires negative bias) Wafer Sheath (large electric field) To pump Ions and radicals react with materials on wafer Platen RF power ~ RIE versus ICP ICP CCP (RIE) General Plasma Etch Mechanism ~ ~ One power controls both ICP & bias powers control ion ion density & ion energy density & ion energy separately Substrate part of plasma Substrate NOT in plasma generation region generation region High ion bombardment to Lower ion bombardment to substrate substrate High plasma damage Lower plasma damage Low ionization degree Higher ionization degree 10-6 – 10-3 10-4 – 10-1 Low plasma density Higher plasma density 109 – 1010/cm3 1011 – 1012/cm3 ICP often provides better performance than RIE Plasma vacuum system Gas source Pumping system P, V,  Q S Pumping equation: V(dP/dt) = Q – SP In steady state: Q = SP P = Q/S  = V/S = VP/Q Q: gas flow rate (Torr-liter/sec) (Note: 1 Torr-liter/sec = 79 sccm) S: pumping speed (liter/sec) P: system pressure (Torr) V: system volume (liter)   residence time (sec) of species in vacuum system if V = 20 liter, P = 10 mTorr, Q = 100 sccm,  = VP/Q = 0.158sec ↑ Chemical reaction ↑ Good for selective etch & over etch Gas density and mean free path Gases in plasma system behave more like the ideal gas as pressure reduced, thus the ideal gas law is valid for most plasma processes Gas Density: at 300K & 10mT n = 3.2 x 1014 molecules/cm3 Mean Free Path: (very dependent on gases) for molecular diameter of 0.37nm at 300K at 10mT  = 0.5 cm  >> micro/nano features being etched Gas collisions inside small features can be neglected Transport of material into & out of small features is determined entirely by gas-wall collisions Ionization Theory More e- e- electrons e- e- Molecule Radical + Ion Key Reactions in sustaining a stable plasma Power ↑ Electron energy ↑ Collision rate ↑ Pressure ↑ Collision rate ↑ Mean free path ↓ Flow rate ↑ Residence time ↓ High energy to give enough particle collision Low pressure to increase particle mean free path Energy loss per collision depends on gas and energy Ionization potential depends on gas Chemical versus physical etching Plasma etching is a combination of chemical etching and physical sputtering Depending on bond strength, volatility and other factors, materials tend to be etched more by chemical or by physical effects Chemical Physical High source power High bias power High pressure Low pressure High flow rate High temperature Heavy ions (Ar) Long residence time Key requirements for nanoscale etch High fidelity pattern transfer onto substrate Suitable etch rate for precision or high throughput High selectivity to only etch desired material Anisotropic etch for vertical sidewall profile Good uniformity & repeatability Low plasma-induced damage on wafer structure Low temperature for low-thermal budget wafer They don’t always meet together !!! Decide which ones are key for you !!! Plasma etching gases Almost all dry etch done by halogen-based gases: F, Cl (C2F6, CHF3, C4F8, CF4, SF6, SiCl4, BCl3, Cl2 ….) Easy to be dissociated in plasmas Very reactive in radical or ion forms Form volatile byproducts with materials (Si, Ge, GaN, GaAs, SiO2, SiN, W, WSi, Ti, TiW, TiN, Al…, but not Cu & Co) Other additives in plasmas (O2, N2, H2, NH3, H2O, CO, CH4) have special effects: Ashing resist & polymers Removing or adding sidewall films Preventing metal corrosion Boosting selectivity….. Plasma etching gases (2) Control polymerization through F/C-Ratio F/C-Ratio determined by the gases used (CF4, C2F6, C3F8, C4F8, CHF3, …) Higher F/C-ratio Etching ↑ Lower F/C-ratio Polymerization ↑ Adding H2 consumes F Polymerization ↑ Adding O2 consumes C Etching ↑ Inert gases are very stable and unlikely to participate in chemical reactions Plasma etching chemistry choice Plasma Etching Chemistry Choice Resist Polymers SiN, SiO2, SiON W, TiW, WSi GaAs, Si, Poly-Si, TiN, Ti Al mix mix Cl, Br F O (SiCl4,HBr, (CF4, SF6, C2F6, (O2, N2O, Cl2, BCl3) CHF3, C4F8) H2O) Volatility of compounds Volatility curves for silicon etching (F typically used) Volatility of compounds (2) Volatility curves for gold etching (Cl used) Chemical etching of Au almost impossible at room temperatures Etch reaction dynamics To prevent the isotropic behavior of etch gases & improve anisotropic degree for high fidelity pattern transfer, all of etched sidewalls must be protected from further etching by a passivating or inhibiting layer formed on the sidewalls Surface passivation Use gases which react with wafer material & form involatile barrier layers (SiO2) Freeze volatile reaction products (SiOxFy) at sidewalls by cryogenic wafer cooling Inhibitor deposition Use polymer precursor gases to form physical barrier layers (e.g., C4F8) Erode and redeposit inert mask materials Challenges – high aspect ratio etching H W Lateral shrink >> vertical shrink Aspect Ratio (H/W) ↑ HAR causes three significant effects: Effects caused by the angular dispersion of ions and neutrals due to collisions within the sheath Neutral species are more difficult transport in and out within HAR features ARDE (Aspect Ratio Dependent Etching) Electron shading effect by ions and electrons are increased as sidewalls get closer together Challenges – high aspect ratio etching (2) Effects caused by the angular dispersion of ions and neutrals due to collisions within the sheath Etch rate depends on Ion & neutral interact angle of incident ions with the sidewalls HAR feature etched Faceting profile on top slowly RIE-lag of the etched features Challenges – high aspect ratio etching (3) More difficult transport of etch species & by-products down & up in HAR features Etch species are shadowed by top corners of trench Species have more sidewall collisions within HAR features Low sticking coefficient is desirable to transfer species in & out for HAR features without loss Depend on the types of generated species Often involve polymer on sidewalls Challenges – high aspect ratio etching (4) Increased electron shading effect due to nonuniform charging on etched features as sidewalls get closer Electron charges build up at the upper part of etched features Ions almost vertical on approach but experience a lateral force qE  1/y2 y = lateral distance to the etched sidewall Some ions are reflected to sidewalls Higher % ions are deflected in HAR features Reduce the number of etch species reaching the bottom of the trench Charge effect will be worse if substrate is insulating or electrically isolated like Either balancing currents flow silicon-on-insulator (SOI) OR charges build up more Challenges – charging effect Notch control at SOI interface Use low frequency pulsed RF on low electrode Control ion energy & charging at SiO2 interface to reduce or eliminate the ‘notch’ Notch at the bottom by using high frequency RF Controlled notch by using low frequency pulsed (>3m) RF (110oC and will burn at temperatures between 150- 180oC Challenges – substrate heating/resist reflow/burning (2) Chilling fluid cools wafer Helium gas fills gap between wafer and substrate Challenges – minimising substrate heating In JWNC we rarely do wafer level processing Average substrate size is 1.5 x 1.5 cm This means we need to attach substrate to “carrier wafer” Need to use a thermal conduction compound → Santovac 5 diffusion oil best → Crystal bond 555 HMP wax → Crystal bond 509 wax → Cool grease CGR7018 (has AlN particles in it!) Challenges – dry etching damage Example below for silicon but also prevalent for III-V transistors/photonic components Ion Plasma + High Energy Photon + Charging Fe + + + + + + + + Gate metal - - - Neutral Trap Gate oxide Crystal Defect Gate oxide breakdown Contamination Silicon Substrate Challenges – dry etching damage Example below for silicon but also prevalent for III-V transistors/photonic components Ion Plasma + High Energy Photon + Charging Fe + + + + + + + + Gate metal - - - Neutral Trap Gate oxide Crystal Defect Gate oxide breakdown Contamination Silicon Substrate Conclusion Highlighted three pattern transfer approaches 1. Lift-off 2. Wet etching 3. Plasma (dry etching) Basic plasma theory Types of plasma etching (RIE & ICP) Plasma etching mechanism Plasma etch chemistry choice Challenges of plasma etching Acknowledgements Dr. Haiping Zhou Dr. Corrie Farmer Dr. Muhammad Mirza “Dry Etching Technology for Semiconductors” by Kazuo Nojiri (great book on plasma processing) Back-Up Mixed process for nanoscale etch “Mixed mode” process to etch nanoscale Si features with a plasma containing etch (SF6) & deposition (C4F8) gases simultaneously C4F8 form fluorocarbons deposited on ALL surfaces (Polymerization) The deposit can only be removed by ion physical Resist bombardment collisions Ion velocity is nearly vertical, Silicon there is little ion physical SiO2 bombardment on sidewalls, and the fluorocarbon film Silicon accumulates on sidewalls Tradeoff between selectivity of Si/Resist & Si/SiO2 and anisotropy Mixed process for nanoscale etch (2) SiNWs with widths of (a) 30 nm, (b) 20 nm and (c) 10 nm, etched on STS-ICP at condition: SF6/C4F8 = 20:90 sccm, 8.5 mTorr, 12 W platen power, 600 W ICP power for 3.5 minutes. HSQ resist mask still on the top of the SiNWs. (From Muhammad M. Mirza, Haiping Zhou, Philippe Velha, Xu Li, Kevin E. Docherty, Antonio Samarelli, Gary Ternent, and Douglas J. Paua) Switched process for deep Si etching “Pulsed mode” (Bosch) process uses an etching plasma (SF6) followed immediately by a deposition plasma (C4F8) Use short alternating SF6 & C4F8 process steps SF6 provides the Si etching C4F8 provides the sidewall passivation by means of polymer deposition Room temperature process Require ICP for high density radicals and low ion energy Require ion bombardment to remove polymer from bottom surfaces Switched process for deep Si etching (2) Pulsed Process for Deep Si Etch Deep Si etch ~ 300 m deep & AR ~ 20:1 with scallop sidewall Cryogenic process for deep Si etching Pulsed Process for Deep Si Etch “Mixed mode” process combines etch & passivation steps into a single continuous etch Cryogenic Si etch using SF6 & O2 at ~ –110 °C SiOxFy passivation layer formed on Si surface at cryogenic temperatures < –80 °C SiOxFy passivation layer protects the vertical Si sidewalls while the horizontal Si is etched way When the Si is warmed up to room temperature, the SiOxFy becomes volatile and leaves the Si surface. High mask selectivity and moderate etch rate Smooth sidewalls & profile control Clean process no polymer deposition Cryogenic process for deep Si etching (2) Cryo etched 2µm wide & 10µm deep Si trench Smooth & clean sidewall ER 2-3 µm/min Si : SiO2 > 200:1 Si : PR >100:1 Cryo etched 50nm trench Etch rate ~ 0.5 µm/min Roughness < 10nm Aspect Ratios ~ 10:1 Controllable profile (From OIPT application lab)