EE2C1 Transistor Circuits Lecture 5 MOSFETs PDF

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TU Delft

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MOSFETs transistor circuits electronic engineering electrical engineering

Summary

This document is a lecture on MOSFETs, covering their device structure, physical operation, and I-V characteristics. It's a part of a course on transistor circuits, likely for undergraduate students in electrical or electronic engineering at TU Delft.

Full Transcript

EE2C1 – Transistor Circuits Lecture 5 MOSFETs Lecture programme Signals, Noise Amplifier Models Operational Amplifiers The Diode Small-Signal Modelling The MOSFET MOSFET Amplifiers BJTs and BJT Amplifiers CMOS Digital Logic Digital Design: Power, Spee...

EE2C1 – Transistor Circuits Lecture 5 MOSFETs Lecture programme Signals, Noise Amplifier Models Operational Amplifiers The Diode Small-Signal Modelling The MOSFET MOSFET Amplifiers BJTs and BJT Amplifiers CMOS Digital Logic Digital Design: Power, Speed and Area EE2C1 - Lecture 5 - MOSFETs 2 Today: the MOSFET Device Structure S&S 5.1 Physical Operation S&S 5.1 * I-V Characteristics S&S 5.2 * The underlying physics will be covered in detail EE2P2 Semiconductor Physics. Here, an intuitive description will be given. EE2C1 - Lecture 5 - MOSFETs 3 NMOS Device Structure Cross Section Typical dimensions: 𝐿𝐿 ≈ 3 nm (very advanced).. 180 nm (reasonably affordable).. 1 µm (almost fossil) 𝑊𝑊 ≈ 10 nm.. 100 µm 𝑡𝑡𝑜𝑜𝑜𝑜 ≈ 1 nm.. 10 nm EE2C1 - Lecture 5 - MOSFETs 4 NMOS Device Structure Circuit symbols D NMOS is a 4-terminal device: Source, Drain, Gate and Body Source and Drain from pn-junction diodes with the Body G Need to be reverse biased! → Body connected to the lowest supply, or to the source Body often not drawn explicitly → 3-terminal device S EE2C1 - Lecture 5 - MOSFETs 5 Creating a Channel for Current Flow Apply a positive voltage 𝑣𝑣𝐺𝐺𝐺𝐺 to the gate Holes in the substrate are pushed away → depletion region Electrons from S and D are attracted → n-type conducting channel between S and D Channel only forms if 𝑣𝑣𝐺𝐺𝐺𝐺 > 𝑉𝑉𝑡𝑡 𝑉𝑉𝑡𝑡 is the threshold voltage How much larger 𝑣𝑣𝐺𝐺𝐺𝐺 is than 𝑉𝑉𝑡𝑡 is expressed by the overdrive voltage 𝑣𝑣𝑂𝑂𝑂𝑂 = 𝑣𝑣𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑡𝑡 EE2C1 - Lecture 5 - MOSFETs 6 Creating a Channel for Current Flow If 𝑣𝑣𝐷𝐷𝐷𝐷 = 0, no current flows through the channel We can think of the MOSFET as a parallel-plate capacitor holding a channel charge 𝑄𝑄 = 𝐶𝐶𝑜𝑜𝑜𝑜 ⋅ 𝑊𝑊𝑊𝑊 ⋅ 𝑣𝑣𝑂𝑂𝑂𝑂 𝐶𝐶𝑜𝑜𝑜𝑜 = 𝜖𝜖𝑜𝑜𝑜𝑜 /𝑡𝑡𝑜𝑜𝑜𝑜 is the oxide capacitance per unit gate area [F/m2] Larger overdrive 𝑣𝑣𝑂𝑂𝑂𝑂 → more channel charge (deeper channel) EE2C1 - Lecture 5 - MOSFETs 7 Applying a Small 𝑣𝑣𝐷𝐷𝐷𝐷 Applying a small positive voltage at the drain gives an electric field in the channel Electrons drift towards the drain → current flow 𝑊𝑊 𝑖𝑖𝐷𝐷 = 𝜇𝜇𝑛𝑛 𝐶𝐶𝑜𝑜𝑜𝑜 𝑣𝑣 𝑣𝑣 𝐿𝐿 𝑂𝑂𝑂𝑂 𝐷𝐷𝐷𝐷 𝑔𝑔𝐷𝐷𝐷𝐷 where 𝜇𝜇𝑛𝑛 is the electron mobility The MOSFET behaves as a voltage-controlled resistor 1 1 𝑟𝑟𝐷𝐷𝐷𝐷 = = 𝑔𝑔𝐷𝐷𝐷𝐷 𝜇𝜇𝑛𝑛 𝐶𝐶𝑜𝑜𝑜𝑜 𝑊𝑊 ⁄𝐿𝐿 𝑣𝑣𝑂𝑂𝑂𝑂 EE2C1 - Lecture 5 - MOSFETs 8 𝑖𝑖𝐷𝐷 Applying a Small 𝑣𝑣𝐷𝐷𝐷𝐷 𝑣𝑣𝐷𝐷𝐷𝐷 𝑊𝑊 𝑔𝑔𝐷𝐷𝐷𝐷 = (𝜇𝜇𝑛𝑛 𝐶𝐶𝑜𝑜𝑜𝑜 ) 𝑣𝑣 = 𝑘𝑘𝑛𝑛 𝑣𝑣𝑜𝑜𝑜𝑜 𝐿𝐿 𝑂𝑂𝑂𝑂 Process dependent Design dependent parameter 𝑘𝑘𝑛𝑛′ = 𝜇𝜇𝑛𝑛 𝐶𝐶𝑜𝑜𝑜𝑜 aspect ratio 𝑊𝑊 ⁄𝐿𝐿 MOSFET transconductance parameter 𝑘𝑘𝑛𝑛 = (𝜇𝜇𝑛𝑛 𝐶𝐶𝑜𝑜𝑜𝑜 )(𝑊𝑊 ⁄𝐿𝐿) EE2C1 - Lecture 5 - MOSFETs 9 Increasing 𝑣𝑣𝐷𝐷𝐷𝐷 Resistance 𝑖𝑖𝐷𝐷 increases with 𝑣𝑣𝐷𝐷𝐷𝐷 Slope ≡ 𝑔𝑔𝐷𝐷𝐷𝐷 0 𝑣𝑣𝐷𝐷𝐷𝐷 Increasing 𝑣𝑣𝐷𝐷𝐷𝐷 reduces the channel width towards the drain → tapered channel → increased resistance 𝑊𝑊 1 𝑖𝑖𝐷𝐷 = 𝑘𝑘𝑛𝑛′ 𝑣𝑣𝑂𝑂𝑂𝑂 − 𝑣𝑣𝐷𝐷𝐷𝐷 𝑣𝑣𝐷𝐷𝐷𝐷 𝐿𝐿 2 average overdrive along the channel EE2C1 - Lecture 5 - MOSFETs 10 Channel Pinch-Off When further increasing 𝑣𝑣𝐷𝐷𝐷𝐷 , the channel is pinched off at the drain This happens when there is no longer an inversion layer at the drain, i.e. 𝑣𝑣𝐺𝐺𝐺𝐺 < 𝑉𝑉𝑡𝑡 pinch-off 𝑣𝑣𝐺𝐺𝐺𝐺 − 𝑣𝑣𝐷𝐷𝐷𝐷 < 𝑉𝑉𝑡𝑡 𝑣𝑣𝐷𝐷𝐷𝐷 > 𝑣𝑣𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑡𝑡 = 𝑣𝑣𝑂𝑂𝑂𝑂 The drain current saturates, i.e. becomes (approximately) independent of 𝑣𝑣𝐷𝐷𝐷𝐷 1 ′ 𝑊𝑊 2 𝑖𝑖𝐷𝐷 = 𝑘𝑘𝑛𝑛 𝑣𝑣 2 𝐿𝐿 𝑂𝑂𝑂𝑂 EE2C1 - Lecture 5 - MOSFETs 11 NMOS Triode Region and Saturation Region Slope = 𝑊𝑊 𝑔𝑔𝐷𝐷𝐷𝐷 = 𝑘𝑘𝑛𝑛′ 𝑣𝑣 𝐿𝐿 𝑂𝑂𝑂𝑂 𝑣𝑣𝑂𝑂𝑂𝑂 = 𝑣𝑣𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑡𝑡𝑡𝑡 ≤ 0 Cutoff – no channel 𝑖𝑖𝐷𝐷 = 0 𝑊𝑊 1 𝑣𝑣𝑂𝑂𝑂𝑂 > 0, 𝑣𝑣𝐷𝐷𝐷𝐷 < 𝑣𝑣𝑂𝑂𝑂𝑂 Triode – channel from S to D 𝑖𝑖𝐷𝐷 = 𝑘𝑘𝑛𝑛′ 𝑣𝑣𝑂𝑂𝑂𝑂 − 𝑣𝑣𝐷𝐷𝐷𝐷 𝑣𝑣𝐷𝐷𝐷𝐷 𝐿𝐿 2 1 ′ 𝑊𝑊 2 𝑣𝑣𝑂𝑂𝑂𝑂 > 0, 𝑣𝑣𝐷𝐷𝐷𝐷 ≥ 𝑣𝑣𝑂𝑂𝑂𝑂 Saturation – pinch-off at D 𝑖𝑖𝐷𝐷 = 𝑘𝑘 𝑣𝑣𝑂𝑂𝑂𝑂 2 𝑛𝑛 𝐿𝐿 EE2C1 - Lecture 5 - MOSFETs 12 NMOS vs PMOS NMOS PMOS p-type body n-type body EE2C1 - Lecture 5 - MOSFETs 13 NMOS vs PMOS NMOS PMOS n-type channel p-type channel p-type body n-type body 𝑣𝑣𝐺𝐺𝐺𝐺 > 𝑉𝑉𝑡𝑡𝑡𝑡 induces an n-channel 𝑣𝑣𝐺𝐺𝐺𝐺 < 𝑉𝑉𝑡𝑡𝑡𝑡 induces a p-channel Threshold voltage 𝑉𝑉𝑡𝑡𝑡𝑡 is positive Threshold voltage 𝑉𝑉𝑡𝑡𝑡𝑡 is negative Current flows from drain to source Current flows from source to drain In saturation (𝑣𝑣𝐷𝐷𝐷𝐷 > 𝑣𝑣𝑂𝑂𝑂𝑂 = 𝑣𝑣𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑡𝑡𝑡𝑡 ) In saturation (𝑣𝑣𝑆𝑆𝐷𝐷 > 𝑣𝑣𝑂𝑂𝑂𝑂 = 𝑣𝑣𝑆𝑆𝐺𝐺 − |𝑉𝑉𝑡𝑡𝑝𝑝 |) 1 ′ 𝑊𝑊 2 1 ′ 𝑊𝑊 2 𝑖𝑖𝐷𝐷 = 𝑘𝑘 𝑣𝑣 𝑖𝑖𝐷𝐷 = 𝑘𝑘 𝑣𝑣 2 𝑛𝑛 𝐿𝐿 𝑂𝑂𝑂𝑂 2 𝑝𝑝 𝐿𝐿 𝑂𝑂𝑂𝑂 EE2C1 - Lecture 5 - MOSFETs 14 PMOS Triode Region and Saturation Region 𝑣𝑣𝑂𝑂𝑂𝑂 = 𝑣𝑣𝑆𝑆𝑆𝑆 − |𝑉𝑉𝑡𝑡𝑡𝑡 | ≤ 0 Cutoff – no channel 𝑖𝑖𝐷𝐷 = 0 𝑊𝑊 1 𝑣𝑣𝑂𝑂𝑂𝑂 > 0, 𝑣𝑣𝑆𝑆𝑆𝑆 < 𝑣𝑣𝑂𝑂𝑂𝑂 Triode – channel from S to D 𝑖𝑖𝐷𝐷 = 𝑘𝑘𝑝𝑝′ 𝑣𝑣𝑂𝑂𝑂𝑂 − 𝑣𝑣𝑆𝑆𝑆𝑆 𝑣𝑣𝑆𝑆𝑆𝑆 𝐿𝐿 2 1 ′ 𝑊𝑊 2 𝑣𝑣𝑂𝑂𝑂𝑂 > 0, 𝑣𝑣𝑆𝑆𝐷𝐷 ≥ 𝑣𝑣𝑂𝑂𝑂𝑂 Saturation – pinch-off at D 𝑖𝑖𝐷𝐷 = 𝑘𝑘 𝑣𝑣𝑂𝑂𝑂𝑂 2 𝑝𝑝 𝐿𝐿 EE2C1 - Lecture 5 - MOSFETs 15 Complementary MOS (CMOS) CMOS technology combines NMOS and PMOS transistors in one substrate Often, NMOS transistors are built in a common p-substrate, PMOS transistors are built in an n-well body (isolated by reverse-biasing the n-well to substrate diode) EE2C1 - Lecture 5 - MOSFETs 16 The NMOS 𝑖𝑖𝐷𝐷 − 𝑣𝑣𝐷𝐷𝐷𝐷 Characteristics MOSFET as a switch: cut-off (off) and triode (on) MOSFET as an amplifier: saturation region EE2C1 - Lecture 5 - MOSFETs 17 The NMOS 𝑖𝑖𝐷𝐷 − 𝑣𝑣𝐺𝐺𝐺𝐺 Characteristic In the saturation region, MOSFET can be seen as a voltage- controlled current source We can make amplifiers with this! EE2C1 - Lecture 5 - MOSFETs 18 Finite Output Resistance in Saturation pinch-off So far, we have assumed that 𝑖𝑖𝐷𝐷 is independent of 𝑣𝑣𝐷𝐷𝐷𝐷 in the saturation region However, the pinch-off point in the channel depends on 𝑣𝑣𝐷𝐷𝐷𝐷 This makes the channel-length dependent on 𝑣𝑣𝐷𝐷𝐷𝐷 This channel-length modulation leads to a finite output resistance EE2C1 - Lecture 5 - MOSFETs 19 Finite Output Resistance in Saturation 1 ′ 𝑊𝑊 2 𝑖𝑖𝐷𝐷 = 𝑘𝑘𝑝𝑝 𝑣𝑣 ⋅ 1 + 𝜆𝜆𝑣𝑣𝐷𝐷𝐷𝐷 2 𝐿𝐿 𝑂𝑂𝑂𝑂 Extra term due to channel-length modulation 𝜆𝜆 is technology dependent 𝑉𝑉𝐴𝐴 = 1⁄𝜆𝜆 is called the Early voltage EE2C1 - Lecture 5 - MOSFETs 20 Finite Output Resistance in Saturation Included in the equivalent model using an output resistance 𝑟𝑟𝑜𝑜 1 𝑉𝑉𝐴𝐴 𝑟𝑟𝑜𝑜 = ′ = ′ 𝜆𝜆𝑖𝑖𝐷𝐷 𝑖𝑖𝐷𝐷 1 𝑊𝑊 where 𝑖𝑖𝐷𝐷′ = 𝑘𝑘𝑛𝑛′ 𝑣𝑣𝑂𝑂𝑂𝑂 2 is the drain 2 𝐿𝐿 current without channel-length modulation EE2C1 - Lecture 5 - MOSFETs 21 Summary In MOSFETs, current flow in the channel between source and drain is regulated by voltage applied to the gate Two types: NMOS (n-channel) and PMOS (p-channel) A channel can only form if 𝑣𝑣𝐺𝐺𝐺𝐺 exceeds the threshold voltage 𝑉𝑉𝑡𝑡 Three main operating regions: 𝑣𝑣𝑂𝑂𝑂𝑂 = 𝑣𝑣𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑡𝑡𝑡𝑡 ≤ 0 Cutoff – no channel 𝑖𝑖𝐷𝐷 = 0 𝑊𝑊 1 𝑣𝑣𝑂𝑂𝑂𝑂 > 0, 𝑣𝑣𝐷𝐷𝐷𝐷 < 𝑣𝑣𝑂𝑂𝑂𝑂 Triode – channel from S to D 𝑖𝑖𝐷𝐷 = 𝑘𝑘𝑛𝑛′ 𝑣𝑣𝑂𝑂𝑂𝑂 − 𝑣𝑣𝐷𝐷𝐷𝐷 𝑣𝑣𝐷𝐷𝐷𝐷 𝐿𝐿 2 1 ′ 𝑊𝑊 2 𝑣𝑣𝑂𝑂𝑂𝑂 > 0, 𝑣𝑣𝐷𝐷𝐷𝐷 ≥ 𝑣𝑣𝑂𝑂𝑂𝑂 Saturation – pinch-off at D 𝑖𝑖𝐷𝐷 = 𝑘𝑘 𝑣𝑣𝑂𝑂𝑂𝑂 2 𝑛𝑛 𝐿𝐿 MOSFET as a switch → cutoff and triode regions In triode region at small 𝑣𝑣𝐷𝐷𝐷𝐷 , the MOSFET acts as a voltage-controlled resistor MOSFET as an amplifier → saturation region Can be modelled as a voltage-controlled current source Channel-length modulation gives a finite output resistance 𝑟𝑟𝑜𝑜 EE2C1 - Lecture 5 - MOSFETs 22 What’s next? Study: S&S 5.1 and 5.2 Practice: see problems listed on Brightspace! Next lecture: MOSFET Circuits at DC Questions? Use the Q&A Forum on Brightspace Or: [email protected], [email protected] EE2C1 - Lecture 5 - MOSFETs 23

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