Week 3 - Instruction Set for 8085 µP PDF

Instruction set for 8085 microprocessors Week - 3 Hasan Pişkin Alanya University – CSE305 [email protected] Learning Goals General view of 8085 Compiler (A Java Application) Registers Flags Memory...

Instruction set for 8085 microprocessors Week - 3 Hasan Pişkin Alanya University – CSE305 [email protected] Learning Goals General view of 8085 Compiler (A Java Application) Registers Flags Memory array Data Transfer Instructions Aritmethic Logic Branching Instructions Logical Instructions Control Functions Assembly Language 8085 Simulator-Interface 8085 Simulator-Interface 8085 -Registers 8085 μP –Sign Register (S) 𝑆 Sign Register, Check 𝑫𝟕 𝐷7 𝐷6 𝐷5 𝐷4 𝐷3 𝐷2 𝐷1 𝐷0 0 1 1 1 0 0 1 0 𝐷7 = 1 𝑆=1 Provides information about sign of the numbers: 𝐷7 = 0 𝑆 =0 Positive or Negative 8085 μP –Zero Register (Z) 𝑍 Zero Register, Check the value of Accumulator or Counter 𝑍=1 𝑅𝑒𝑠𝑢𝑙𝑡 𝑖𝑠 𝑍𝑒𝑟𝑜 𝑖𝑛 𝐴 𝑜𝑟 𝐶 𝑍 =0 𝑅𝑒𝑠𝑢𝑙𝑡 𝑖𝑠 𝑛𝑜𝑡 𝑍𝑒𝑟𝑜 𝑖𝑛 𝐴 𝑜𝑟 𝐶 8085 μP –Auxiliary Carry Register (AC) 𝐴𝐶 Auxiliary Carry, Carry from Lower nibble to higer nibble 𝐷7 𝐷6 𝐷5 𝐷4 𝐷3 𝐷2 𝐷1 𝐷0 0 1 1 1 0 0 1 0 Higher nibble Lower nibble 𝐴𝐶 = 1 𝐶𝑎𝑟𝑟𝑦 𝑓𝑟𝑜𝑚𝐷3 𝑡𝑜 𝐷4 𝐴𝐶 = 0 𝑇ℎ𝑒𝑟𝑒 𝑖𝑠 𝑛𝑜 𝑐𝑎𝑟𝑟𝑦 𝑓𝑟𝑜𝑚 𝐷3 𝑡𝑜 𝐷4 8085 μP – Parity Register (P) 𝑃 Parity, Check the number of 1 is even or odd. 𝐷7 𝐷6 𝐷5 𝐷4 𝐷3 𝐷2 𝐷1 𝐷0 0 1 1 1 0 0 1 0 𝑃=1 𝑃=1 𝑛𝑢𝑚𝑏𝑒𝑟 𝑜𝑓 1 𝑖𝑠 𝑒𝑣𝑒𝑛 𝑃 =0 𝑛𝑢𝑚𝑏𝑒𝑟 𝑜𝑓 1 𝑖𝑠 𝑜𝑑𝑑 8085 μP – Carry Register (CY) 𝐶𝑌 Carry , Check the carry 𝐷1 𝐷0 𝐷7 𝐷6 𝐷5 𝐷4 𝐷3 𝐷2 𝐷1 𝐷0 0 1 0 1 1 1 0 0 1 0 𝐶𝑌 = 1 𝐶𝑎𝑟𝑟𝑦 𝑖𝑠 𝑔𝑒𝑛𝑒𝑟𝑎𝑡𝑒𝑑 𝐶𝑌 = 0 𝐶𝑎𝑟𝑟𝑦 𝑖𝑠 𝑛𝑜𝑡 𝑔𝑒𝑛𝑒𝑟𝑎𝑡𝑒𝑑 Example-1 3 3 𝐻 + 𝐴 6 𝐻 𝐷 9 𝐷7 𝐷6 𝐷5 𝐷4 𝐷3 𝐷2 𝐷1 𝐷0 1 1 0 1 1 0 0 1 𝑺=𝟏 (𝐷7 = 𝟏) Unsigned Rep. : 217 𝒁=𝟎 Signed Rep. : -39 𝑨𝑪 = 𝟎 𝑷=𝟎 (# 𝑜𝑓 1 = 5 𝑜𝑑𝑑) 𝑪𝒀 = 𝟎 Example-2 𝐹 𝐹 𝐻 0 1 𝐻 𝑺=𝟎 (𝐷7 = 𝟎) + 𝒁=𝟏 (𝑨𝒍𝒍 𝒛𝒆𝒓𝒐) 1 0 0 𝐻 𝑨𝑪 = 𝟏 (𝐷3 → 𝐷4 , 𝑐𝑎𝑟𝑟𝑦) 𝑷=𝟏 (# 𝑜𝑓 1 = 0 𝑒𝑣𝑒𝑛) 𝑪𝒀 = 𝟏 (𝑪𝒂𝒓𝒓𝒚 𝒊𝒔 𝟏) Carry 𝐷7 𝐷6 𝐷5 𝐷4 𝐷3 𝐷2 𝐷1 𝐷0 1 1 1 1 1 1 1 1 + 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 Registers Accumulator and the Other Registers This data will be processed The others can be used as memory to operate or Counter Etc. This data is read from Memory cells. MVI A, 01H MVI B, 01H ADD B HLT Instruction Set for 8085 μP – DATA TRANSFER MVI A, 5FH Move Immediate 8-bit data LDA 0020H Load Accumulator (16-bit address) MOV A, B Copy from source (B) to destination (A) LXI H, 0020H Load Register (H) from (16 bit address) LHLD 0020H Load H and L Registers Direct (16bit add.) STA 0021H Store Accumulator into memory SHLD 0022H Store H and L registers direct into memory XCHG Exchange HL with DE registers SPHL Copy HL to stack pointer XTHL Exchange HL with top of Stack PUSH B Push Register pair onto stack OUT F8H Write accumulator (A) to I/O port IN F8H Read data from I/O port and load to (A) Instruction Set for 8085 μP – Arithmetic Operations ADD B A+B, add B into Accumulator ADC B A+B, add B into Accumulator with carry ADI 4AH Add immedite 8-bit to Accumulator ACI 4AH Add immedite 8-bit to Acc. with carry DAD D Add pairs to HL, Double addition SUB B Subtract from Accumlator SBB B Subtrct from Mem. data- Borrow Carry from Acc. SUI 4AH Subtract immediate from Accumlator SBI 4AH Subtract immediate from Acc. With borrow INR B Increase Register by 1 INX H Increase Memory Location (index) by 1 DCR B Decrease Register by 1 DCX H Decrease Memory Location (index) by 1 DAA Decimal Adjust Accumulator Instruction Set for 8085 μP – Branching - JUMP JMP 2034H Jump unconditionally JMP Loop1 Jump conditionally Flag Status JC Loop Jump on Carry CY = 1 JNC Loop Jump on no Carry CY = 0 JP Loop Jump on Positive S=0 JM Loop Jump on Minus S=1 JZ Loop Jump on Zero Z=1 JNZ Loop Jump on no Zero Z=0 JPE Loop Jump on Partiy even P=1 JPO Loop Jump on Partiy odd P=0 Instruction Set for 8085 μP – Branching- CALL CALL 2034H CALL subroutine unconditionally CALL Loop1 CALL conditionally Flag Status CC Loop CALL on Carry CY = 1 CNC Loop CALL on no Carry CY = 0 CP Loop CALL on Positive S=0 CM Loop CALL on Minus S=1 CZ Loop CALL on Zero Z=1 CNZ Loop CALL on no Zero Z=0 CPE Loop CALL on Partiy even P=1 CPO Loop CALL on Partiy odd P=0 Instruction Set for 8085 μP – Branching- RETURN RET Return from subroutine unconditionally Return from Subroutine conditionally Flag Status RC Loop Return on Carry CY = 1 RNC Loop Return on no Carry CY = 0 RP Loop Return on Positive S=0 RM Loop Return on Minus S=1 RZ Loop Return on Zero Z=1 RNZ Loop Return on no Zero Z=0 RPE Loop Return on Partiy even P=1 RPO Loop Return on Partiy odd P=0 Instruction Set for 8085 μP – Branching- LOAD Counter Instruction Set for 8085 μP – Branching- RESTART Instruction Set for 8085 μP – LOGICAL- Compare CMP B Compare Register wih Accumulator 𝑨>𝑩 𝑨𝟓 𝟓𝑩 𝑨 9, 𝐴𝐶 = 1 < 9 , 𝐶𝑌 = 0: > 9, 𝐶𝑌 = 1 Depends on the Accumulator AC & CY flags will be affected. 𝐴𝐶 = 0 𝐶𝑌 = 0 𝐴𝐶 = 1 𝐴𝐶 = 0 𝐴𝐶 = 1 𝐶𝑌 = 0 𝐶𝑌 = 1 𝐶𝑌 = 1 DAD – Double ADD Register Pair with H-L 𝟏𝟐𝟑𝟒𝑯 + 𝟓𝟔𝟕𝟖𝑯 𝟔𝟖𝑨𝑪𝑯 𝑯 𝑳 A Accumulator B 56 C 78 DAD B D E H 68 L AC Control Instructions NOP No operation is performed. HLT The CPU finishes executing the current instruction and halts any further execution. An interrupt or reset is necessary to exit from the halt state. DI Disable interrupts EI Enable interrupts RIM Read interrupt Masks SIM Set interrupt Masks