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DEADLOCKS Interconnecting Bus Deadlock A communication pathway connecting two or more devices Where in a set of process cannot continue executing because each CPU/Mi...

DEADLOCKS Interconnecting Bus Deadlock A communication pathway connecting two or more devices Where in a set of process cannot continue executing because each CPU/Microprocessor/Processor process is waiting for a resource that is being held or used by another Is the computing part of the computer and is responsible for program process within the set execution and coordination of the other systems components Deadlock Avoidance Fetch-Decode-Execute Cycle May occur but the operating system will avoid actions that could lead A standard process describes the steps needed for processing to take to deadlocks place The main memory is much slower compared to CPU Unsafe state o A state that may lead to a deadlock and must be avoided Register Safe state Used for frequently used data o That has a scheduling order or a sequence of processes in which every process in the sequence can complete its Program Counter execution It keeps track of the main memory address of the instruction that will Banker’s Algorithm be executed next Used to determine if the current state of the system is safe or not I/O Devices Provide input/output capabilities and are considered the slowest components in a computer system COMPUTER ARCHITECTURE AND OPERATING SYSTEMS Interrupts Four (4) Basic Components of Computer System Signal sent by the devices and programs which are used to get the CPU attention of the CPU and the operating system Primary Memory Secondary Memory Hardware interrupts I/O Devices I/O devices, are usually the ones making interrupt request, which are referred to as hardware interrupts. Traps or exceptions Dynamic RAM The software also generates interrupt request in the form of traps or They are relatively slower compared to SRAM exceptions. They have high packing densities They are much cheaper Interrupt Service Routine (ISR) Cache Memory Is a software routine that hardware invokes in response to an interrupt Smaller version of the main memory but is constructed using SRAM Chips Primary Memory Types of Cache Memory Random-Access Memory (RAM) During execution, programs and data are placed in RAM Primary or L1 Cache The CPU can access any location of the primary memory Is extremely fast but relatively small and is usually embedded in the Secondary Memory processor chip as CPU cache Where all programs and data are permanently stored since it does not Secondary or L2 Cache lose its contents whenever power is cut off Is located outside the CPU Is slower than main memory since it has mechanical parts that L2 cache may be embedded on the CPU, or it can be on a separate operate at electronic speed chip or coprocessor and have a high-speed alternative system bus The hard disk or magnetic disk is a popular secondary storage device. connecting the cache and CPU. That way it doesn’t get slowed by It is mage up of several circular disk platters covered with magnetic traffic on the main system bus material A sector contains a fixed number of bytes CPU SCHEDULING Type or RAM Chips CPU scheduling Is a process which allows one process to use the CPU while the execution of another process is on hold(in waiting state) due to Static bipolar RAM Chips unavailability of any resources like I/O They have extremely fast memory access times First-Come-First-Serve Algorithm (FCFS) They have low packing densities They are very expensive It is a non- preemptive scheduling algorithm where in the one that enters the ready queue first gets to be executed by the CPU first Non-Preemptive Scheduling Arrival time The CPU cannot be taken away from its currently executing process Time at which the process arrives in the ready queue Preemptive Scheduling SHORTEST – JOBS – FIRST ALGORITHM (SJF/SPF) The CPU can be taken away from its currently executing process. Preemptive is ideally used for interactive or real-time computing Shortest process first algorithm (SPF) same with (SJF) systems It is a non-preemptive scheduling algorithms where in the process CPU SCHEDULING CRITERIA with shortest CPU Burst time is the one that will executed first. If two or more ore process have the same CPU burst time CPU Utilization To make out the best use of CPU and not waste any CPU Cycle Throughput It is the total number of process completed per unit time of rather say total amount of work done in a unit time Turnaround time It is the amount of time taken to execute a particular process Response time Amount of time its takes from when a request was submitted unit the first response is produced Waiting time A process has to spend inside the ready queue waiting to be executed by the CPU is minimized CPU Burst Time required by a process for CPU Execution