Introduction To Microprocessors PDF

INTRODUCTION TO MICROPROCESSORS Computer's Central Processing Unit (CPU) built on a single Integrated Circuit (IC) is called a microprocessor. A digital computer with one microprocessor which acts as a CPU is called microcomputer. It is a programmable, multipurpose, clock -driven,...

INTRODUCTION TO MICROPROCESSORS Computer's Central Processing Unit (CPU) built on a single Integrated Circuit (IC) is called a microprocessor. A digital computer with one microprocessor which acts as a CPU is called microcomputer. It is a programmable, multipurpose, clock -driven, register-based electronic device that reads binary instructions from a storage device called memory, accepts binary data as input and processes data according to those instructions 11/21/2024 Alemu W. and provides results2  Cont.. The microprocessor contains millions of tiny components like transistors, registers, and diodes that work together. A Microprocessor is an important part of a computer architecture without which you will not be able to perform anything on your computer. It is a programmable device that takes in input performs some arithmetic and logical operations over it and produces the desired output. In simple words, a Microprocessor is a digital device on a chip that can fetch instructions from memory, decode and execute them and give results. 11/21/2024 Alemu W. 3  Basics of Microprocessor A Microprocessor takes a bunch of instructions in machine language and executes them, telling the processor what it has to do. Microprocessor performs three basic things while executing the instruction: It performs some basic operations like addition, subtraction, multiplication, division, and some logical operations using its Arithmetic and Logical Unit (ALU). 11/21/2024 Alemu W. 4 –  Cont.. Program Counter (PC) – Is a register that stores the address of the next instruction based on the value of the PC, Microprocessor jumps from one location to another and takes decisions 11/21/2024 Alemu W. 5  Basic Terms used in Microprocessor Instruction Set - – The group of commands that the microprocessor can understand is called Instruction set. – It is an interface between hardware and software. Bus - – Set of conductors intended to transmit data, address or control information to different elements in a microprocessor. – A microprocessor will have three types of buses, i.e., data bus, address bus, and control bus. IPC (Instructions Per Cycle) - – It is a measure of how many instructions a CPU is capable of executing in a single clock. 11/21/2024 Alemu W. 6  Cont.. Clock Speed - – It is the number of operations per second the processor can perform. – It can be expressed in megahertz (MHz) or gigahertz (GHz). – What Is the Difference between GHz AND MHz? – One GHz equals one billion cycles per second whereas one MHz equals one million cycles per second – It is also called the Clock Rate. Bandwidth - – The number of bits processed in a single instruction is called Bandwidth. 11/21/2024 Alemu W. 7  Cont.. Word Length - The number of bits the processor can process at a time is called the word length of the processor. 8-bit Microprocessor may process 8 -bit data at a time. The range of word length is from 4 bits to 64 bits depending upon the type of the microcomputer. Data Types - The microprocessor supports multiple data type formats like binary, A SCII, signed and unsigned numbers. 11/21/2024 Alemu W. 8  Features of Microprocessor o Low Cost o Due to integrated circuit technology microprocessors are available at very low cost. o It will reduce the cost of a computer system. o High Speed o Due to the technology involved in it, the microprocessor can work at very high speed. o It can execute millions of instructions per second. o Small Size o A microprocessor is fabricated in a very less footprint due to very large scale and ultra large scale integration technology. o Because of this, the size of the computer system is reduced. 11/21/2024 Alemu W. 9  Cont..  Versatile - o The same chip can be used for several applications, therefore, microprocessors are versatile.  Low Power Consumption - o Microprocessors are using metal oxide semiconductor technology, which consumes less power.  Less Heat Generation - o Microprocessors uses semiconductor technology which will not emit much heat as compared to vacuum tube devices.  Reliable - o Since microprocessors use semiconductor technology, therefore, the failure rate is very less. Hence it is very reliable. Portable - – Due to the small size and low power consumption microprocessors are portable. 11/21/2024 Alemu W. 10 A µcomputer system? 11/21/2024 Alemu W. 11  Cont… 11/21/2024 Alemu W. 12  Evolution of Intel microprocessor  Fairchild Semiconductors (founded in 1957) invented the first IC in 1959.  In 1968, Robert Noyce, Gordan Moore, Andrew Grove resigned from Fairchild Semiconductors.  They founded their own company Intel (Integrated Electronics).  Intel grown from 3 man start-up t in 1968 industrial giant by 1981. o  It had 20,000 employees and $188 million revenue. 11/21/2024 Alemu W. 13  4 Bit Microprocessor: Intel 4004  Introduced in 1971.  It was the first microprocessor by Intel.  It was a 4-bit  µP.  Its clock speed was  740KHz.  It had 2,300 transistors. It could execute around 60,000   instructions per second.  It  cost $200.00, while possessing as much computing power as the ENIAC computer. 11/21/2024 Alemu W. 14  Intel 4040  Introduced in 1974.  It was also 4-bit µP.   8 KB of program memory  640 bytes of addressable  memory   3.000 The number of transistor   Clock speed is between 500 kHz and 740 kHz. 4 uses a crystal to 5185 MHz 11/21/2024 Alemu W. 15  8 bit Microprocessors:8008 Intel Introduced i 1972. n  It was first µ 8-bit P.  Its clock speed was 500 50,000 KHz. instructions  Could per second. 11/21/2024 execute Alemu W. 16  Intel 8080 Introduced in 1974.  It was also 8-bit  µP. 2 Its clock speed  was MHz. It had 6,000 transistors. 5,00,000  instructions Was 10 times per second. faster than 8008 11/21/2024 Alemu W. 17  Introduced in 1976. Int 808   It was also 8-bit µP. el 5  Its clock speed was  3 MHz. Its data bus   is 8-bit and  address bus is 16-bit.  It had 6,500   transistors. Could   execute 7,69,230 instructions per  second. It could access 64 11/21/2024 KB of memory. Alemu W. 18   Introduced in Intel 1978.  It was first 16- 8086 bit µP.  Its clock speed is 4.77 MHz, 8 MHz and 10 MHz, depending on the  Its data bus is 16-bit and  version. address bus is 20-bit.  It had 29,000  transistors.  Could execute 2.5  million instructions per  second.  It could access 1 MB of memory.  It had 22,000  instructions.  It had Multiply and Divide instructions. 11/21/2024 Alemu W. 19  Intel 8088Introduced in  1979.  It was also 16- bit µP.  It was created as a  cheaper version of Intel’s  It was a 16-bit  8086. processor with an 8-bit external bus.  Could execute 2.5  million instructions per This chip became the  second. most popular in the computer industry 11/21/2024 Alemu W. when IBM used it for 20  Int 80186 & el 80188  Introduced in 1982.  They were 16-bit µPs. version of 80186a with 8  bit external Clock speeddatanbus. was - 6 They MHz. had additional components like:  80188 was a  Interrupt Controller cheaper  Clock Generator  Local Bus Controller  Counters 11/21/2024 Alemu W. 21  Int 804  Introduced in 1989. el 86  It was also 32-bit µP.  It had It had 1.2  It million transistors. 1 Its clock speed varied from d 6 MHz vto 100 MHz  depending upon the  It various versions. v It had five different  versions:   80486  DX   80486  8 KB SX of cache as 11/21/2024 Alemu W. memory  80486 DX2 22  32-bıt Mıcroprocessors 11/21/2024 Alemu W. 23   Introduced in 1986. Int 803  It was first 32-bit µP. Its data bus is 32-bit and el 86  address bus is 32-bit.  It could address 4 GB of memory.   It had 2,75,000  transistors.  Its clock speed varied from 16  MHz to 33 MHz depending  80386 upon the various  DX versions. 80386 SX Different versions:  80386 SL   Intel 80386 became the best selling microprocessor in history. 11/21/2024 Alemu W. 24  Intel  Introduced in Pentı 1993.  It was also 32- um bit µP.  It was originally named 80586.  Itits clock speed was 66 MHz.  its databus is 32-bit and address bus is 32-bit.  It could Iaddress 4 GB t of memory.  a could execute 110 million instructions per second.   cache memory:  8 KB forI t instructions. 11/21/2024 Alemu W.  8 KB for data. 25  Int Pentıu Pr el m  Introduced o in 1995.   I It was also 32-bit µP.  I.  It had L2 cache of  I It had 21 million 256 KB transistors  I  It was primarily used. in server system  C  cache memory:  8 KB for instructions.  8 KB for data. It had L2 cache of  256 KB. Alemu W. 11/21/2024 26  Int Pentıu I el m Introduced I in  1997. It was also 32-  bit µP.  Its clock speed was 233 MHz to 500 MHz.  Could execute 333 million instructions per second. 11/21/2024 Alemu W. L2 cache & 27  Int Pentıu I Xeo el m Introduced  I n in 1998.  It was also 32- bit µP.  It was designed for servers.  Its clock speed was 400 MHz to 450 MHz.  L1 cache of 32 L KB cache& of 512 KB,2 1MB or 2 MB.  It could work with 4 Xeons in same system. 11/21/2024 Alemu W. 28  Int Pentıu II el m I Introduced i 1999. n  It was also µP. 32 bit  Its clock speed varied from 500 MHz to 1.4 GHz.  It had 9.5 million transistors. 11/21/2024 Alemu W. 29  Int Pentıu I el m V  Introduced in 2000.  I It was also 32-bit µP.  I Its clock speed 1 was from 3 GHz to 3.8  L 1 cache GHz. was of 32 L KB & 2 cache of 256  I It had 42 million KB. transistors.  A ll internal connections were made from aluminium to 11/21/2024 Alemu W. copper. 30  Intel  Introduced in 2006. Dual  It is 32-bit or Core  64-bit µP. It has two cores.  both theBcores have there wn o and internal bus L1 ache, but share c bus the external and L2 cache e (Next Slide). (  It supported  SMT  Technology. I 11/21/2024 Alemu W. SMT: t 31  64-bıt Mıcroprocessors 11/21/2024 Alemu W. 32  Intel 2 CoreIntroduced in  2006.  It  It is a 64-bit µP. It   G Its clock speed is from 1.2 Hz to 3 GHz.  It  It has291 million  transistors. I  It has 64 t KB of L1  cache per Intel Core 2cDuo core and 4 MB of L2 cache. Intel Core 2 Quad  ItIntel Core is launched in three 2 Extreme different Iersions: Alemu W. 11/21/2024 t 33  Int Cor i el e 7 in 2008.  Introduced   It is a 64-bit µP.   It has 4 physical cores.  Its clock speed fro is 2.66 GHz to 3.33 m GHz.   It has 781 million transistors.  It has 64 KB of L1 cache per core, 256 KB of L2 11/21/2024 Alemu W. cache and MB of8L3 cache. 34  Int Cor i el e Introduced 5 in 2009.  It is a 64-bit µP.    It has 4 physical cores. Its clock speed isfro 2.40 GHz to 3.60mGHz.  It has 781 million transistors.  It has 64 KB of L1 cache per core,6 11/21/2024 25KB of L2 cache Alemu W. d8 35 an MB of L3cache.  Int Cor i el e 3  Introduced in 2010.  It is a 64-bit µP.  It has 2 physical cores.  Its clock speed fro is 2.93 GHz to 3.33 GHz. m  It has 781 million transistors.  It has 64 KB of L1 cache per core, 51 KB of L2 cache and MB of L3 cache.2 11/21/2024 Alemu W. 4 36 11/21/2024 Alemu W. 37  Chapter 2 BASIC ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS 11/21/2024 Alemu W. 38  Contents 2.1 Internal architecture of the 8086/8088 microprocessors 2.2 Memory address space and data organization 2.3 Segment registers and memory segmentation 2.4 Pointer and index register 2.5 Status and flag register 11/21/2024 Alemu W. 39 11/21/2024 Alemu W. 40  Features It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 220 memory locations (1 MB). It can support up to 64K I/O ports. It provides 4, 16 -bit registers. Word size is 16 bits and double word size is 4 bytes. It has multiplexed address and data bus AD0- AD15 and A16 – A19. 11/21/2024 Alemu W. 41  8086 is designed to operate in two modes, Minimum and Maximum. It can prefetches up to 6 instruction bytes from memory and queues them in order to speed up instruction execution. It requires +5V power supply. A 40 pin dual in line package. Address ranges from 00000H to FFFFFH 11/21/2024 Alemu W. 42  Intel 8086 Internal Architecture 11/21/2024 Alemu W. 43  Internal architecture of 8086 8086 has two blocks BIU and EU. The BIU handles all transactions of data and addresses on the buses for EU. The BIU performs all bus operations such as instruction fetching, reading and writing operands for memory and calculating the addresses of the memory operands. The instruction bytes are transferred to the instruction queue. EU executes instructions from the Alemu W. 44 instruction system byte queue. 11/21/2024  BIU contains Instruction queue, Segment registers, Instruction pointer, Address adder. EU contains Control circuitry, Instruction decoder, ALU, Pointer and Index register, Flag register. 11/21/2024 Alemu W. 45  Execut ion Unit E x e c u t i o n U n i t c o n t a i n s :  General Pur poses Registers  Stack Pointer  Base Pointer  Index Registers  ALU  Flag Register  Instr uct ion Decoder  T i m i ng & Cont rol Uni t 11/21/2024 Alemu W. 46 EXECUTION UNIT Decodes instructions fetched by the BIU Generate control signals, Executes instructions. The main parts are: Control Circuitry Instruction decoder ALU 11/21/2024 Alemu W. 47 EXECUTION UNIT – General Purpose Registers 8 bits 8 bits AH AL A Accumulator 16 bits X BH BL Base B X CH CL C Count X DH DL D Data X SP Stack Pointer Point BP er Base Pointer SI Source Index Index DI Destination Index 11/21/2024 Alemu W. 48  EXECUTION UNIT General Purpose Registers A X Reg i ste r : A X re g i ste r i s a l s o k n ow n a s a ccu m u l ato r re g i ste r t h at st o r e s operands fo r a r i t h m et i c o p e r at i o n l i ke d i v i d e d, rot ate. B X Reg i ste r : T h i s re g i ste r i s m a i n l y u s e d a s a b a s e re g i ste r. I t h o l d s t h e st a r t i n g b a s e l o c at i o n o f a m e m o r y r e g i o n w i t h i n a dat a s e g m e n t. C X Reg i ste r : I t i s d efi n e d a s a co u n te r. I t i s p r i m a r i l y u s e d i n l o o p i n st r u ct i o n to sto re l o o p co u n te r. 11/21/2024 DX Reg i ste r : DX Alemure W. g i ste r i s u s e d 49 to  EXECUTION UNIT Pointer And Index Registers used to keep offset addresses. Used in various forms of memory addressing. Stack Pointer (SP): The function of SP is same as the function of SP in Intel 8085. It stores the address of top element in the stack. BP, SI & DI are used in memory address computation. BP: Base Pointer – Primarily used to access data on the stack – Can be used to access data in other segments 11/21/2024 Alemu W. 50  SI: Source Index register – is required for some string operations – When string operations are performed, the SI register points to memory locations in the data segment which is addressed by the DS register. – Thus, SI is associated with the DS in string operations. DI: Destination Index register – is also required for some string operations. – When string operations are performed, the DI register points to memory locations in the data segment which is addressed by the ES register. Thus, DI is associated with 11/21/2024 Alemu W. 51  EXECUTION UNIT – Flag Register A flag is a flip flop which indicates some conditions produced by the execution of an instruction or controls certain operations of the EU. In 8086 The EU contains  a 16 bit flag register 9 of the 16 are active flags and U U U U O D I T S Z U A U P U C remaining 7F are F Fundefined. F F F F F F  6 flags indicates Si some Auxili conditions- Car Interru Tra gn Zer ary Pari ry status Over flags flow Directi on pt p o ty U - Unused 3 flags –control Flags 11/21/2024 Alemu W. 52  Cont.. 11/21/2024 Alemu W. 53 EXECUTION UNIT – Flag Register Flag Purpose Carry (CF) Holds the carry after addition or the borrow after subtraction. Also indicates some error conditions, as dictated by some programs and procedures. Parity (PF) PF=0;odd parity, PF=1;even parity. Auxiliary Holds the carry (half – carry) after addition or borrow (AF) after subtraction between bit positions 3 and 4 of the result (for example, in BCD addition or subtraction.) Zero (ZF) Shows the result of the arithmetic or logic operation. Z=1; result is zero. Z=0; The result is different from zero Sign (SF) Holds the sign of the result after an arithmetic/logic instruction 54 11/21/2024 execution. S=1; negative, Alemu W. S=0  Flag Purpose A control flag. Trap (TF) Enables the trapping through an on-chip debugging feature. A control flag. Interrupt (IF) Controls the operation of the INTR (interrupt request) I=0; INTR pin disabled. I=1; INTR pin enabled. A control flag. Direction (DF) It selects either the increment or decrement mode for DI and /or SI registers during the string instructions. Overflow occurs when signed numbers are added or Overflow (OF) subtracted. An overflow indicates the result has exceeded the capacity of the Machine 11/21/2024 Alemu W. 55 Execution unit – Flag Register Six of the flags are status indicators reflecting properties of the last arithmetic or logical instruction. For example, if register AL = 7Fh and the instruction ADD AL,1 is executed then the following happen AL = 80h CF = 0; there is no carry out of bit 7 PF = 0; 80h has an odd number of ones AF = 1; there is a carry out of bit 3 into bit 4 ZF = 0; the result is not zero SF = 1; bit seven is one OF = 1; the sign bit has changed 11/21/2024 Alemu W. 56  Exercise 1 MOV A 2Bh (load 2BH in register A) MOV B 19h (load 39H in register B) ADD B AL = CF = PF = AF = ZF = SF = OF = 11/21/2024 Alemu W. 57  Exercise 2 MOV A 2Bh (load 2BH in register A) MOV B 39h (load 39H in register B) ADD B AL = CF = PF = AF = ZF = SF = OF = 11/21/2024 Alemu W. 58