Lecture 09: Design of Sequential Logic Circuits PDF

Lecture 09: Design of Sequential Logic Circuits Engr. Zoren P. Mabunga, M.Sc. Prepared by: Engr. Zoren P. Mabunga State Reduction and Assignment State Reduction The reduction in the number of flip-flops in a sequential circuit is referred to as the state reduction pr...

Lecture 09: Design of Sequential Logic Circuits Engr. Zoren P. Mabunga, M.Sc. Prepared by: Engr. Zoren P. Mabunga State Reduction and Assignment State Reduction The reduction in the number of flip-flops in a sequential circuit is referred to as the state reduction problem. State-reduction algorithms are concerned with procedures for reducing the number of states in a state table, while keeping the external, input-output requirements unchanged. ''Two states are said to be equivalent if, for each member of the set of inputs, they give exactly the same output and send the circuit either to the same state or to an equivalent state.” When two states are equivalent, one of them can be removed without altering the input-output relationships. Prepared by: Engr. Zoren P. Mabunga Example Prepared by: Engr. Zoren P. Mabunga  State Assignment In order to design a sequential circuit with physical components, it is necessary to assign unique coded binary values to the states. For a circuit with “m” states, the codes must contain “n” bits, where2! ≥ 𝑚. Unused states are treated as don't-care conditions during the design. Since don't-care conditions usually help in obtaining a simpler circuit, it is more likely that the circuit with five states will require fewer combinational gates than the one with seven states. Prepared by: Engr. Zoren P. Mabunga State Assignment Prepared by: Engr. Zoren P. Mabunga Design Procedure Design procedures or methodologies specify hardware that will implement a desired behavior. The design effort for small circuits may be manual, but industry relies on automated synthesis tools for designing massive integrated circuits. The building block used by synthesis tools is the D flip-flop. Together with additional logic, it can implement the behavior of JK and T flip- flops. Prepared by: Engr. Zoren P. Mabunga PROCEDURES FOR DESIGNING SYCHRONOUS SEQUENTIAL CIRCUIT 1. From the word description and specifications of the desired operation, derive a state diagram for the circuit. 2. Reduce the number of states if necessary. 3. Assign binary values to the states. 4. Obtain the binary-coded state table. 5. Choose the type of flip-flops to be used. 6. Derive the simplified flip-flop input equations and output equations. 7. Draw the logic diagram. Prepared by: Engr. Zoren P. Mabunga Example Suppose we wish to design a circuit that detects a sequence of three or more consecutive 1’s in a string of bits coming through an input line (i.e, the input is a serial bit stream). A. Using D Flip-Flop B. Using JK Flip-Flop Prepared by: Engr. Zoren P. Mabunga Prepared by: Engr. Zoren P. Mabunga Prepared by: Engr. Zoren P. Mabunga Prepared by: Engr. Zoren P. Mabunga Prepared by: Engr. Zoren P. Mabunga Example Design a 3-bit binary counter using T-flip-flop Prepared by: Engr. Zoren P. Mabunga Prepared by: Engr. Zoren P. Mabunga Prepared by: Engr. Zoren P. Mabunga Prepared by: Engr. Zoren P. Mabunga Prepared by: Engr. Zoren P. Mabunga