Information Technology Essentials Lecture 04 PDF
Document Details
2024
Dr. Karim Lounis
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Summary
This lecture covers the fundamentals of computer architecture, focusing on the central processing unit (CPU). It discusses the Von Neumann architecture, different types of processors, and instruction sets, including CISC and RISC. The lecture is part of Information Technology Essentials course and is from Fall 2024.
Full Transcript
Information Technology Essentials — Lecture 04 Dr. Karim Lounis Fall 2024 Dr. Karim Lounis Information Technology Essentials Fall 2024 1 / 32 Computer Architecture Computer Architecture Dr. Karim Lounis...
Information Technology Essentials — Lecture 04 Dr. Karim Lounis Fall 2024 Dr. Karim Lounis Information Technology Essentials Fall 2024 1 / 32 Computer Architecture Computer Architecture Dr. Karim Lounis Information Technology Essentials Fall 2024 2 / 32 Computer Architecture Computer Architecture Computers have considerably evolved in terms of structure (or architecture), size, and performance. However, from a superfecial viewpoint, the various computers have three common “main” components: CPU Is the central processing unit (a.k.a., Processor or Microproces- sor) responsible for performing arithmetic and logical operations. Central Memory. Is the component responsible for storing programs to be executed by the computer. Peripherals. A.k.a., I/O devices, are components used to input or output information to and from a computer. These three components are interconnected via communication lines in a cricuit board, known as the motherboard. Dr. Karim Lounis Information Technology Essentials Fall 2024 3 / 32 Computer Architecture Computer Architectures The main three components of a computer: Dr. Karim Lounis Information Technology Essentials Fall 2024 4 / 32 Computer Architecture Computer Architecture These three components are interconnected via communication lines (system bus) in a cricuit board, known as the motherboard. Dr. Karim Lounis Information Technology Essentials Fall 2024 5 / 32 Computer Architecture Von Neumann Architectural Model Computer can be represented by the Von Neumann architectural model: Dr. Karim Lounis Information Technology Essentials Fall 2024 6 / 32 Computer Architecture Computer Architecture (Recap) Keep the following in mind: A computer uses a CPU to perform arithemtic and logical operations. Executing programs is all about perfoming a combination of these op- erations. These basic operations form the building blocks of more complex operations (i.e., computations). A computer the central memory to temporarly store the programs that are to be executed by the CPU as well as any input and output. A computer uses input peripherals to obtain input from the user of the computer and output peripherals to output results to the user. The motherboard, through the system bus, allows the three different components to be connected for communication. The Von Neumann architectural model is used to abstractly represent modern general-purpose computers. Dr. Karim Lounis Information Technology Essentials Fall 2024 7 / 32 Computer Architecture Computer Architecture Let’s dive into the details Dr. Karim Lounis Information Technology Essentials Fall 2024 8 / 32 Computer Architecture CPU (Central Processor Unit) I. Central Processing Unit Dr. Karim Lounis Information Technology Essentials Fall 2024 9 / 32 Computer Architecture CPU (Central Processor Unit) CPU (Processors) Processor or Microprocessor, is a complex electronic circuit designed to execute machine instructions at a very high speed. Processors are featured by their: frequency (in MHz or GHz), internal memory (cache & registers), word size (8-64 bit), and number of cores. A processor is connected to the motherboard through the CPU socket. The CPU requires a fan to keep its temperature cool. Dr. Karim Lounis Information Technology Essentials Fall 2024 10 / 32 Computer Architecture CPU (Central Processor Unit) Processors Processor or Microprocessor, is a complex electronic circuit designed to execute machine instructions at a very high speed. Processors are featured by their: frequency (in MHz or GHz), internal memory (cache & registers), word size (8-64 bit), and number of cores. Another feature is IPC, or Instruction Per clock Cycle. It measures the average number of instructions that the CPU can execute per clock cycle. Dr. Karim Lounis Information Technology Essentials Fall 2024 11 / 32 Computer Architecture CPU (Central Processor Unit) Processors Processor or Microprocessor, is a complex electronic circuit designed to execute machine instructions at a very high speed. Processors are featured by their: frequency (in MHz or GHz), internal memory (cache & registers), word size (8-64 bit), and number of cores. Structurally, a CPU consists of: Arithmetic Logical Unit (ALU): performs airhtmetic and logical operations. Control Unit (CU): fetches and decodes instructions. Registers: small and fast storage locations (of length word-size) for instruc- tions execution. Some of them are general-purpose (e.g., AX, BX, CX, DX, etc), whereas other are special-purpose (e.g., MAR, MBR, PC, SP, BP, etc). Cache memory: small memory location organized in levels L1, L2, & L3. Communicaiton buses: address, data, and control bus. Dr. Karim Lounis Information Technology Essentials Fall 2024 12 / 32 Computer Architecture CPU (Central Processor Unit) Processor Modern CPU design: Include multiple computing cores on a single chip, they are called multicore, e.g., Intel Pentium D (2005) dual-core, Core i3, i5, and i9, AMD RYZEN 3, Apple Silicon M1/2, etc. Multicore CPUs have an ALU and CU for each core. Also, on certain architectures, each core has its dedicated cache (L1, L2, & L3), whereas on other architectures, the cores may share the third level cache. Dr. Karim Lounis Information Technology Essentials Fall 2024 13 / 32 Computer Architecture CPU (Central Processor Unit) Processors On Windows PCs you can see the computer’s CPU features by browsing the computer’s properties: Dr. Karim Lounis Information Technology Essentials Fall 2024 14 / 32 Computer Architecture CPU (Central Processor Unit) Processors On GNU/Linux you can see the computer’s CPU features by executing the command lscpu: Dr. Karim Lounis Information Technology Essentials Fall 2024 15 / 32 Computer Architecture CPU (Central Processor Unit) Processors In GNU/Linux you can see the computer’s CPU features by executing the command lscpu: Dr. Karim Lounis Information Technology Essentials Fall 2024 16 / 32 Computer Architecture CPU (Central Processor Unit) Processor Instruction Set Processor Instruction Set: is the set of machine instructions that a given processor is able to decode and execute (supported instructions). Two main classes: CISC and RISC. Complex Instruction Set Computer. Is a computer architecture in which single instructions can execute several low-level operations. PDP-11 and VAX architectures, Motorola 6800, 6809 and 68000-families, the Intel 8080, iAPX432 and x86-family, the Zilog Z80, Z8 and Z8000-families, the Intel 8051-family, & others. Reduced Instruction Set Computer. Is a computer architecture in which each single instruction can execute one single low-level operation. ARC processor, the DEC Alpha, the AMD Am29000, the ARM architecture, the Atmel AVR, Blackfin, Intel i860, Intel i960, LoongArch, Motorola 88000, the MIPS architecture, the PA-RISC, the Power ISA, the RISC-V, the SuperH, and the SPARC. Dr. Karim Lounis Information Technology Essentials Fall 2024 17 / 32 Computer Architecture CPU (Central Processor Unit) Processor Instruction Set Processor Instruction Set: is the set of machine instructions that a given processor is able to decode and execute (supported instructions). Two main classes: CISC and RISC. Complex Instruction Set Computer. Is a computer architecture in which single instructions can execute several low-level operations. Requires less instructions for a given code. Microprogramming is easy to implement. CISC processors are larger as they contain more transistors. May take multiple cycles per line of code, decreasing efficiency. Reduced Instruction Set Computer. Is a computer architecture in which each single instruction can execute one single low-level operation. Requires more instructions for a given code. Greater performance due to simplified instruction set. Used in supercomputer, such as the Fugaku. Less expensive, as they use smaller chips. Dr. Karim Lounis Information Technology Essentials Fall 2024 18 / 32 Computer Architecture CPU (Central Processor Unit) Processor Instruction Set Nowadays, we rather talk about x86 processors Vs ARM processors instead of CISC Vs RISC processor. This is because most processors used these days are either Intel-based (i.e., x86) or ARM-based. Dr. Karim Lounis Information Technology Essentials Fall 2024 19 / 32 Computer Architecture CPU (Central Processor Unit) Processor Instruction Set Processor instruction set: is the set of machine instructions that a given processor is able to decode and execute (supported instructions). The following instructions are assembly instructions for CISC x86 computer achitecture: Mov Ax, 0x1B25 //Moves the value 0x1b25 to the register AX. Mov Al, 0x25 //Moves the value 0x25 to lower part of AX. Inc Ax //Increments the value in the register Ax by 1. Dec Ax //Decrements the value in the register Ax by 1. Push Ax //pushes to content of Ax into the stack (SP-2). Pop Ax //pops the content pointed at [SP] in the stack into Ax register. Jmp T //Jumps to the instruction labeled with T. Cmp Ax, 1 //Compares the value stored in the Ax register with 1. Je T //Jumps to T if the previously compared values were equal. Dr. Karim Lounis Information Technology Essentials Fall 2024 20 / 32 Computer Architecture CPU (Central Processor Unit) Processor Instruction Set More instructions... Jle T //Jumps if the 1st operand is ≤ to the 2ed. Loop T //Decrements Cx and jumps to T if Cx̸= 0. Xor Ax, Bx //Xor of Ax and Bx and stores result in Ax. Halt //Terminates program. RSIC-based processors will have a different processor instruction set. E.g.,: LDR R0, =0x200 ADD R1, R2, ♯10 CMP R0, R1 MOV R0, ♯10 STR R2, [R0] BEQ T LDR R1, [R0] T Loop SUBS R0, R0, ♯1 In what follows, most of the examples are given in CISC x86 assembly language (i.e., use the x86 instructions set) on a 16-bit computer. Dr. Karim Lounis Information Technology Essentials Fall 2024 21 / 32 Computer Architecture CPU (Central Processor Unit) Processor Instruction Set Definition Machine code: is a sequence of bytes 01010101 01010111...01010100 that can be interpreted and executed by a dedicated CPU. Each instruction in the assembly language is transformed into a machine code by the assembler program (e.g., Netwide Assembler a.k.a., nasm). Each instruction in machine code is generally composed of an Operation code (opcode) and operand. MOV Ax, [0xF565] | JMP Label INC Ax | ADD Ax, Bx | MOV Ax, Bx Some instructions just consists of an operation code: NOP | HLT | RET | CLI | STI Instructions may have different sizes, e.g., in Intel, 1 Byte to 14 Bytes. Dr. Karim Lounis Information Technology Essentials Fall 2024 22 / 32 Computer Architecture CPU (Central Processor Unit) Processor Instruction Set (E.g., Intel 8086 microprocessor) Consider the following x86-assembly program (Result stored in Ax ): Start: MOV Ax, 0X0001 MOV Cx, 0X0001 T: MUL Ax, Cx INC Cx CMP Cx, 0X0005 JBE T //Jump if CX is below or equal to 5 HLT Try it at: https://yjdoc2.github.io/8086-emulator-web/compile Dr. Karim Lounis Information Technology Essentials Fall 2024 23 / 32 Computer Architecture CPU (Central Processor Unit) Processor Instruction Set (E.g., Intel 8086 microprocessor) Consider the following x86-assembly program (Result stored in Ax ): Start: MOV Ax, 0X0001 MOV Cx, 0X0001 T: MUL Ax, Cx INC Cx CMP Cx, 0X0005 JBE T //Jump if CX is below or equal to 5 HLT At the end of this program the register Ax contains the value 0x0078. Dr. Karim Lounis Information Technology Essentials Fall 2024 24 / 32 Computer Architecture CPU (Central Processor Unit) Processor Instruction Set (Instruction Per Clock Cycle) Instruction Per Clock cycle refers to the average number of instructions that a CPU can simultaniously perform per single clock cycle (CC). Eariler processors (Sequential CPUs) performed one machine cycle per- clock cycle. I.e., around three or more clock cycles per simple instruction. Next processors (Pipelined CPUs) performed multiple machine cycles per- clock cycle. E.g., executing I1, decoding I2, and fetching for I3. RISC processors run most of their instructions in one clock cycle Certain instructions (complex instructions) may take several clock cycles to execute (e.g., CALL takes 18 clock cycle on an MCS-51). Reading a 16-bit data from RAM using an 8-bit data bus may take several cycles. Modern processors (Superscalar CPUs) can execute multiple instruction- sper clock cycle. They use ILP (Instruction-Level Parallelism). Dr. Karim Lounis Information Technology Essentials Fall 2024 25 / 32 Computer Architecture CPU (Central Processor Unit) Single-Processor Systems In a single-processor system, there is only one CPU (Central Process Unit) capable of executing a general-purpose instruction set. Figure: Motherboard of a single-processor computer Such systems do have other special-purpose processors such as device- specific processor (or controllers), or a general-purpose processor on mainframes. A system with n special-purpose processors and one general-purpose processor is a single-processor system. Dr. Karim Lounis Information Technology Essentials Fall 2024 26 / 32 Computer Architecture CPU (Central Processor Unit) Single-Processor Systems In a single-processor system, there is only one CPU (Central Process Unit) capable of executing a general-purpose instruction set. Graphical Processing Unit A.k.a., GPU. Is a special-purpose processor used for processing visual and graphical-related tasks. Figure: Motherboard of a single-processor computer Such systems do have other special-purpose processors such as device- specific processor (or controllers), or a general-purpose processor on mainframes. As they are optimized for parallel processing, they r usedn aspecial-purpose A system with lot for scientific simulations, cryptanalysis, processors and and one general-purpose processor isAIa applications. single-processor system. Dr. Karim Lounis Information Technology Essentials Fall 2024 27 / 32 Computer Architecture CPU (Central Processor Unit) Single-Processor Systems In a single-processor system, there is only one CPU (Central Process Unit) capable of executing a general-purpose instruction set. Tensor Processing Unit Developed by Google to accelerate machine learning workloads, particularly those involving deep learning neural networks. Figure: Motherboard of a single-processor computer Such systems do have other special-purpose processors such as device- specific processor (or controllers), or a general-purpose processor on mainframes. TPUs A system with are designed to deliver n special-purpose high-speed, processors low-latency and one general-purpose computation for large-scale processor is a single-processor system. AI applications. Dr. Karim Lounis Information Technology Essentials Fall 2024 28 / 32 Computer Architecture CPU (Central Processor Unit) Multiprocessor Systems In a multiprocessor system, there are two or more CPUs capable of executing a general-purpose instruction set, and sharing the computer bus, [clock], memory, and peripheral devices. Figure: Motherboard of a multiprocessor computer Appeared in servers then migrated to desktops, laptops, and recently smartphones and tablets. Cheaper than multiple single-core systems and provide better through- put, response time, turn around time, and higher reliability. Dr. Karim Lounis Information Technology Essentials Fall 2024 29 / 32 Computer Architecture CPU (Central Processor Unit) Multiprocessor Systems Modern CPU design: Include multiple computing cores on a single chip, they are called multicore, e.g., Intel Pentium D (2005) dual-core, Core i3, i5, and i9, AMD RYZEN 3, Apple Silicon M1/2, etc. Dr. Karim Lounis Information Technology Essentials Fall 2024 30 / 32 Computer Architecture CPU (Central Processor Unit) Multiprocessor Systems Clustered Systems: Are composed of several computer systems (a.k.a., hosts) connected via a local area network. Each of the computer systems can be a single-processor system or a multicore system. Clusters emerged: low-cost microprocessors, high-speed networks, and software for high-performance distributed computing. Clusters are used to share storage and provide high availability. Can provide HPC (High Performance Computing) environments. Dr. Karim Lounis Information Technology Essentials Fall 2024 31 / 32 End of Presentation End. Dr. Karim Lounis Information Technology Essentials Fall 2024 32 / 32