Digital Electronic Systems Lecture Notes PDF

Higher Institute of Engineering, El Shorouk Biomedical and Systems Engineering Department BIS 471 and BIS 461 Digital Electronic Systems (1) Lecture 1 Dr. Mostafa Elhussien Dr. Mostafa Elhussien Digital Electronic Sy...

Higher Institute of Engineering, El Shorouk Biomedical and Systems Engineering Department BIS 471 and BIS 461 Digital Electronic Systems (1) Lecture 1 Dr. Mostafa Elhussien Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 1  POWER SUPPLIES The Basic DC Power Supply The dc power supply converts the standard 120 V, 60 Hz ac available at wall outlets into a constant dc voltage. The dc voltage produced by a power supply is used to power all types of electronic circuits, such as Television receivers, Stereo systems, VCRs, Computers, Laboratory equipment. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 2  POWER SUPPLIES The Basic DC Power Supply Power supplies are an essential part of all electronic systems from the simplest to the most complex. A basic power supply consists of a rectifier, a filter, and a regulator. The rectifier converts the ac input voltage to a pulsating dc voltage, which is half-wave rectified or full-wave rectified. A capacitor filter eliminates the fluctuations in the rectified voltage and produces a relatively smooth dc voltage. The regulator is a circuit that maintains a constant dc voltage for variations in the input line voltage or in the load. Regulators vary from a single device to more complex integrated circuits. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 3  POWER SUPPLIES The Basic DC Power Supply Half-wave rectifier Power supplies Rectifier Full-wave rectifier Filter Capacitors Integrated circuit Regulator voltage regulators Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 4  POWER SUPPLIES The Basic DC Power Supply Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 5  POWER SUPPLIES Capacitor-Input Filter A half-wave rectifier with a capacitor-input filter is shown in Figure. During the positive first quarter-cycle of the input, the diode is forward-biased, allowing the capacitor to charge to approximately the diode drop of the input peak, as illustrated in Figure (a). When the input begins to decrease below its peak, as shown in part (b), the capacitor retains its charge and the diode becomes reverse-biased. During the remaining part of the cycle, the capacitor can discharge only through the load resistance at a rate determined by 𝑅𝐿 𝐶 the time constant. The larger the time constant, the less the capacitor will discharge. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 6  POWER SUPPLIES Capacitor-Input Filter Because the capacitor charges to a peak value equal to 𝑉𝑝 𝑖𝑛 the peak inverse voltage of the diode in this application is 𝑃𝐼𝑉 = 2𝑉𝑝 𝑖𝑛 During the first quarter of the next cycle, as illustrated in Figure (c), the diode again will become forward-biased when the input voltage exceeds the capacitor voltage. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 7  POWER SUPPLIES Capacitor-Input Filter (Ripple Voltage) The capacitor quickly charges at the beginning of a cycle and slowly discharges after the positive peak (when the diode is reverse-biased). The variation in the output voltage due to the charging and discharging is called the ripple voltage. The smaller the ripple, the better the filtering action, as illustrated in Figure. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 8  POWER SUPPLIES Capacitor-Input Filter (Ripple Voltage) For a given input frequency, the output frequency of a full-wave rectifier is twice that of a half- wave rectifier. As a result, a full-wave rectifier is easier to filter. When filtered, the full-wave rectified voltage has a smaller ripple than does a half-wave signal for the same load resistance and capacitor values. A smaller ripple occurs because the capacitor discharges less during the shorter interval between full-wave pulses, as shown in Figure. A good rule of thumb for effective filtering is to make 𝑅𝐿 𝐶 ≥ 10𝑇 where T is the period of the rectified voltage. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 9  POWER SUPPLIES Capacitor-Input Filter (Ripple Voltage) The ripple factor 𝑟 is an indication of the effectiveness of the filter and is defined as the ratio of the ripple voltage 𝑉𝑟 to the dc (average) value of the filter output voltage 𝑉𝐷𝐶. 𝑉𝑟 𝑟= 100% 𝑉𝐷𝐶 These parameters are illustrated in Figure. The lower the ripple factor, the better the filter. The ripple factor can be decreased by increasing the value of the filter capacitor. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 10  POWER SUPPLIES IC Regulated Power Supplies While filters can reduce the ripple from power supplies to a low value, the most effective filter is a combination of a capacitor-input filter used with an integrated circuit (IC) voltage regulator. An integrated circuit regulator is a device that is connected to the output of a filtered rectifier and maintains a constant output voltage despite changes in the input, the load current, or the temperature. The capacitor-input filter reduces the input ripple to the regulator to an acceptable level. The combination of a large capacitor and an IC regulator is inexpensive and helps produce an excellent small power supply. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 11  POWER SUPPLIES IC Regulated Power Supplies The most popular IC regulators have three terminals: an input terminal, an output terminal, and a reference (or adjust) terminal. The input to the regulator is first filtered with a capacitor to reduce the ripple to less than 10%. The regulator further reduces the ripple to a negligible amount. In addition, most regulators have an internal voltage reference, short-circuit protection, and thermal shutdown circuitry. They are available in a variety of voltages, including positive and negative outputs, and can be designed for variable outputs with a minimum of external components. Typically, IC regulators can furnish a constant output of one or more amps of current with high ripple rejection. IC regulators are available that can supply load currents of over 5 A. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 12  POWER SUPPLIES IC Regulated Power Supplies Three-terminal regulators designed for a fixed output voltage require only external capacitors to complete the regulation portion of the power supply, as shown in Figure (a). Filtering is accomplished by a large-value capacitor between the input voltage and ground. Sometimes a second smaller-value input capacitor is connected in parallel, especially if the filter capacitor is not close to the IC, to prevent oscillation. This capacitor needs to be located close to the IC. Finally, an output capacitor (typically 0.1𝜇𝐹 to 1𝜇𝐹) is placed in parallel with the output to improve the transient response. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 13  POWER SUPPLIES IC Regulated Power Supplies Examples of three-terminal regulators are the 78XX series of positive regulators (and the corresponding 79XX series of negative regulators.) The last two digits in the number stand for the output voltage; thus, the 7812 is a positive regulator with a +12𝑉 output, and the 7912 is a negative regulator with a −12𝑉 output. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 14  POWER SUPPLIES IC Regulated Power Supplies A basic fixed power supply with a 7805 regulator is shown in Figure. The output of the bridge is filtered by a relatively large electrolytic capacitor to reduce ripple and present a dc to the input of the regulator. This voltage should be about 2.5 V larger than the output voltage for the 7805 regulator to be able to hold regulation—or at least 7.5 V out of the bridge. The schematic shows a standard 12.6 V transformer, but for the 7805, a lower voltage can be supplied by the transformer and still work nicely, as long as the peak secondary voltage is at least 9 V (to allow for diode drops and head room for the regulator). Generally, heat sinking is required to prevent the regulator from overheating. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 15  POWER SUPPLIES Percent Regulation The regulation expressed as a percentage is a figure of merit used to specify the performance of a voltage regulator. It can be in terms of input (line) regulation or load regulation. Line regulation specifies how much change occurs in the output voltage for a given change in the input voltage. It is typically defined as a ratio of a change in output voltage for a corresponding change in the input voltage expressed as a percentage. ∆𝑉𝑂𝑈𝑇 𝐿𝑖𝑛𝑒 𝑟𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 = 100% ∆𝑉𝐼𝑁 Load regulation specifies how much change occurs in the output voltage over a certain range of load current values, usually from minimum current (no load, NL) to maximum current (full load, FL). It is normally expressed as a percentage and can be calculated with the following formula: 𝑉𝑁𝐿 − 𝑉𝐹𝐿 𝐿𝑜𝑎𝑑 𝑟𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 = 100% 𝑉𝐹𝐿 Where 𝑉𝑁𝐿 is the output voltage with no load and 𝑉𝐹𝐿 is the output voltage with full (maximum) load. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 16  POWER SUPPLIES Percent Regulation (Example) Assume a certain 7805 regulator has a measured no-load output voltage of 5.18 V and a full-load output of 5.15 V. What is the load regulation expressed as a percentage? Solution 𝑉𝑁𝐿 − 𝑉𝐹𝐿 𝐿𝑜𝑎𝑑 𝑟𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 = 100% 𝑉𝐹𝐿 5.18 𝑉 − 5.15 𝑉 𝐿𝑜𝑎𝑑 𝑟𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 = 100% 5.15 𝑉 𝐿𝑜𝑎𝑑 𝑟𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 = 0.58 % Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 17  Addressing the limitations of linear power supplies Advantages of linear supplies: Greatest disadvantage is large size and weight Simple, Due primarily to size of AC step-down transformer Low-cost, Size / weight increase as current rating Robust, increases Clean output, Another disadvantage is lack of flexibility Low electromagnetic Ability to operate on different supply voltages / emissions frequencies Ability to produce different output voltages Challenge: how to reduce the size of the transformer? Transformer size decreases as frequency increases But AC mains frequency is normally 50-60 Hz (fixed) Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 18  Switching Mode Power Supplies (SMPS) Also called "switch" or "switched" mode Mains AC is rectified and filtered to produce high-voltage DC High voltage DC is "chopped" into a high frequency pulsed signal using a switch (usually a MOSFET) A transformer converts this high voltage, high frequency pulsed signal into a lower voltage (but still high frequency) pulsed signal High frequency → smaller transformer Lower amplitude pulsed DC is then rectified and filtered to produce a constant (non-pulsed) DC output Regulation of output voltage is performed by varying the duty cycle of the switch / chopper Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 19  Basic AC-DC SMPS block diagram Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 20  AC rectifier and filter Mains AC is rectified using diodes Usually using a bridge rectifier Rectifier output is then filtered / smoothed using capacitors Produces (very) high voltage DC Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 21  Switcher (Chopper) "Chops" the high voltage DC into pulses Usually, a MOSFET is used as switch Other types of power transistors can also be used High frequency pulsed signal at gate switches the MOSFET between on and off states FET has high efficiency when operated this way Low power dissipation in on and off states Switching signal frequency is typically in the range of tens of kHz to several MHz Generated by a regulator / feedback circuit Duty cycle of switching signal controls the output voltage Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 22  Transformer Steps the high-voltage, high-frequency, pulsed DC down to a lower voltage High voltage pulses → lower voltage pulses Increasing frequency decreases size of Transformer Filtering capacitors Higher frequency allows SMPS to be smaller / lighter than comparable linear power supplies Transformer also provides electrical isolation between high and low voltages Important for safety Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 23  Pulsed DC rectifier and filter The stepped down, pulsed DC is rectified to produce non-pulsed DC Done using various combinations of diodes, capacitors, and/or inductors Because of the higher frequency, the filtering capacitors in this stage can be smaller than those used to rectify lower frequency, AC mains voltage Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 24  Voltage regulator / controller Maintains a constant output voltage as load impedance (and/or source voltage) changes Monitors the DC output voltage Compares it to a stable reference voltage Duty cycle of the pulsed gate signal controls the output voltage If output too high, duty cycle is decreased If output too low, duty cycle is increased Feedback is usually via an opto-isolator For electrical isolation / safety Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 25  Advantages and disadvantages of SMPS Advantages Disadvantages Small size / weight Complicated High efficiency More expensive Flexible line voltage Higher conducted and and frequency radiated emissions Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 26  DC-DC conversion SMPS are also for DC-DC conversion Step up or step-down DC voltages Very common application of SMPS Different types of DC-DC converters Buck: reduces (steps down) input voltage Boost: increases (steps up) input voltage Buck-Boost: can step voltage up or down Note however that if no transformer is used, there is no electrical isolation between input and output Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 27  Summary Switching mode power supplies can be used to convert AC to DC or convert between DC voltages A semiconductor switch (often a MOSFET) is used to "chop" a DC voltage into a high frequency pulsed signal Reduces the required transformer / capacitor sizes Allows control of output voltage by varying the duty cycle of a pulsed signal at the gate Transformers are used to step down voltages and for electrical isolation (safety) Capacitors, inductors, and diodes are used to rectify and filter the voltage at various points in the supply SMPS offer significant advantages over linear supplies Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 1 28  Higher Institute of Engineering, El Shorouk Biomedical and Systems Engineering Department BIS 471 and BIS 461 Digital Electronic Systems (1) Lecture 2 Dr. Mostafa Elhussien Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 1  Introduction to Digital Logic Gates A Digital Logic Gate is an electronic device that makes logical decisions based on digital signal levels present at its inputs. A digital logic gate may have more than one input but only has one digital output. Standard commercially available digital logic gates are available in two basic families, TTL such as the 7400 series, and CMOS which is the 4000 series of chips. Simple digital logic gates can also be made by connecting together diodes, transistors and resistors to produce DRL, Diode-Resistor logic gates, DTL, Diode-Transistor logic gates or ECL, Emitter-Coupled logic gates but these are less common now compared to the popular CMOS family. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 2  Introduction to Digital Logic Gates AND OR A simple N-input RTL NOR Gate Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 3  Introduction to Digital Logic Gates The combination of several logic gates into one package is called Integrated Circuits (IC's) which can be grouped together into families according to the number of transistors or "gates" that they contain. For example, a simple AND gate my contain only a few individual transistors, were as a more complex microprocessor may contain many thousands of individual transistor gates. Integrated circuits are categorized according to the number of logic gates or the complexity of the circuits within a single chip with the general classification for the number of individual gates given as: Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 4  Introduction to Digital Logic Gates Type Count Example Small Scale Integration (SSI) Up to 10 transistors or a few gates within AND, OR, NOT a single package Medium Scale Integration (MSI) Between 10 and 100 transistors or tens of Perform digital operations such as adders gates and counters Large Scale Integration (LSI) Between 100 and 1,000 transistors or Perform specific digital operations such hundreds of gates as I/O chips, memory, arithmetic and logic units Very-Large Scale Integration (VLSI) Between 1,000 and 10,000 transistors or Perform computational operations such as thousands of gates processors, large memory arrays and programmable logic devices Super-Large Scale Integration (SLSI) Between 10,000 and 100,000 transistors Perform computational operations such as microprocessor chips, micro-controllers, basic PICs and calculators Ultra-Large Scale Integration (ULSI) More than 1 million transistors Used in computers CPUs, GPUs (video processors), micro-controllers, FPGAs and complex PICs. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 5  Introduction to Digital Logic Gates Another level of integration which represents the complexity of the Integrated Circuit is known as the System-on-Chip or (SOC). Here the individual components such as the microprocessor, memory, peripherals, I/O logic etc, are all produced on a single piece of silicon, literally putting the word "integrated" into integrated circuit. These complete integrated chips which can contain up to 100 million individual silicon-CMOS transistor gates within one single package are generally used in mobile phones, digital cameras, micro-controllers, PIC's and robotic type applications. Benefits of SOC Reduce overall system cost Increase performance Lower power consumption Reduce size Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 6  Introduction to Digital Logic Gates Characterization of Digital ICs The various characteristics of digital ICs that can be used to compare their performance are: Speed of operation (propagation delay) Power dissipation (power consumption under static condition, O, 1; during the switching intervals or dynamic conditions) Current and voltage parameters (High level input and output voltages and low level input and output voltages) Noise immunity (measure of how much stray noise voltage the device can handle without giving any error) Fan-out (No. of gates that gate in HIGH output state can feed without voltage dropping by more than the allowable noise margin) Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 7  DC Supply Voltage The nominal value of the dc supply voltage for TTL (transistor-transistor logic) devices is +5 V. CMOS (complementary metal-oxide semiconductor) devices are available in different supply voltage categories: +5 V, +3.3 V, 2.5 V, and 1.8 V. Although omitted from logic diagrams for simplicity, the dc supply voltage is connected to the 𝑉𝐶𝐶 pin of an IC package, and ground is connected to the GND pin. Both voltage and ground are distributed internally to all elements within the package, as illustrated in Figure for a 14-pin package. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 8  CMOS Logic Levels There are four different logic-level specifications: 𝑉𝐼𝐿 , 𝑉𝐼𝐻 , 𝑉𝑂𝐿 𝑎𝑛𝑑 𝑉𝑂𝐻 For CMOS circuits, the ranges of input voltages 𝑉𝐼𝐿 that can represent an acceptable LOW (logic 0) are from 0 V to 1.5 V for the +5 V logic and 0 V to 0.8 V for the 3.3 V logic. The ranges of input voltages 𝑉𝐼𝐻 that can represent an acceptable HIGH (logic 1) are from 3.5 V to 5 V for the 5 V logic and 2 V to 3.3 V for the 3.3 V logic, as indicated in Figure. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 9  CMOS Logic Levels The ranges of values from 1.5 V to 3.5 V for 5 V logic and 0.8 V to 2 V for 3.3 V logic are regions of unpredictable performance, and values in these ranges are unacceptable. When an input voltage is in one of these ranges, it can be interpreted as either a HIGH or a LOW by the logic circuit. Therefore, CMOS gates cannot be operated reliably when the input voltages are in these unacceptable ranges. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 10  CMOS Logic Levels The ranges of CMOS output voltages 𝑉𝑂𝐿 𝑎𝑛𝑑 𝑉𝑂𝐻 for both 5 V and 3.3 V logic are also shown in Figure. Notice that the minimum HIGH output voltage, 𝑉𝑂𝐻 𝑚𝑖𝑛 , is greater than the minimum HIGH input voltage, 𝑉𝐼𝐻 𝑚𝑖𝑛. Also, notice that the maximum LOW output voltage, 𝑉𝑂𝐿 𝑚𝑎𝑥 , is less than the maximum LOW input voltage, 𝑉𝐼𝐿 𝑚𝑎𝑥 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 11  CMOS Logic Levels Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 12  TTL Logic Levels The input and output logic levels for TTL are given in Figure. Just as for CMOS, there are four different logic level specifications: 𝑉𝐼𝐿 , 𝑉𝐼𝐻 , 𝑉𝑂𝐿 𝑎𝑛𝑑 𝑉𝑂𝐻. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 13  Noise Immunity Noise is unwanted voltage that is induced in electrical circuits and can present a threat to the proper operation of the circuit. Wires and other conductors within a system can pick up stray high-frequency electromagnetic radiation from adjacent conductors in which currents are changing rapidly or from many other sources external to the system. Also, power-line voltage fluctuation is a form of low-frequency noise. In order not to be adversely affected by noise, a logic circuit must have a certain amount of noise immunity. This is the ability to tolerate a certain amount of unwanted voltage fluctuation on its inputs without changing its output state. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 14  Noise Immunity For example, if noise voltage causes the input of a 5 V CMOS gate to drop below 3.5 V in the HIGH state, the input is in the unacceptable region and operation is unpredictable. Thus, the gate may interpret the fluctuation below 3.5 V as a LOW level, as illustrated in Figure. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 15  Noise Immunity For example, if noise voltage causes the input of a 5 V CMOS gate to drop below 3.5 V in the HIGH state, the input is in the unacceptable region and operation is unpredictable. Thus, the gate may interpret the fluctuation below 3.5 V as a LOW level, as illustrated in Figure. Similarly, if noise causes a gate input to go above 1.5 V in the LOW state, an uncertain condition is created, as illustrated in part (b). Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 16  Noise Margin A measure of a circuit’s noise immunity is called the noise margin, which is expressed in volts. There are two values of noise margin specified for a given logic circuit: The HIGH-level noise margin (𝑉𝑁𝐻 ) and the LOW-level noise margin (𝑉𝑁𝐿 ). These parameters are defined by the following equations: 𝑉𝑁𝐻 = 𝑉𝑂𝐻 𝑚𝑖𝑛 − 𝑉𝐼𝐻 𝑚𝑖𝑛 𝑉𝑁𝐿 = 𝑉𝐼𝐿 𝑚𝑎𝑥 − 𝑉𝑂𝐿 𝑚𝑎𝑥 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 17  Noise Margin (Example) Determine the HIGH-level and LOW-level noise margins for CMOS and for TTL by using the information in Figures. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 18  Noise Margin (Example) Determine the HIGH-level and LOW-level noise margins for CMOS and for TTL by using the information in Figures. For 5 V CMOS, 𝑉𝐼𝐻 𝑚𝑖𝑛 = 3.5 𝑉 𝑉𝐼𝐿 𝑚𝑎𝑥 = 1.5 𝑉 𝑉𝑂𝐻 𝑚𝑖𝑛 = 4.4 𝑉 𝑉𝑂𝐿 𝑚𝑎𝑥 = 0.33 𝑉 𝑉𝑁𝐻 = 𝑉𝑂𝐻 𝑚𝑖𝑛 − 𝑉𝐼𝐻 𝑚𝑖𝑛 = 4.4 − 3.5 = 0.9 𝑉 𝑉𝑁𝐿 = 𝑉𝐼𝐿 𝑚𝑎𝑥 − 𝑉𝑂𝐿 𝑚𝑎𝑥 = 1.5 − 0.33 = 1.17 𝑉 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 19  Noise Margin (Example) Determine the HIGH-level and LOW-level noise margins for CMOS and for TTL by using the information in Figures. For TTL, 𝑉𝐼𝐻 𝑚𝑖𝑛 =2𝑉 𝑉𝐼𝐿 𝑚𝑎𝑥 = 0.8 𝑉 𝑉𝑂𝐻 𝑚𝑖𝑛 = 2.4 𝑉 𝑉𝑂𝐿 𝑚𝑎𝑥 = 0.4 𝑉 𝑉𝑁𝐻 = 𝑉𝑂𝐻 𝑚𝑖𝑛 − 𝑉𝐼𝐻 𝑚𝑖𝑛 = 2.4 − 2 = 0.4 𝑉 𝑉𝑁𝐿 = 𝑉𝐼𝐿 𝑚𝑎𝑥 − 𝑉𝑂𝐿 𝑚𝑎𝑥 = 0.8 − 0.4 = 0.4 𝑉 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 20  Power Dissipation A logic gate draws current from the dc supply voltage source, as indicated in Figure. When the gate is in the HIGH output state, an amount of current designated by 𝐼𝐶𝐶𝐻 is drawn; and in the LOW output state, a different amount of current, 𝐼𝐶𝐶𝐿 , is drawn. As an example, if 𝐼𝐶𝐶𝐻 is specified as 1.5 mA when 𝑉𝐶𝐶 is 5 V and if the gate is in a static (nonchanging) HIGH output state, the power dissipation (PD) of the gate is 𝑃𝐷 = 𝑉𝐶𝐶 𝐼𝐶𝐶𝐻 = 5 × 1.5 = 7.5 𝑚𝑊 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 21  Power Dissipation When a gate is pulsed, its output switches back and forth between HIGH and LOW, and the amount of supply current varies between 𝐼𝐶𝐶𝐻 and 𝐼𝐶𝐶𝐿. The average power dissipation depends on the duty cycle and is usually specified for a duty cycle of 50%. When the duty cycle is 50%, the output is HIGH half the time and LOW the other half. The average supply current is therefore 𝐼𝐶𝐶𝐻 + 𝐼𝐶𝐶𝐿 𝐼𝐶𝐶 = 2 The average power dissipation is 𝑃𝐷 = 𝑉𝐶𝐶 𝐼𝐶𝐶 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 22  Power Dissipation (Example) A certain gate draws 2 mA when its output is HIGH and 3.6 mA when its output is LOW. What is its average power dissipation if VCC is 5 V and the gate is operated on a 50% duty cycle? Solution The average 𝐼𝐶𝐶 is 𝐼𝐶𝐶𝐻 + 𝐼𝐶𝐶𝐿 2 + 3.6 𝐼𝐶𝐶 = = = 2.8 𝜇𝐴 2 2 The average power dissipation is 𝑃𝐷 = 𝑉𝐶𝐶 𝐼𝐶𝐶 = 5 × 2.8 = 14 𝜇𝑊 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 23  Power Dissipation Power dissipation in a TTL circuit is essentially constant over its range of operating frequencies. Power dissipation in CMOS, however, is frequency dependent. It is extremely low under static (dc) conditions and increases as the frequency increases. These characteristics are shown in the general curves of Figure. For example, the power dissipation of a low-power Schottky (LS) TTL gate is a constant 2.2 mW. The power dissipation of an HCMOS gate is 2.75 µW under static conditions and 170 µW at 100 kHz. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 24  CMOS Circuits The abbreviation CMOS stands for complementary metal-oxide semiconductor. The term complementary refers to the use of two types of transistors in the output circuit. An n-channel MOSFET (MOS field-effect transistor) and a p-channel MOSFET are used. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 25  The MOSFET Metal-oxide semiconductor field-effect transistors (MOSFETs) are the active switching elements in CMOS circuits. These devices differ greatly in construction and internal operation from bipolar junction transistors used in bipolar (TTL) circuits, but the switching action is basically the same: they function ideally as open or closed switches, depending on the input. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 26  The MOSFET Figure (a) shows the symbols for both n-channel and p- channel MOSFETs. As indicated, the three terminals of a MOSFET are gate, drain, and source. When the gate voltage of an n-channel MOSFET is more positive than the source, the MOSFET is on (saturation), and there is, ideally, a closed switch between the drain and the source. When the gate-to-source voltage is zero, the MOSFET is off (cutoff), and there is, ideally, an open switch between the drain and the source. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 27  The MOSFET The p-channel MOSFET operates with opposite voltage polarities, as shown in part (c). Sometimes a simplified MOSFET symbol as shown in Figure is used. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 28  CMOS Inverter Complementary MOS (CMOS) logic uses the MOSFET in complementary pairs as its basic element. A complementary pair uses both p-channel and n- channel enhancement MOSFETs, as shown in the inverter circuit in Figure. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 29  CMOS Inverter When a HIGH is applied to the input, as shown in When a LOW is applied to the input, as shown in Figure (a), the p-channel MOSFET Q1 is off and the Figure (b), Q1 is on and Q2 is off. n-channel MOSFET Q2 is on. This condition connects the output to +VDD (dc This condition connects the output to ground through supply voltage) through the on resistance of Q1, the on resistance of Q2, resulting in a LOW output. resulting in a HIGH output. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 30  CMOS NAND Gate Figure shows a CMOS NAND gate with two inputs. Notice the arrangement of the complementary pairs (n- channel and p-channel MOSFETs). The operation of a CMOS NAND gate is as follows: Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 31  CMOS NOR Gate Figure shows a CMOS NOR gate with two inputs. Notice the arrangement of the complementary pairs. The operation of a CMOS NAND gate is as follows: Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 32  Open-Drain Gates The term open-drain means that the drain terminal of the output transistor is unconnected and must be connected externally to VDD through a load. An open-drain gate is the CMOS counterpart of an open-collector TTL gate. An open-drain output circuit is a single n-channel MOSFET as shown in Figure (a). An external pull-up resistor must be used, as shown in part (b), to produce a HIGH output state. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 33  Tri-state CMOS Gates Tri-state outputs are available in both CMOS and TTL logic. The tri-state output combines the advantages of the totem-pole and open- collector circuits. As you recall, the three output states are HIGH, LOW, and high-impedance (high-Z). Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 34  Tri-state CMOS Gates When selected for normal logic-level operation, as determined by the state of the enable input, a tri- state circuit operates in the same way as a regular gate. When a tri-state circuit is selected for high-Z operation, the output is effectively disconnected from the rest of the circuit by the internal circuitry. Figure illustrates the operation of a tri-state circuit. The inverted triangle (𝛻) designates a tri-state output. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 35  Tri-state CMOS Gates The circuitry in a tri-state CMOS gate, as shown in Figure, allows each of the output transistors Q1 and Q2 to be turned off at the same time, thus disconnecting the output from the rest of the circuit. When the enable input is LOW, the device is enabled for normal logic operation. When the enable input is HIGH, both Q1 and Q2 are off and the circuit is in the high-Z state. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 36  Precautions for Handling CMOS All CMOS devices are subject to damage from electrostatic discharge (ESD). Therefore, they must be handled with special care. Review the following precautions: 1. All CMOS devices are shipped in conductive foam to prevent electrostatic charge buildup. When they are removed from the foam, the pins should not be touched. 2. The devices should be placed with pins down on a grounded surface, such as a metal plate, when removed from protective material. Do not place CMOS devices in polystyrene foam or plastic trays. 3. All tools, test equipment, and metal workbenches should be earth-grounded. A person working with CMOS devices should, in certain environments, have his or her wrist grounded with a length of cable and a large-value series resistor. The resistor prevents severe shock should the person come in contact with a voltage source. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 37  Precautions for Handling CMOS All CMOS devices are subject to damage from electrostatic discharge (ESD). Therefore, they must be handled with special care. Review the following precautions: 4. Do not insert CMOS devices (or any other ICs) into sockets or PCBs with the power on. 5. All unused inputs should be connected to the supply voltage or ground as indicated in Figure. If left open, an input can acquire electrostatic charge and “float” to unpredicted levels. 6. After assembly on PCBs, protection should be provided by storing or shipping boards with their connectors in conductive foam. The CMOS input and output pins may also be protected with large- value resistors connected to ground. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 2 38  Higher Institute of Engineering, El Shorouk Biomedical and Systems Engineering Department BIS 471 and BIS 461 Digital Electronic Systems (1) Lecture 3 Dr. Mostafa Elhussien Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 1  The Bipolar Junction Transistor The bipolar junction transistor (BJT) is the active switching element used in all TTL circuits. Figure shows the symbol for an npn BJT with its three terminals; base, emitter, and collector. A BJT has two junctions, the base-emitter junction and the base-collector junction. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 2  The Bipolar Junction Transistor The basic switching operation is as follows: When the base is approximately 0.7 V more positive than the emitter and when sufficient current is provided into the base, the transistor turns on and goes into saturation. In saturation, the transistor ideally acts like a closed switch between the collector and the emitter, as illustrated in Figure (a). Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 3  The Bipolar Junction Transistor The basic switching operation is as follows: When the base is less than 0.7 V more positive than the emitter, the transistor turns off and becomes an open switch between the collector and the emitter, as shown in part (b). To summarize in general terms, a HIGH on the base turns the transistor on and makes it a closed switch. A LOW on the base turns the transistor off and makes it an open switch. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 4  TTL Inverter The logic function of an inverter or any type of gate is always the same, regardless of the type of circuit technology that is used. Figure shows a standard TTL circuit for an inverter. In this figure 𝑄1 is the input coupling transistor, and D1 is the input clamp diode. Transistor 𝑄2 is called a phase splitter, and the combination of 𝑄3 and 𝑄4 forms the output circuit often referred to as a totem-pole arrangement. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 5  TTL Inverter When the input is a HIGH, the base-emitter junction of 𝑄1 is reverse-biased, and the base-collector junction is forward- biased. This condition permits current through 𝑅1 and the base- collector junction of 𝑄1 into the base of 𝑄2 , thus driving 𝑄2 into saturation. As a result, 𝑄3 is turned on by 𝑄2 , and its collector voltage, which is the output, is near ground potential. Therefore, there is a LOW output for a HIGH input. The base of 𝑄1 is 2.1 V above ground, so At the same time, the collector of 𝑄2 is at a sufficiently low 𝑄2 and 𝑄3 are on voltage level to keep 𝑄4 off. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 6  TTL Inverter When the input is LOW, the base-emitter junction of 𝑄1 is forward-biased, and the base-collector junction is reverse-biased. There is current through 𝑅1 and the base-emitter junction of 𝑄1 to the LOW input. A LOW provides a path to ground for the current. There is no current into the base of 𝑄2 , so it is off. The collector of 𝑄2 is HIGH, thus turning 𝑄4 on. A saturated 𝑄4 provides a low-resistance path from 𝑉𝐶𝐶 to the output; therefore, there is a HIGH on the output for a LOW on the input. The base of 𝑄1 is about 0.7 V above At the same time, the emitter of 𝑄2 is at ground potential, keeping ground—not enough to turn 𝑄2 and 𝑄3 on 𝑄3 off. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 7  TTL Inverter Diode 𝐷1 in the TTL circuit prevents negative spikes of voltage on the input from damaging 𝑄1. Diode 𝐷2 ensures that 𝑄4 will turn off when 𝑄2 is on (HIGH input). In this condition, the collector voltage of 𝑄2 is equal to the base-to-emitter voltage, 𝑉𝐵𝐸 , of 𝑄3 plus the collector-to- emitter voltage, 𝑉𝐶𝐸 , of 𝑄2. Diode 𝐷2 provides an additional 𝑉𝐵𝐸 equivalent drop in series with the base-emitter junction of 𝑄4 to ensure its turn- off when 𝑄2 is on. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 8  TTL NAND Gate A 2-input TTL NAND gate is shown in Figure. Basically, it is the same as the inverter circuit except for the additional input emitter of Q1. In TTL technology, multiple-emitter transistors are used for the input devices. These multiple-emitter transistors can be compared to the diode arrangement, as shown in Figure. Perhaps you can understand the operation of this circuit better by visualizing Q1 replaced by the diode arrangement. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 9  TTL NAND Gate A LOW on either input A or input B forward- biases the corresponding diode and reverse-biases D3 (Q1 base-collector junction). This action keeps Q2 off and results in a HIGH output in the same way as described for the TTL inverter. Of course, a LOW on both inputs will do the same thing. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 10  TTL NAND Gate A HIGH on both inputs reverse-biases both input diodes and forward-biases D3 (Q1 base-collector junction). This action turns Q2 on and results in a LOW output in the same way as described for the TTL inverter. You should recognize this operation as that of the NAND function: The output is LOW only if all inputs are HIGH. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 11  Open-Collector Gates In addition to the totem-pole output circuit; another type of output available in TTL integrated circuits is the open- collector output. This is comparable to the open-drain output of CMOS. A standard TTL inverter with an open-collector is shown in Figure (a). The other types of gates are also available with open- collector outputs. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 12  Open-Collector Gates Notice that the output is the collector of transistor Q3 with nothing connected to it, hence the name open collector. In order to get the proper HIGH and LOW logic levels out of the circuit, an external pull-up resistor must be connected to VCC from the collector of Q3, as shown in Figure (b). When Q3 is off, the output is pulled up to VCC through the external resistor. When Q3 is on, the output is connected to near-ground through the saturated transistor. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 13  Open-Collector Gates The ANSI/IEEE standard symbol that designates an open-collector output is shown in Figure for an inverter and is the same for an open-drain output. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 14  Tri-state TTL Gates Figure shows the basic circuit for a TTL tri-state inverter. When the enable input is LOW, Q2 is off, and the output circuit operates as a normal totem-pole configuration, in which the output state depends on the input state. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 15  Tri-state TTL Gates When the enable input is HIGH, Q2 is on. There is thus a LOW on the second emitter of Q1, causing Q3 and Q5 to turn off, and diode D1 is forward biased, causing Q4 also to turn off. When both totem-pole transistors are off, they are effectively open, and the output is completely disconnected from the internal circuitry, as illustrated in Figure. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 16  Current Sinking and Current Sourcing Figure shows a standard TTL inverter with a totem-pole output connected to the input of another TTL inverter. When the driving gate is in the HIGH output state, the driver is sourcing current to the load, as shown in Figure (a). The input to the load gate is like a reverse-biased diode, so there is practically no current required by the load. Actually, since the input is nonideal, there is a maximum of 40 A from the totem-pole output of the driver into the load gate input. When the driving gate is in the LOW output state, the driver is sinking current from the load, as shown in Figure (b). This current is 1.6 mA maximum for standard TTL and is indicated on a data sheet with a negative value because it is out of the input. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 17 Current Sinking and Current Sourcing (Example) When a standard TTL NAND gate drives five TTL inputs, how much current does the driver output source, and how much does it sink? Solution Total source current (in HIGH output state): 𝐼𝐼𝐻 𝑚𝑎𝑥 = 40 𝜇𝐴 𝑝𝑒𝑟 𝑖𝑛𝑝𝑢𝑡 𝐼𝑇 𝑆𝑜𝑢𝑟𝑐𝑒 = 5 𝑖𝑛𝑝𝑢𝑡𝑠 40 𝜇𝐴Τ𝑖𝑛𝑝𝑢𝑡 = 200 𝜇𝐴 Total sink current (in LOW output state): 𝐼𝐼𝐿 𝑚𝑎𝑥 = −1.6 𝑚𝐴 𝑝𝑒𝑟 𝑖𝑛𝑝𝑢𝑡 𝐼𝑇 𝑆𝑖𝑛𝑘 = 5 𝑖𝑛𝑝𝑢𝑡𝑠 −1.6 𝑚𝐴Τ𝑖𝑛𝑝𝑢𝑡 = −8 𝑚𝐴 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 18  Loading and Fan-Out When the output of a logic gate is connected to one or more inputs of other gates, a load on the driving gate is created, as shown in Figure. There is a limit to the number of load gate inputs that a given gate can drive. This limit is called the fan-out of the gate. Fan-out is expressed as unit loads. One gate input represents a unit load to a driving gate of the same logic family. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 19  Loading and Fan-Out Refer to the data sheet available at www.ti.com, and determine the fan-out of the 7400 NAND gate. Solution According to the data sheet, the current parameters are as follows: 𝐼𝐼𝐻 𝑚𝑎𝑥 = 40 𝜇𝐴 𝐼𝐼𝐿 𝑚𝑎𝑥 = −1.6 𝑚𝐴 𝐼𝑂𝐻 𝑚𝑎𝑥 = −400 𝜇𝐴 𝐼𝑂𝐿 𝑚𝑎𝑥 = 16 𝑚𝐴 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 20  Loading and Fan-Out Refer to the data sheet available at www.ti.com, and determine the fan-out of the 7400 NAND gate. Solution According to the data sheet, the current parameters are as follows: 𝐼𝐼𝐻 𝑚𝑎𝑥 = 40 𝜇𝐴 , 𝐼𝐼𝐿 𝑚𝑎𝑥 = −1.6 𝑚𝐴, 𝐼𝑂𝐻 𝑚𝑎𝑥 = −400 𝜇𝐴, 𝐼𝑂𝐿 𝑚𝑎𝑥 = 16 𝑚𝐴 Fan-out for the HIGH output state is calculated as follows: Current 𝐼𝑂𝐻 𝑚𝑎𝑥 is the maximum current that the gate can source to a load. Each load input requires an 𝐼𝐼𝐻 𝑚𝑎𝑥 of 40 𝜇𝐴. The HIGH-state fan-out is 𝐼𝑂𝐻 𝑚𝑎𝑥 400 𝜇𝐴 = = 10 𝑢𝑛𝑖𝑡 𝑙𝑜𝑎𝑑𝑠 𝐼𝐼𝐻 𝑚𝑎𝑥 40 𝜇𝐴 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 21  Loading and Fan-Out Refer to the data sheet available at www.ti.com, and determine the fan-out of the 7400 NAND gate. Solution According to the data sheet, the current parameters are as follows: 𝐼𝐼𝐻 𝑚𝑎𝑥 = 40 𝜇𝐴 , 𝐼𝐼𝐿 𝑚𝑎𝑥 = −1.6 𝑚𝐴, 𝐼𝑂𝐻 𝑚𝑎𝑥 = −400 𝜇𝐴, 𝐼𝑂𝐿 𝑚𝑎𝑥 = 16 𝑚𝐴 Fan-out for the LOW output state is calculated as follows: Current 𝐼𝑂𝐿 𝑚𝑎𝑥 is the maximum current that the gate can sink. Each load input requires an 𝐼𝐼𝐿 𝑚𝑎𝑥 of −1.6 𝑚𝐴. The LOW fan-out is 𝐼𝑂𝐿 𝑚𝑎𝑥 16 𝑚𝐴 = = 10 𝑢𝑛𝑖𝑡 𝑙𝑜𝑎𝑑𝑠 𝐼𝐼𝐿 𝑚𝑎𝑥 1.6 𝑚𝐴 In this case both the HIGH-state fan-out and the LOW-state fan-out are the same Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 22 Using Open-Collector Gates for Wired-AND Operation The outputs of open-collector gates can be wired together to form what is called a wired-AND configuration. Figure illustrates how four inverters are connected to produce a 4-input negative-AND gate. A single external pull-up resistor, Rp, is required in all wired-AND circuits. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 23 Using Open-Collector Gates for Wired-AND Operation When one (or more) of the inverter inputs is HIGH, the output X is pulled LOW because an output transistor is on and acts as a closed switch to ground, as illustrated in Figure (a). In this case only one inverter has a HIGH input, but this is sufficient to pull the output LOW through the saturated output transistor Q1 as indicated. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 24 Using Open-Collector Gates for Wired-AND Operation For the output X to be HIGH, all inverter inputs must be LOW so that all the open collector output transistors are off, as indicated in Figure (b). When this condition exists, the output X is pulled HIGH through the pull-up resistor. Thus, the output X is HIGH only when all the inputs are LOW. Therefore, we have a negative-AND function, as expressed in the following equation: 𝑋 = 𝐴ҧ𝐵ത 𝐶ҧ 𝐷 ഥ Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 25  Example Write the output expression for the wired-AND configuration of open-collector AND gates in Figure. Solution The output expression is 𝑋 = 𝐴𝐵𝐶𝐷𝐸𝐹𝐺𝐻 The wired-AND connection of the four 2-input AND gates creates an 8-input AND gate. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 26  Example Three open-collector AND gates are connected in a wired-AND configuration as shown in Figure. Assume that the wired-AND circuit is driving four standard TTL inputs (-1.6 mA each). a) Write the logic expression for X. b) Determine the minimum value of Rp if 𝐼𝑂𝐿 𝑚𝑎𝑥 for each gate is 30 mA and 𝑉𝑂𝐿 𝑚𝑎𝑥 is 0.4 V. Solution a) 𝑋 = 𝐴𝐵𝐶𝐷𝐸𝐹 b) 4 1.6 𝑚𝐴 = 6.4 𝑚𝐴 𝐼𝑅𝑃 = 𝐼𝑂𝐿 𝑚𝑎𝑥 − 6.4 𝑚𝐴 = 30 𝑚𝐴 − 6.4 𝑚𝐴 = 23.6 𝑚𝐴 𝑉𝐶𝐶 − 𝑉𝑂𝐿 𝑚𝑎𝑥 5 𝑉 − 0.4 𝑉 𝑅𝑃 = = = 195  𝐼𝑅𝑃 23.6 𝑚𝐴 Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 27  Comparison of CMOS and TTL Performance In the past, the superior characteristic of TTL (bipolar) compared to CMOS was its relatively high speed and output current capability. These advantages of TTL have diminished to the point where CMOS is often equal or superior in many areas and has become the dominant IC technology, although TTL is still available and in use. One family of IC logic devices, BiCMOS, combines CMOS logic with TTL output circuitry in an effort to combine the advantages of both. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 28  Emitter-Coupled Logic (ECL) Circuits Emitter-coupled logic, like TTL, is a bipolar technology. The typical ECL circuit consists of a different amplifier input circuit, a bias circuit, and emitter-follower outputs. ECL is much faster than TTL because the transistors do not operate in saturation and is used in more specialized high-speed applications. An ECL OR/NOR gate is shown in Figure (a). The emitter-follower outputs provide the OR logic function and its NOR complement, as indicated by Figure (b). Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 29  Emitter-Coupled Logic (ECL) Circuits Because of the low output impedance of the emitter-follower and the high input impedance of the differential amplifier input, high fan-out operation is possible. In this type of circuit, saturation is not possible. The lack of saturation results in higher power consumption and limited voltage swing (less than 1 V), but it permits high- frequency switching. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 30  Emitter-Coupled Logic (ECL) Circuits The VCC pin is normally connected to ground, and the VEE pin is connected to -5.2 V from the power supply for best operation. Notice that in Figure (c) the output varies from a LOW level of -1.75 V to a HIGH level of -0.9 V with respect to ground. In positive logic, a 1 is the HIGH level (less negative), and a 0 is the LOW level (more negative). The noise margin of a gate is the measure of its immunity to undesired voltage fluctuations (noise). Typical ECL circuits have noise margins from about 0.2 V to 0.25 V. These are less than for TTL and make ECL less suitable in high-noise environments. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 31  Comparison of ECL with TTL and CMOS Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 32  PMOS, NMOS, and E2CMOS The PMOS and NMOS circuits are used largely in Large scale integration (LSI) functions, such as long shift registers, large memories, and microprocessor products. Such use is a result of the low power consumption and very small chip area required for MOS transistors. E2CMOS is used in reprogrammable PLDs (Programmable Logic Devices). Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 33  PMOS, NMOS, and E2CMOS One of the first high-density MOS circuit technologies to be produced was PMOS. It utilizes enhancement-mode p-channel MOS transistors to form the basic gate building blocks. Figure shows a basic PMOS gate that produces the NOR function in positive logic. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 34  PMOS, NMOS, and E2CMOS The operation of the PMOS gate is as follows: The supply voltage VGG is a negative voltage, and VCC is a positive voltage or ground (0 V). Transistor Q3 is permanently biased to create a constant drain-to-source resistance. Its sole purpose is to function as a current limiting resistor. If a HIGH (VCC) is applied to input A or B, then Q1 or Q2 is off, and the output is pulled down to a voltage near VGG, which represents a LOW. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 35  PMOS, NMOS, and E2CMOS When a LOW voltage (VGG) is applied to both input A and input B, both Q1 and Q2 are turned on. This causes the output to go to a HIGH level (near VCC). Since a LOW output occurs when either or both inputs are HIGH, and a HIGH output occurs only when all inputs are LOW, we have a NOR gate. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 36  PMOS, NMOS, and E2CMOS The NMOS devices were developed as processing technology improved. The n-channel MOS transistor is used in NMOS circuits, as shown in Figure for a NAND gate and a NOR gate. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 37  PMOS, NMOS, and E2CMOS In Figure (a), Q3 acts as a resistor to limit current. When a LOW (VGG or ground) is applied to one or both inputs, then at least one of the transistors (Q1 or Q2) is off, and the output is pulled up to a HIGH level near VCC. When HIGHs (VCC) are applied to both A and B, both Q1 and Q2 conduct, and the output is LOW. This action, of course, identifies this circuit as a NAND gate. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 38  PMOS, NMOS, and E2CMOS In Figure (b), Q3 again acts as a resistor. A HIGH on either input turns Q1 or Q2 on, pulling the output LOW. When both inputs are LOW, both transistors are off, and the output is pulled up to a HIGH level. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 39  PMOS, NMOS, and E2CMOS E2CMOS (electrically erasable CMOS) technology is based on a combination of CMOS and NMOS technologies and is used in programmable devices such as PROMs and CPLDs (Complex programmable logic device). An E2CMOS cell is built around a MOS transistor with a floating gate that is externally charged or discharged by a small programming current. A schematic of this type of cell is shown in Figure. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 40  KEY TERMS CMOS Complementary metal-oxide semiconductor; a type of integrated logic circuit that uses n- and p-channel MOSFETs (metal-oxide semiconductor field-effect transistors). Current sinking The action of a logic circuit in which it accepts current into its output from a load. Current sourcing The action of a logic circuit in which it sends current from its output to a load. ECL Emitter-coupled logic; a class of integrated logic circuits that are implemented with non-saturating bipolar junction transistors. E2CMOS Electrically erasable CMOS; the IC technology used in programmable logic devices (PLDs). Fan-out The number of equivalent gate inputs of the same family series that a logic gate can drive. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 44  KEY TERMS Noise immunity The ability of a logic circuit to reject unwanted signals (noise). Noise margin The difference between the maximum LOW output of a gate and the maximum acceptable LOW input of an equivalent gate; also, the difference between the minimum HIGH output of a gate and the minimum HIGH input of an equivalent gate. Noise margin is sometimes expressed as a percentage of the dc supply voltage. Open-collector A type of output for a TTL circuit in which the collector of the output transistor is left internally disconnected and is available for connection to an external load that requires relatively high current or voltage. Power dissipation The product of the dc supply voltage and the dc supply current in an electronic circuit. Propagation delay time The time interval between the occurrence of an input transition and the occurrence of the corresponding output transition in a logic circuit. Pull-up resistor A resistor with one end connected to the dc supply voltage used to keep a given point in a logic circuit HIGH when in the inactive state. Totem pole A type of output in TTL circuits. Tri-state A type of output in logic circuits that exhibits three states: HIGH, LOW, and high Z. TTL Transistor-transistor logic; a type of integrated circuit that uses bipolar junction transistors. Also called bipolar. Unit load A measure of fan-out. One gate input represents a unit load to a driving gate. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 3 45  Higher Institute of Engineering, El Shorouk Biomedical and Systems Engineering Department BIS 471 and BIS 461 Digital Electronic Systems (1) Lecture 4 Dr. Mostafa Elhussien Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 1  PC-based Data Acquisition System Overview In the last few years, industrial PC I/O interface products have become increasingly reliable, accurate and affordable. PC-based data acquisition and control systems are widely used in industrial and laboratory applications like monitoring, control, and automated testing. Selecting and building a DA&C (Data Acquisition and Control) system requires some knowledge of electrical and computer engineering. Transducers and actuators Signal conditioning Data acquisition and control hardware Computer systems software Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 2  Data Acquisition System Introduction I A data acquisition system consists of many components that are integrated to: Sense physical variables (use of transducers) Condition the electrical signal to make it readable by an A/D board Convert the signal into a digital format acceptable by a computer Process, analyze, store, and display the acquired data with the help of software Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 3  Components of a DAQ System Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 4  Data Acquisition System Block Diagram Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 5  Transducers Sense physical phenomena and translate it into electric signal. ◼ Temperature ◼ Displacement ◼ Pressure ◼ Level ◼ Light ◼ Electric signals ◼ Force ◼ ON/OFF switch Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 6  Transducers and Actuators A transducer converts temperature, pressure, level, length, position, etc. into voltage, current, frequency, pulses or other signals. An actuator is a device that activates process control equipment by using pneumatic, hydraulic or electrical power. For example, a valve actuator opens and closes a valve to control fluid rate. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 7  Some Common Transducers Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 8  Types of Signals Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 9  Signal Conditioning Electrical signals are conditioned so they can be used by an analog input board. The following features may be available: ◼ Amplification ◼ Isolation ◼ Filtering ◼ Linearization Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 10  Signal Conditioning Signal conditioning circuits improve the quality of signals generated by transducers before they are converted into digital signals by the PC's data- acquisition hardware. Examples of signal conditioning are signal scaling, amplification, linearization, cold-junction compensation, filtering, attenuation, excitation, common-mode rejection, and so on. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 11  Signal Conditioning One of the most common signal conditioning functions is amplification. For maximum resolution, the voltage range of the input signals should be approximately equal to the maximum input range of the A/D converter. Amplification expands the range of the transducer signals so that they match the input range of the A/D converter. For example, a x10 amplifier maps transducer signals which range from 0 to 1 V into the range 0 to 10 V before they go into the A/D converter. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 12  Data Acquisition Data acquisition and control hardware generally performs one or more of the following functions: analog input, analog output, digital input, digital output and counter/timer functions. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 13  Analog Inputs (A/D) Analog to digital (A/D) conversion changes analog voltage or current levels into digital information. The conversion is necessary to enable the computer to process or store the signals. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 14  Analog Inputs (A/D) The most significant criteria when selecting A/D hardware are: 1. Number of input channels 2. Single-ended or differential input signals 3. Sampling rate (in samples per second) 4. Resolution (usually measured in bits of resolution) 5. Input range (specified in full-scale volts) 6. Noise and nonlinearity Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 15  Analog to Digital (A/D) Converter Input signal ◼ Resolution Sampling rate ◼ Range Throughput ◼ Gain Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 16  A/D Converter: Input Signal Analog ✓Signal is continuous Example: strain gage. Most of transducers produce analog signals ◼ Digital ✓ Signal is either ON or OFF Example: light switch. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 17  A/D Converter: Sampling Rate Determines how often conversions take place. The higher the sampling rate, the better. 16 Samples/cycle Analog 8 Samples/cycle Input 4 Samples/cycle Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 18  A/D Converter: Sampling Rate Aliasing. ✓Acquired signal gets distorted if sampling rate is too small. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 19  A/D Converter: Throughput Effective rate of each individual channel is inversely proportional to the number of channels sampled. Example: 100 KHz maximum. 16 channels. 100 KHz/16 = 6.25 KHz per channel. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 20  A/D Converter: Range Minimum and maximum voltage levels that the A/D converter can quantize ◼ Ranges are selectable (either hardware or software) to accurately measure the signal Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 21  A/D Converter: Resolution Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 22  Analog Outputs (D/A) The opposite of analog to digital conversion is digital to analog (D/A) conversion. This operation converts digital information into analog voltage or current. D/A devices allow the computer to control real-world events. Analog output signals may directly control process equipment. The process can give feedback in the form of analog input signals. This is referred to as a closed loop control system with PID control. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 23  Analog Outputs (D/A) Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 24  Data Acquisition Software It can be the most critical factor in obtaining reliable, high performance operation. Transforms the PC and DAQ hardware into a complete DAQ, analysis, and display system. Different alternatives: Programmable software. Data acquisition software packages. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 25  Programmable Software Involves the use of a programming language, such as: C++, visual C++ BASIC, Visual Basic + Add-on tools (such as VisuaLab with VTX) Fortran Pascal ✓Advantage: flexibility ✓Disadvantages: complexity and steep learning curve Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 26  Data Acquisition Software Does not require programming. Enables developers to design the custom instrument best suited to their application. Examples: TestPoint, SnapMaster, LabView, DADISP, DASYLAB, etc. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 27  Generalized Medical Instrumentation System Electronic Feedback Actuator instrumentation signal conditioning Sensor Output display Basic Signal storage Advanced processing transmission Measurand Measurand: Physical quantity, property or condition that the system measures Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 28  Generalized Medical Instrumentation System Internal Blood pressure ECG Types of biomedical Body surface measurands EEG Infrared Peripheral Radiation Extract tissue sample, Offline Blood analysis, Biopsy Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 29  Generalized Medical Instrumentation System Biopotential , Pressure, measurand quantities Typical biomedical Flow, Dimensions (imaging), Displacement (velocity, acceleration and force), Impedance, Temperature Chemical concentration Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 30  Generalized Medical Instrumentation System Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 31  Generalized Medical Instrumentation System Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 32  Medical and Physiological Parameters Parameter Range Frequency Sensor Blood flow 1-300 ml/s dc – 20 Hz Flowmeter (ultrasonic) Arterial blood pressure 25-400mm Hg dc – 50 Hz strain-gage ECG 0.5 – 4 mV 0.01 – 250 Hz Skin electrodes EEG 5 – 300 microV dc – 150 Hz Scalp electrodes EMG 0.1 – 5 mV dc – 10,000 Hz Needle electrodes Respiratory rate 2 – 50 0.1 – 10 Hz Strain-gage, nasal breaths/min thermistor Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 33  Types of bio-signals Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 34  Sensor A sensor converts physical measurand to an electrical output Most common types of sensors in biomedical systems Displacement Pressure Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 35  Sensor A transducer may be described as Input transducer (known as a sensor) or Output transducer (known as an actuator), depending on the direction of information flow. Examples of input transducers are thermometers, microphones, pressure sensors and photodiodes; The corresponding output transducers are heaters, loudspeakers, pistons and light-emitting diodes. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 36  Sensor A good sensor obeys the following rules: 1. Selective – should respond to a specific form of energy in the measurand 2. Minimally invasive (invasive = requiring entry into a part of the body) 3. Is sensitive to the measured property 4. Is insensitive to any other property 5. Does not influence the measured property Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 37  Examples of biomedical systems Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 46  Examples of biomedical systems Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 47  Examples of biomedical systems Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 48  Examples of biomedical systems Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 49  Examples of biomedical systems Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 50  Examples of biomedical systems Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 4 51  Higher Institute of Engineering, El Shorouk Biomedical and Systems Engineering Department BIS 471 and BIS 461 Digital Electronic Systems (1) Lecture 5 Dr. Mostafa Elhussien Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 1  Serial Digital Interfaces Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 2  Content An overview of serial data transfer methods. Data rate vs. bandwidth and related topics. Summary of the most common serial interfaces and technology: RS-232/422/485, SPI, SCI, I2C, I2S, CAN, LIN, Flexray, and USB. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 3  Introduction There are standard ways for getting data into and out of digital circuits and equipment and computers. Most of these input/output (I/O) methods involve serial data transfers. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 4  Prerequisites DC and AC electrical fundamentals. Basic digital logic circuit operation. Binary codes and coding. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 5  Data transfer principles Parallel and Serial Data Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 6  The need for data movement One of the most common operations in a computer or digital system is sending data from one place to another. From chip to chip on a printed circuit board (PCB) From one PCB to another in a system From one piece of equipment to another (PC to printer) From one computer to another distant computer over a network Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 7  Data transmission is a Communications System Figure shows a generic example of a simple data transmission system. The source of data may be a computer, embedded controller, or other digital source. The data is usually organized as in bytes or larger words of 16, 32 or 64 bits. The receiver of the data may be a computer, embedded controller or some other digital circuit. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 8  The Communications Medium The communications path for the data may be any one of many different connections. Examples: Copper traces on a PC board. Ribbon cable. Cable such as coax or twisted pair. Fiber optic cable. Radio or wireless. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 9  Parallel and Serial Data Transfers There are two ways to transfer digital data between two points: parallel and serial. Parallel data transfers cause all bits of a binary word or number to be transmitted simultaneously over multiple parallel connections, one wire or connection per bit. Serial data transfers transmit a binary word or number one bit at a time over a single data connection. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 10  Parallel Transmission Parallel transmission is used primarily when very high speed is needed. All bits move together at the same time. The transmission path or medium is usually referred to as a bus made up of one wire or conductor for each binary bit. referenced to ground. Very high speed buses use differential transmission requiring two wires per bit. Differential transmission is preferred for very high speeds and longer conductors where noise pickup is a problem. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 11  Single-Ended vs. Differential Transfers A single-ended transfer is made when the bit voltage appears on a single wire referenced to ground. See Fig A. Tx is the transmitting circuit or driver, Rx is the receiving circuit or receiver. Some transfers use a single ground connection for all parallel lines. Others use a separate ground wire for each bit line. See Fig B. In differential transfers, two lines are used. No ground reference is used. Fig C. Differential transfers are more immune to noise than single- ended transfers over longer distances. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 12  Parallel Transfer Advantages Parallel data transfers are extremely fast since all bits are transmitted simultaneously. Transfer rates of hundreds of MHz are possible. A presentation of eSyst.org Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 13  Parallel Limitations Parallel transmissions are subject to high levels of signal distortion from the path capacitance and inductance if the distance of transmission is great. Transmission distances are limited to several inches if data rates exceed several hundred megahertz (MHz). For this reason, fast parallel transfers are usually limited to bus connections on a PC board, very short cables, or register transfers inside an IC. Parallel connections require more wires in a cable or more pins on an IC, take up more space on a PCB or require a larger connector. Parallel connections are more expensive than serial connections because of the multiple paths (copper lines, wires, etc.) and the multiple digital circuits needed to transmit and receive the data. (One transmitter and one receiver per bit.) Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 14  Parallel Applications Parallel buses are widely used in computers (PCI bus) for connecting chips together like microprocessor to memory or I/O chips on a PCB. Chips on a PC motherboard are an example. Parallel buses in the form of short ribbon cables are used to connect disk drives to mother boards in a PC. In the past, longer parallel cables were the most common way to connect a PC to a printer. At low data transfer rates longer cables (many feet) can be used. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 15  Serial is the answer. In serial data transfers, a binary word is transmitted one bit at a time over a single connection. Either the LSB or MSB can occur first. In Figure LSB is first. Each bit is sent during a fixed time interval (t) one bit after the other. Serial transfers are simpler and less expensive. Only one transmitter and one receiver is needed. Only 2 wires are needed in a cable (the bit line and ground). Differential transmission can also be used in which case 2 wires are needed. The only practical way to transmit data over a fiber optical cable or a wireless link is by the serial method. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 16  Serial Data Rate Serial transmissions are slower because the bits are transmitted one at a time. Yet very high speed connections eliminate this apparent disadvantage. The date rate is expressed in bits per second (bps). The data rate in bps is determined from the bit time interval as shown in Figure. Bit rate in bps is 1/t where t is the bit time. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 17  Serial data calculations If a serial data stream has a bit time of 100 nanoseconds (ns), the data rate is: bps = 1/100 x 10-9 = 10,000,000 bps or 10 Mbps The bit time can be calculated from the data rate or t = 1/bps. If the data rate is 19200 bps, the bit time is 1/19200 = 52 microseconds. It takes 52 x 8 = 416 µs to transmit one byte of data at a 19.2 kbps rate. Practical serial data rates up to 10 Gbps are common in electronic and computer equipment. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 18  Serial dominates Most digital data transfers are by serial methods today. There are literally dozens of different serial methods in use each with its own data protocol, electrical characteristics, and mechanical connections. The serial method is usually selected by its application and the required data speed. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 19  Common Serial Interfaces The following serial data interfaces are covered: RS-232, RS-422/423, RS-485 Universal serial bus (USB) Serial peripheral interface (SPI) Serial communications interface (SCI) I2C bus CAN bus LIN bus Flexray Most of these interfaces are built into microcomputers, embedded controllers, memory or other chips. However, some interfaces are offered separately as integrated circuits. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 20  RS-232, RS-422/423, RS-485 One of the oldest but still widely used serial interface families. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 21  The Oldest Serial Data Interface The oldest serial data interface is the original telegraph invented in the 1840s. A telegraph key used as a switch to connect or disconnect a battery at the transmitting end to a magnetic “clicker” or sounder at the receiving end over a very long wire. The bits are the key on and off connections. The duration of the on times were varied to create dots and dashes of the Morse code. Modern serial interfaces are essentially the same today. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 22  RS-232 The designation RS-232 is the expression used to describe one of the oldest serial interfaces still in use today. It was originally used in telegraph machines that transmitted binary codes and as the interfaces on computer modems. It is still widely used to connect peripheral devices to computers. RS-232 is one of a number of similar interfaces that have been standardized by the Electronics Industries Association (EIA), the Telecommunications Industries Association (TIA) and the International Telecommunications Union (ITU). Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 23  What the RS-232 standard defines. Voltage levels for binary 0 and binary 1. Data rate and slew rate. Transmission medium specifications. Connectors, The standard does not define: Data encoding and format. Protocol or data framing. Error detection. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 24  Logic Levels The RS-232 standard defines a binary 1 or “mark” as any voltage between -3 and -25 volts. A binary 0 or “space” is any voltage between +3 and + 25 volts. The signals are single-ended. Commonly used levels are ± 5 and ±12 V. Receivers do not respond to voltages between ± 3 V making this standard essentially immune to noise in this range. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 25  Data Rate and Range No specific data rate is specified but the standard states a maximum of 20 kbps up to a range of 50 feet (15 meters). The data rate is limited by cable capacitance that increases with length. The maximum capacitance is defined as 2500 pF. This sets the maximum slew rate (rise/fall times) at 30 V/µs. Lower cable capacitances or shorter cables allow faster rates beyond 100 kbps. Common data rates used with RS-232 are: 300, 1200, 2400, 4800, 9600, 19200 and 115,200 bps. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 26  Data Format While no data format is specified in the standard, the most widely used approach is shown in Figure. The data (numbers, letters, punctuation marks, special symbols) are defined by the widely used ASCII code. 8-bit data words (bytes) are transmitted. A start bit (high to low transition) signals the beginning of a character. LSB or data word is sent first. A parity bit may or may not be used to aid in bit error detection. It could be 0 or 1 if used. One or two stop bits signal the end of a byte. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 27  Data Format This method of data transmission is called asynchronous since it does not use a master clock signal for timing. The circuits used to transmit and receive the data are usually contained in a single IC that is commonly referred to as universal asynchronous receiver transmitter or UART. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 28  RS-232 Connectors The original standard defined a 24-pin D-shaped connector. It is no longer widely used. The most common connector is a 9-pin connector with the designation DB9S with the signals as given in Figure. Dr. Mostafa Elhussien Digital Electronic Systems (1) Lec. 5 29  RS-232 Signals Pin Signal Description I/O 1 D