Field Effect Transistor FET PDF

Lectures: Dr.Hesham Ibrahim Lecturer: Mariam Omer  The Field effect transistor is abbreviated as FET , it is an another semiconductor device which can be used as an amplifier or switch.  The Field effect transistor is a voltage operated (controlled) device.  FET operation depends...

Lectures: Dr.Hesham Ibrahim Lecturer: Mariam Omer  The Field effect transistor is abbreviated as FET , it is an another semiconductor device which can be used as an amplifier or switch.  The Field effect transistor is a voltage operated (controlled) device.  FET operation depends only on the flow of majority carriers ,therefore they are called unipolar devices.  As FET has conduction through only majority carriers it is less noisy than BJT.  FETs are much easier to fabricate and are particularly suitable for ICs.  FET is also a three terminal device, labeled as source, drain and gate.  Collector Drain Similarities: Amplifiers Switching devices Base Gate Impedance matching circuits Emitter Differences: Source FETs are voltage controlled devices. BJTs are current controlled devices. FETs have a higher input impedance. BJTs have higher gains. FETs are less sensitive to temperature variations and are more easily integrated on ICs. JFET: Junction FET FET MOSFET: Metal–Oxide–Semiconductor FET D-MOSFET: Depletion MOSFET JFET MOSFET E-MOSFET: Enhancement MOSFET D-MOSFET E-MOSFET  There are two types of JFETs n-channel p-channel  The n-channel is more widely used.  There are three terminals: Drain (D) and Source (S) are connected to the n-channel Gate (G) is connected to the p-type material  When VGS = 0 and VDS is increased from 0 to a more positive voltage The depletion region between p-gate and n-channel increases. Increasing the depletion region, decreases the size of the n-channel which increases the resistance of the n-channel. Even though the n-channel resistance is increasing, the current (ID) from source to drain through the n-channel is increasing. This is because VDS is increasing. ID versus VDS for VGS = 0 V. If VGS = 0 and VDS is further increased to a more positive voltage, then the depletion zone gets so large that it pinches off the n-channel. As V DS is increased beyond |VP|, the level of I D remains the same (ID=IDSS). IDSS is the maximum drain current for a JFET and is defined by the conditions VGS=0 and VDS > |VP|.  As VGS becomes more negative, the depletion region increases. The more negative VGS, the resulting level for ID is reduced. Eventually, when VGS=VP (-ve) [VP=VGS(off)], ID is 0 mA. (the device “turned off”) The level of VGS that results in ID=0 mA is defined by VGS=VP, with VP being a negative voltage for n-channel devices and a positive voltage for p-channel Application of a negative voltage to the gate of a JFET JFETs. n-Channel JFET characteristics with IDSS = 8 mA and VP = -4 V.  The region to the left of the pinch- off point is called the ohmic region. The JFET can be used as a variable resistor, where VGS controls the drain-source resistance (rd). As VGS becomes more negative, the resistance (rd) increases. ro rd  2  VGS  1   where ro is the resistance with V GS=0 and rd  V P  is the resistance at a particular level of VGS. The p-channel JFET behaves the same as the n-channel JFET, except the voltage polarities and current directions are reversed. As VGS increases more positively The depletion zone increases ID decreases (ID < IDSS) Eventually ID = 0 A Also note that at high levels of VDS the JFET reaches a breakdown situation: ID increases uncontrollably if VDS > VDSmax.  In this region, the drain current increases rapidly as the drain to source voltage is increased.  It is because of the gate to source junction due to avalanche effect.  The avalanche break down occurs at progressively lower value of VDS because the reverse bias gate voltage adds to the drain voltage thereby increasing effective voltage across the gate junction This causes 1. The maximum saturation drain current is smaller 2. The ohmic region portion decreased.  It is important to note that the maximum voltage VDS which can be applied to FET is the lowest voltage which causes available break down. JFET symbols: (a) n-channel; (b) p-channel. (a) VGS = 0 V, ID = IDSS; ( b) cutoff (ID = 0 A) VGS less than the pinch-off level; (c) ID is between 0 A and IDSS for VGS 0 V and greater than the pinch-off level.  In a BJT,  indicates the relationship between IB (input) and IC (output).  In a JFET, the relationship of VGS (input) and ID (output) is a little more complicated (Shockley’s equation): 2  VGS  ID  I DSS 1    VP   Using IDSS and Vp (VGS(off)) values found in a specification sheet, the transfer curve can be plotted according to these three steps: 1. Solving for VGS = 0V ID = IDSS 2. Solving for VGS = Vp (VGS(off)) ID = 0A 3. Solving for VGS = 0V to Vp e.g For VGS = -1 V, ID =4.5mA  Conversely , for a given ID, VGS can be obtained:  ID  VGS   Vp 1   I DSS    This graph shows the value of ID for a given value of VGS.  Metal Oxide Semiconductors Field Effect Transistors (MOSFETs) have characteristics similar to JFETs and additional characteristics that make then very useful.  There are two types of MOSFETs: Depletion-Type Enhancement-Type The Drain (D) and Source (S) connect to the to n-doped regions. These n-doped regions are connected via an n-channel. This n-channel is connected to the Gate (G) via a thin insulating layer of SiO2. The n-doped material lies on a p-doped substrate that may have an additional terminal connection called Substrate (SS). n-Channel depletion-type MOSFET VGS=0 and VDS is applied across the drain to source terminals. This results to attraction of free electrons of the n-channel to the drain, and hence current flows. n-Channel depletion-type MOSFET with VGS = 0 V and applied voltage VDD. VGS is set at a negative voltage such as -1 V. The negative potential at the gate pressures electrons toward the p-type substrate and attract holes from the p-type substrate. This will reduce the number of free electrons in the n-channel available for conduction. The more negative the VGS, the resulting level of drain current ID is reduced. When VGS is reduced to VP (Pinchoff voltage), then ID=0 mA. When VGS is reduced to VP (Pinch-off ) [i.e. Vp=-6V], then ID=0 mA. For positive values of VGS, the positive gate will draw additional electrons (free carriers) from the p-type substrate and hence ID increases. A depletion-type MOSFET can operate in two modes: Depletion mode Enhancement mode The characteristics are similar to a JFET. When VGS = 0 V, ID = IDSS When VGS < 0 V, ID < IDSS The formula used to plot the transfer curve still applies: 2  VGS  I D  I DSS 1    VP   VGS > 0 V ID increases above IDSS The formula used to plot the transfer curve still applies: Note that VGS is now a positive polarity (a) n-channel depletion-type MOSFETs ,(b) p-channel depletion-type MOSFETs  The Drain (D) and Source (S) connect to the to n-doped regions. The Gate (G) connects to the p-doped substrate via a thin insulating layer of SiO2 There is no channel The n-doped material lies on a pdoped substrate that may have an additional terminal connection called the Substrate (SS)  For VGS=0, ID=0 (no channel). For VDS some positive voltage, and VGS=0, two reverse biased p-n junctions and no significant flow between drain and source. For VGS>0 and VDS>0, the positive voltage at gate pressure holes to enter deeper regions of the p -substrate, and the electrons in p-substrate will be attracted to the positive gate. The level of VGS that results in the significant increase in drain current is called threshold voltage (VT). For VGS