Encoders and Decoders PDF
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This document explains encoders and decoders, which are combinational logic circuits. It includes diagrams of different types of encoders and decoders along with truth tables and logic diagrams. Intended for undergraduate level study.
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DECODER & ENCODER 1 DECODER A decoder is a combinational circuit. A decoder accepts a set of inputs that represents a binary number and activates only that output corresponding to the input number. All other outputs remain inactive. Fig...
DECODER & ENCODER 1 DECODER A decoder is a combinational circuit. A decoder accepts a set of inputs that represents a binary number and activates only that output corresponding to the input number. All other outputs remain inactive. Fig. 1 shows the block diagram of decoder with ‘N’ inputs and ‘M’outputs. There are N possible input combinations and 2N output combinations. For each of these input combinations, only one output will be HIGH (active) all other outputs are LOW Some decoder have one or more ENABLE (E) inputs that are used to control the operation of decoder. 2 BLOCK DIAGRAM OF DECODER A0 B0 A1 B1 A2 B2. DECODER....... AN-1 BM-1 N- Inputs M- Outputs Only one output is High for each input Fig. 1 3 2 to 4 Line Decoder: Block diagram of 2 to 4 decoder is shown in fig. 2 A and B are the inputs. ( No. of inputs =2) No. of possible input combinations: 22=4 No. of Outputs : 22=4, they are indicated by D0, D1, D2 and D3 From the Truth Table it is clear that each output is “1” for only specific combination of inputs. TRUTH TABLE A D0 INPUTS OUTPUTS 2X4 D1 Decoder A B D0 D1 D2 D3 B D2 0 0 1 0 0 0 D3 0 1 0 1 0 0 Inputs Outputs 1 0 0 0 1 0 Fig. 2 1 1 0 0 0 1 4 BOOLEAN EXPRESSION: From Truth Table D0 = A B D1 = A B D2 = A B D3 = AB LOGIC DIAGRAM: A B A B D0 = A B D1 = A B D2 = A B D3 = A B Fig. 3 5 3 to 8 Line Decoder: Block diagram of 3 to 8 decoder is shown in fig. 4 A , B and C are the inputs. ( No. of inputs =3) No. of possible input combinations: 23=8 No. of Outputs : 23=8, they are indicated by D0 to D7 From the Truth Table it is clear that each output is “1” for only specific combination of inputs. A. D0 B 3X8. Decoder. C. D7 Inputs Outputs Fig. 4 6 TRUTH TABLE FOR 3 X 8 DECODER: INPUTS OUTPUTS A B C D0 D1 D2 D3 D4 D5 D6 D7 0 0 0 1 0 0 0 0 0 0 0 D0 = A B C 0 0 1 0 1 0 0 0 0 0 0 D1 = A B C 0 1 0 0 0 1 0 0 0 0 0 D2 = A B C 0 1 1 0 0 0 1 0 0 0 0 D3 = A B C 1 0 0 0 0 0 0 1 0 0 0 D4 = A B C 1 0 1 0 0 0 0 0 1 0 0 D5 = A B C 1 1 0 0 0 0 0 0 0 1 0 D6 = A B C 1 1 1 0 0 0 0 0 0 0 1 D7 = A B C 7 LOGIC DIAGRAM OF 3 X 8 DECODER: INPUTS A B C A B C D0 = A B C D1 = A B C D2 = A B C D3 = A B C OUTPUTS D4 = A B C D5 = A B C Fig. 5 D6 = A B C D7 = A B C 8 ENCODER An Encoder is a combinational logic circuit. It performs the inverse operation of Decoder. The opposite process of decoding is known as Encoding. An Encoder converts an active input signal into a coded output signal. Block diagram of Encoder is shown in Fig.10. It has ‘M’inputs and ‘N’outputs. An Encoder has ‘M’input lines, only one of which is activated at a given time, and produces an N-bit output code, depending on which input is activated. A0 B0 ‘M’ Inputs ‘N’ Outputs A1 B1 A2 B2 ------- ------- Encoder AM-1 BN-1 Fig. 10 11 Encoders are used to translate the rotary or linear motion into a digital signal. The difference between Decoder and Encoder is that Decoder has Binary Code as an input while Encoder has Binary Code as an output. Encoder is an Electronics device that converts the analog signal to digital signal such as BCD Code. Types of Encoders i. Priority Encoder ii. Decimal to BCD Encoder iii. Octal to Binary Encoder iv. Hexadecimal to Binary Encoder 12 ENCODER M=4 M=22 M=2N ‘M’ is the input and ‘N’ is the output A0 B0 A1 B1 A2 Encoder Decoder A3 B2 4x2 2x4 B3 Fig. 11 18 ENCODER M=4 M=22 M=2N ‘M’ is the input and ‘N’ is the output A0 00 A1 01 A2 10 Encoder Decoder A3 11 4x2 2x4 Fig. 12 19 ENCODER M=4 M=22 M=2N ‘M’ is the input and ‘N’ is the output A0 00 01 1 A1 A2 10 Encoder Decoder 0 A3 11 4x2 2x4 Fig. 13 20 ENCODER M=4 M=22 M=2N ‘M’ is the input and ‘N’ is the output A0 00 01 1 A1 A2 10 Encoder Decoder 0 10 A3 11 4x2 2x4 Fig. 14 21