Lesson 4: Combinational Circuits PDF

Lesson 4: Combinational Circuits 1 COMBINATIONAL LOGIC CIRCUITS A combinational circuit is the digital logic circuit in which the output depends on the combination of inputs at that point of time with total disregard to the past state of the inputs. (Output depends...

Lesson 4: Combinational Circuits 1 COMBINATIONAL LOGIC CIRCUITS A combinational circuit is the digital logic circuit in which the output depends on the combination of inputs at that point of time with total disregard to the past state of the inputs. (Output depends only on the current state of the inputs) The digital logic gate is the building block of combinational circuits. The function implemented by combinational circuit is depend upon the Boolean expressions. Combinational circuits have no memory, no timing (clocks) or no feedback loops On the other hand, sequential logic circuits, consists of both logic gates and memory elements such as flip-flops. Sequential circuits have feed back mechanisms. 2  Figure below shows the combinational circuit having n inputs and and m outputs. The n number of inputs shows that there are 2^n possible combinations of bits at the input. Therefore, the output is expressed in terms m Boolean expressions. 3  Examples of Combinational circuits: All logic circuits considered in the previous lessons Decoder, Encoder, Multiplexer, De-multiplexer, Adders, subtructors and comparator Examples of Sequential circuits: Flip flops(JK,SR,T,D) and latches(SR,D) 4 DECODERS A decoder is a logic circuit that accepts a set of inputs that represents a binary number and activates only the output that corresponds to that input number. In other words, a decoder circuit looks at its inputs, determines which binary number is present there, and activates the one output that corresponds to that number; all other outputs remain inactive. It is a combinational circuit that converts N bits of binary information of input lines to a maximum of 2N unique output lines. 5  In its general form, a decoder has N input lines to handle N bits and form one to 2 N output lines to indicate the presence of one or more N- bit combinations The basic binary function An AND gate can be used as the basic decoding element because it produces a HIGH output only when all inputs are HIGH 6 General Decoder Diagram A0 O0 N inputsA1 DECODER O1 A2 O2 M outputs(2N ) AN-1 OM-1 Only one output input is HIGH for each codes input code # There are 2N possible input combinations, from A0 to AN1. 7  Because each of the N inputs can be 0 or 1, there 2N are possible input combinations or codes. For each of these input combinations, only one of the M outputs will be active HIGH (1); all the other outputs are LOW (0). Many decoders are designed to produce active-LOW outputs, where only the selected output is LOW while all others are HIGH. This situation is indicated by the presence of small circles on the output lines in the decoder diagram. Note that for a given input code, the only output that is active (HIGH) is the one corresponding to the decimal equivalent of the binary input code (e.g., output O 6 goes HIGH only when CBA = 1102 = 610). 8  Some decoders do not utilize all of the 2N possible input codes but only certain ones. For example, a BCD-to- decimal decoder has a four-bit input code and ten output lines that correspond to the ten BCD code groups 0000 through 1001. Decoders of this type are often designed so that if any of the unused codes are applied to the input, none of the outputs will be activated. 9  Usually decoders are designed as an N to M line decoder where N= input lines and M= output lines 10 2 to 4 line Decoder (1 of 4) A0 O0 A0 O0 A1 A1 O1 O1 O2 O2 O3 O3 EN EN (a)Logic symbol for active HIGH (b)Logic symbol for active LOW 11  If an active-LOW output (74138, one of the output will low and the rest will be high) is required for each decoded number, the entire decoder can be implemented with NAND gates Inverters If an active-HIGH output (74139, one of the output will high and the rest will be low) is required for each decoded number, the entire decoder can be implemented with AND gates Inverters 12 ENABLE Inputs Some decoders have one or more ENABLE inputs that are used to control the operation of the decoder. For example, refer to the decoder in Figure (a) above and visualize having a common ENABLE line connected to a fourth input of each gate. With this ENABLE line held HIGH, the decoder will function normally, and A0 A1 input code will determine which output is HIGH. With ENABLE held LOW, however, all of the outputs will be forced to the LOW state regardless of the levels at the A 0 A1 inputs. Thus, the decoder is enabled only if ENABLE is HIGH. 13 Truth table of 2-4 Decoder (Active High) INPU ENAB OUTPUTS TS LE A1 A0 EN O O O O O0= A1’AO’ 3 2 1 0 X X O1= A1’AO 0 0 0 0 0 O 2 = A 1 AO ‘ 0 0 1 0 0 0 1 O 3 = A 1 AO 0 1 1 0 0 1 0 1 0 1 0 1 0 0 1 1 1 1 0 0 0 14 Implementation of 2 to 4 with Enabled input A1 A0 O0 O 1 0 2 O3 EN 15  As we can see in the truth table for each input combination, one output line is activated i.e. the output line corresponding to the input combination becomes 1 while other lines remain inactive(LOW). For example an input of 01 at the input will activate line O1. Notice also that each output of the decoder is actually a minterm resulting from certain combination of inputs i.e. O0 = A1’AO’(Minterm Mo ) corresponds to output 00, O1= A1’A0 ’(Minterm M1 ) corresponds to output 01 16 2-to-4-Line Decoder (with Enable input)-Active LOW output EN SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 17  The circuit operates with complemented outputs and a complement enable input. The decoder is enabled when EN is equal to 0. Only one output can be equal to 0 at any given time, all other outputs are equal to 1. The output whose value is equal to 0 represents the minterm selected by inputs A and B The circuit is disabled when EN is equal to 1 18 3-to-8 line Decoder In a 3-8 decoder, there are three inputs and eight outputs. This decoder can be referred to in several ways. It can be called a 3-line-to- 8-line decoder, because it has three input lines and eight output lines. It could also be called a binary-octal decoder or converters because it takes a three bit binary input code and activates the one of the eight outputs corresponding to that code. It is also referred to as a 1-of-8 decoder, because only 1 of the 8 outputs is activated at one time 19 SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 20 BCD -to- Decimal decoders The BCD- to-decimal decoder converts each BCD code into one of Ten Positionable decimal digit indications. It is frequently referred as a 4- line -to- 10 line decoder The method of implementation is that only ten decoding gates are required because the BCD code represents only the ten decimal digits 0 through 9. Each of these decoding functions is implemented with NAND gates to provide active -LOW outputs. If an active HIGH output is required, AND gates are used for decoding SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 21 Logic diagram of BCD - decimal decoder (Active LOW output) SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 22 Design a BCD - decimal decoder with active HIGH outputs Solution: SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 23 Applications of Decoders Decoders are used in many types of applications. One example is in computers for I/O selection as in previous slide Computer must communicate with a variety of external devices called peripherals by sending and/or receiving data through what is known as input/output (I/O) ports Each I/O port has a number, called an address, which uniquely identifies it. When the computer wants to communicate with a particular device, it issues the appropriate address code for the I/O port to which that particular device is connected. The binary port address is decoded and appropriate decoder output is activated to enable the I/O port (I/O addressing) Binary data are transferred within the computer on a data bus, which is a set of parallel lines SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 24 ENCODERS A digital circuit that performs the reverse operation of a decoder. An encoder has a number of input lines , ONLY one of which is activated at a given time, and produce an N bit output code, depending on which input is activated. For example for active HIGH input encoder, ONLY one input can be logic 1 at any given time. All other inputs must be zeros (0’s) We can say that an encoder has 2N inputs and N output lines An encoder accepts an active LOW/HIGH level on one of its inputs representing digits such as decimal or octal and converts it to a coded output such as BCD or binary NB: Output lines generate the binary code corresponding to active input SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 25 Block diagram for active high input encoder I0 O0 I1 O1 2N inputs ENCODER only one I2 O2 HIGH at a N outputs time IM-1 ON-1 Output lines generate the binary code M= Number of inputs corresponding to active N= Number of outputs input SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 26 4 to 2 encoder (active HIGH inputs) Accepts 4 inputs lines and produce 2 bits output code corresponding to the activated input I0 O0 LSB I1 O1 MSB 4 to 2 I2 ENCODE R I3 M=4, LOGIC SYMBOL N=2 27 Truth table INPUTS OUTPU TS I3 I2 I1 I0 O1 O0 0 0 0 1 0 0 0 0 1 0 0 1 0 1 0 0 1 0 1 0 0 0 1 1 O0 = I1 + I3 O1 = I2 + I3 SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 28 Logic circuit – 4 to 2 I I2 I I0 3 1 O0 = I + I 1 23 O1 = I2+ I 3 Note that the I0 is not connected to the logic gates because the encoder outputs will normally be at 0 0 when none of the inputs I1 to I3 is HIGH 29 An Octal to binary encoder (8 line to 3 line encoder) with active HIGH inputs Accepts eight input lines and produce three bit output code corresponding to the activated input. It has eight inputs, one for each of the octal digits and three outputs that generate the corresponding binary number SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 30 8 to 3 line encoder (active HIGH inputs) I0 O0 LSB I1 O1 MSB 8 to 3 I2 ENCODE O2 R I7 M=8, LOGIC SYMBOL N=3 31 Truth table INPUTS OUTPUTS I7 I6 I5 I4 I3 I2 I1 I0 O2 O1 O0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 O0 = I1 + I3 + I5 + I7 O1 = I2 + I3 + I6 + I7 O2 = I4 + I5 + I6 + I7 32 8 to 3 line encoder Logic circuit I7 I I I I I2 I 1 I0 6 5 4 3 O0 = I1 + I3 + I 5 + I 7 O1 = I2 + I3 + I6 + I 7 O2 = I4 + I5 + I6 + I 7 SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 33  Limitations : I0 has no effect on the output Only one input can be activated at a given time Application: Handling multiple devices requests But, no simultaneous requests Establishing priorities solve the problem of multiple requests (thus priority encoders) 34 Priority Encoders In this type of encoder, a priority is assigned to each input so that, when more than one input is simultaneously active, the input with the highest priority is encoded. For example if I5 and I7 are active at the same time line I5 will be ignored and I7 will be encoded Therefore, the output code will be 111 You will note that with the previous encoders if two or more inputs are active simultaneously, the output produces undefined conditions. SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 35 Design 8 line to 3 line priority encoder with active high inputs TRUTH TABLE INPUTS OUTPUT CODES A7 A6 A5 A4 A3 A2 A1 A0 O2 O1 O0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 X 0 0 1 0 0 0 0 0 1 X X 0 1 0 0 0 0 0 1 X X X 0 1 1 0 0 0 1 X X X X 1 0 0 0 0 1 X X X X X 1 0 1 0 1 X X X X X X 1 1 0 1 X X X X X X X 1 1 1 SIT 112_INTRODUCTION TO DIGITAL ELECTRONICS 36 Writing logic equation In order to write the logic equation for priority encoder output, we first define 8 intermediate variables HO to H7 such that Hi (0