USART: Serial Communication Standards PDF

USART ENGR. KENN ARION WONG COMPUTER ENGINEERING DEPARTMENT WHAT is SERIAL COMMS? Serial communication is a method of transmitting data one bit at a time over a single channel or wire. It is commonly used for communication between devices, such as computers and peripherals. In serial commu...

USART ENGR. KENN ARION WONG COMPUTER ENGINEERING DEPARTMENT WHAT is SERIAL COMMS? Serial communication is a method of transmitting data one bit at a time over a single channel or wire. It is commonly used for communication between devices, such as computers and peripherals. In serial communication, data is sent sequentially, which contrasts with parallel communication, where multiple bits are transmitted simultaneously over multiple channels. Parallel data needs to be “shifted” to be transmitted serially. Asynchronous vs Synchronous Serial Asynchronous: Data is sent without a clock signal, using start and stop bits to indicate the beginning and end of a data packet. ASYNC vs SYNC SERIAL Synchronous: A clock signal is used to synchronize the sender and receiver, allowing for faster data transfer. SPEED of TRANSMISSION The speed of serial communication, whether asynchronous or synchronous, is influenced by several factors, including the protocol, the physical medium, and the devices involved. In synchronous serial, it uses a shared clock signal to synchronize the sender and receiver, which can lead to higher data rates with lower overhead. In asynchronous serial, uses start and stop bits to frame each byte of data, which adds some overhead and may limit maximum speed compared to synchronous methods - the transmission rate should match the reception rate. SPEED of TRANSMISSION Bit rate refers to the number of bits transmitted per second. It measures the speed of data transfer and is typically expressed in bits per second (bps). Baud rate refers to the number of signal changes or symbols transmitted per second. It measures the rate at which the signal changes, which may represent one or more bits depending on the encoding scheme used. ERRORS in SERIAL COMMS Bit Error: occurs when a single bit is incorrectly transmitted due to interference or noise. This can lead to a bit being read as 0 instead of 1, or vice versa. Framing Error: occurs when the receiver fails to detect the correct start and stop bits in the data frame, leading to misalignment in reading data. Overrun Error: occurs when a new byte overwrites the previous byte before the receiver completes the reading of the previous byte. ERRORS in SERIAL COMMS Parity Error: occurs when the number of 1s in a data frame does not match the expected parity. In some systems, the last bit (B7) is used as a parity check bit. Timeout Error: occurs when a device does not receive data within an expected time frame, indicating a potential communication failure. Checksum Error: it is used to check an error in blocks of data. Data blocks to be transmitted are added and the 2’s complement of the sum is calculated, which is sent as the last byte. STANDARDS in SERIAL COMMS RS-232 Description: A widely used standard for serial communication, particularly for connecting computers and peripherals. Data Rate: Typically ranges from 300 bps to 115,200 bps. Distance: Effective up to 15 meters (50 feet) depending on the data rate. Characteristics: Uses voltage levels to represent bits and includes start/stop bits for framing. STANDARDS in SERIAL COMMS RS-485 Description: A standard commonly used in industrial environments for its robustness over long distances. Data Rate: Up to 10 Mbps. Distance: Can communicate over distances of up to 1,200 meters (4,000 feet). Characteristics: Supports multipoint connections, allowing multiple devices on the same bus. STANDARDS in SERIAL COMMS I2C (Inter-Integrated Circuit) Description: A multi-master, multi-slave, packet- switched protocol used for short-distance communication between chips on a circuit board. Data Rate: Standard speeds of 100 kHz (Standard Mode), 400 kHz (Fast Mode), and up to 3.4 MHz (High-Speed Mode). Distance: Typically a few meters, depending on the bus capacitance. Characteristics: Uses two wires (SDA for data and SCL for clock) and supports multiple devices. STANDARDS in SERIAL COMMS SPI (Serial Peripheral Interface) Description: A synchronous serial communication protocol primarily used for short-distance communication between microcontrollers and peripherals. Data Rate: Can range from a few Mbps to tens of Mbps. Distance: Typically a few meters. Characteristics: Uses four wires (SDO, SDI, SCK, and CS) and supports full- duplex communication. THE RS-232 (EIA-232) RS-232 (Recommended Standard 232) is a widely used standard for serial communication between devices, such as computers and peripheral devices like modems, printers, and other serial devices. Purpose: RS-232 was developed to define the electrical characteristics and timing of signals, as well as the physical interface for serial data communication. Standardization: Initially introduced in the 1960s by the Electronic Industries Association (EIA), it has undergone several revisions. THE RS-232 (EIA-232) Signal Levels: Logic 1 (Mark): -3 to -15 volts (negative voltage) Logic 0 (Space): +3 to +15 volts (positive voltage) Ground Reference: A common ground reference (GND) is essential for proper operation. Data Transmission: Asynchronous Communication: RS-232 typically uses asynchronous serial communication, meaning it does not require a shared clock signal. Instead, it uses start and stop bits to frame data. Data Frame Structure: Start Bit: Indicates the beginning of a data frame (1 bit). Data Bits: Usually 5 to 8 bits (commonly 8 bits). Parity Bit: Optional bit for error checking (even, odd, or none). Stop Bits: Indicates the end of the data frame (1 to 2 bits). DB9 PIN CONFIGURATION Pin DTE Description 1 DCD Carrier Detect 2 RXD Receive Data 3 TXD Transmit Data 4 DTR Data Terminal Ready 5 GND Common Ground 6 DSR Data Set Ready 7 RTS Request to Send 8 CTS Clear to Send 9 RI Ring Indicator USART in PIC18 Can be configured as: Asynchronous: Full duplex Synchronous: Master half duplex Synchronous: Slave half duplex SFR: TXSTA: Transmit Status and Control RCSTA: Receive Status and Control BAUDCON: Baud Rate Control USART in PIC18 TRANSMIT BLOCK DIAGRAM TXSTA REGISTER 7 6 5 4 3 2 1 0 CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 7: CSRC: Clock Source Select bit Asynchronous mode: Don’t care Synchronous mode: 1 = Master Mode 0 = Slave Mode 6: TX9: 9-Bit Transmit Enable bit 1 = Selects 9-bit transmission 0 = Selects 8-bit transmission 5: TXEN: Transmit Enable bit 1 = Enable transmission 0 = Disable transmission TXSTA REGISTER 7 6 5 4 3 2 1 0 CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 4: SYNC: EUSART Mode Select bit 1 = Synchronous mode 0 = Asynchronous mode 3: SENDB: Send Break Character bit Asynchronous mode: 1 = Send Sync Break on next transmission (cleared by HW on completion) 0 = Sync Break transmission completed Synchronous mode: Don’t care 2: BRGH: High Baud Rate Select bit Asynchronous mode: 1 = High Speed 0 = Low Speed Synchronous mode: Unused in this mode TXSTA REGISTER 7 6 5 4 3 2 1 0 CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 1: TRMT: Transmit Shift Register Status bit (Read-only) 1 = TSR empty 0 = TSR full 0: TX9D: 9th bit of Transmit Data USART in PIC18 RECEIVE BLOCK DIAGRAM RCSTA REGISTER 7 6 5 4 3 2 1 0 SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 7: SPEN: Serial Port Enable bit 1 = Serial port enabled 0 = Serial port disabled 6: RX9: 9-Bit Receive Enable bit 1 = Selects 9-bit reception 0 = Selects 8-bit reception 5: SREN: Single Receive Enable bit Asynchronous mode: Don’t care Synchronous mode - Master: Synchronous mode - Slave: 1 = Enables single receive Don’t care 0 = Disables single receive RCSTA REGISTER 7 6 5 4 3 2 1 0 SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 4: CREN: Continuous Receive Enable bit Asynchronous mode: 1 = Enables receiver 0 = Disables receiver Synchronous mode: 1 = Enables continuous receive until enable bit CREN is cleared 0 = Disables continuous receive 3: ADDEN: Address Detect Enable bit Asynchronous mode 9-bit (RX9 = 1): 1 = Enables address detection, enables interrupt and loads the receive buffer when RSR is set 0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit Asynchronous mode 9-bit (RX9 = 0) Don’t care RCSTA REGISTER 7 6 5 4 3 2 1 0 SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 2: FERR: Framing Error bit (Read-only) 1 = Framing error 0 = No framing error 1: OERR: Overrun Error bit (Read-only) 1 = Overrun error (can be cleared by clearing bit CREN) 0 = No overrun error 0: RX9D: 9th bit of Received Data (Read-only) Note: when there is a reception error, clear the CREN bit to acknowledge the error and reactivate the EUSART reception. BAUDCON REGISTER Configuration Bits BRG/EUSART Mode Formula SYNC BRG16 BRGH 0 0 0 8-bit/Asynchronous FOSC/[64 (n + 1)] 0 0 1 8-bit/Asynchronous FOSC/[16 (n + 1)] 0 1 0 16-bit/Asynchronous 0 1 1 16-bit/Asynchronous 1 0 X 8-bit/Synchronous FOSC/[4 (n + 1)] 1 1 X 16-bit/Synchronous choose the lowest percentage error among each formula to determine the optimal mode for a given baud rate, where n = value of SPBRGH:SPBRG register pair BAUDCON REGISTER 7 6 5 4 3 2 1 0 ABDOVF RCIDL RXDTP TXCKP BRG16 - WUE ABDEN 7: ABDOVF: Auto-Baud Acquisition Rollover Status bit 1 = A BRG rollover has occurred during Auto-Baud Rate Detect mode 0 = No BRG rollover has occurred 6: RCIDL: Receive Operation Idle Status bit 1 = Receive operation is Idle 0 = Receive operation is active 5: RXDTP: Received Data Polarity Select bit Asynchronous mode: 1 = RX data is inverted 0 = RX data received is not inverted Synchronous modes: 1 = CK clocks are inverted 0 = CK clocks are not inverted BAUDCON REGISTER 7 6 5 4 3 2 1 0 ABDOVF RCIDL RXDTP TXCKP BRG16 - WUE ABDEN 4: TXDTP: Transmit Data Polarity Select bit Asynchronous mode: 1 = TX data is inverted 0 = TX data is not inverted Synchronous modes: 1 = CK clocks are inverted 0 = CK clocks are not inverted 3: BRG16: 16-Bit Baud Rate Register Enable bit 1 = 16-bit Baud Rate Generator – SPBRGH and SPBRG 0 = 8-bit Baud Rate Generator – SPBRG only, SPBRGH value ignored 2: Unimplemented: Read as ‘0’ BAUDCON REGISTER 7 6 5 4 3 2 1 0 ABDOVF RCIDL RXDTP TXCKP BRG16 - WUE ABDEN 1: WUE: Wake-up Enable bit Asynchronous mode: 1 = EUSART will continue to sample the RX pin – interrupt generated on falling edge; bit cleared in hardware on following rising edge 0 = RX pin not monitored or rising edge detected Synchronous mode: Unused in this mode 0: ABDEN: Auto-Baud Detect Enable bit Asynchronous mode: 1 = Enable baud rate measurement on the next character. Requires reception of a Sync field (55h); cleared in hardware upon completion. 0 = Baud rate measurement disabled or completed Synchronous mode: Unused in this mode INTERRUPTS Flag bits TXIF (Bit 4 of PIR1) 1 indicates that TXREG is empty. Automatically cleared by hardware after writing data to TXREG register. RCIF (Bit 5 of PIR1) 1 indicates that RCREG is full. Automatically cleared by hardware after reading the RCREG register INTERRUPTS Priority bits (1 indicates high priority interrupt) TXIP (Bit 4 of IPR1) RCIP (Bit 5 of IPR1) Enable bits (1 indicates peripheral interrupt is enabled) TXIE (Bit 4 of PIE1) RCIE (Bit 5 of PIE1)