Computer Organization and Architecture material Unit I & II.pdf

Computer Organization and Architecture  Syllabus Course Objectives: 1. Describe the functional blocks of a computer to interpret the instructions and various addressing modes for the execution of the instruction cycle. 2. Perform Arithmetic micro-operations...

Computer Organization and Architecture  Syllabus Course Objectives: 1. Describe the functional blocks of a computer to interpret the instructions and various addressing modes for the execution of the instruction cycle. 2. Perform Arithmetic micro-operations on integers and Floating point numbers. 3. Analyze the cost performance and design trade-offs in designing and constructing a computer processor including memory. 4. Discuss the different ways of communicating with I/O devices & interfaces and the design techniques to enhance the performance using and pipelining, parallelism. UNIT-I: Basics of conversions from/to Binary, decimal, octal, hexa. Circuits: half adders, full adders, flip-flops. Functional blocks of a computer: CPU, memory, input-output subsystems, control unit. Instruction set architecture of a CPU: Introduction to x86 architecture. Registers & Register transfer, instruction execution cycle, RTL interpretation of instructions, addressing modes, instruction set. UNIT-II: Data representation: Complements, Signed number representation, fixed and floating point representations, character representation, IEEE 754 format. Computer arithmetic: Integer addition and subtraction, ripple carry adder, carry look- ahead adder, etc. multiplication – shift- and-add, Booth multiplier, carry save multiplier, etc. Division restoring and non- restoring techniques, floating point arithmetic. UNIT-III: CPU control unit design: Hardwired and micro-programmed design approaches, design of a simple hypothetical CPU. Memory system design: Semiconductor memory technologies. Memory organization: Memory interleaving, concept of hierarchical memory organization, cache memory, cache size vs. block size, mapping functions, replacement algorithms, write policies. UNIT-IV: Peripheral devices and their characteristics: Input-output subsystems, I/O device interface, I/O transfers – preprogram-controlled interrupt driven and DMA, privileged and non-privileged instructions, software interrupts and exceptions. Programs and processes–role of interruption process state transitions, I/O device interfaces–SCII, USB UNIT-V: Pipelining: Basic concepts of pipelining, throughput and speedup, pipeline hazards. Parallel Processors: Introduction to parallel processors, Concurrent access to memory and cache coherency. Course Outcomes: After completion of the course, the student will be able to 1. Interpret the functional architecture of computing systems. 2. Understand different representations of data and arithmetic operations. 3. Impart the knowledge on micro programming 4. Explore memory, control and I/O functions. 5. Analyze instruction-levell parallelism, Concepts of advanced pipeline techniques. Text Books: 1. Computer System Architecture M. M. Mano:, 3rd ed., Prentice Hall of India, New Delhi, 1993. 2. Computer Organization and Design: The Hardware/Software Interface, David A. Patterson and John L. Hennessy. 3. Computer Organization and Embedded Systems, Carl Hamacher. References: 1. Computer Architecture and Organization, John P. Hayes. 2. Computer Organization and Architecture: Designing for Performance, William Stallings. 3. Computer System Design and Architecture, Vincent P. Heuring and Harry F. Jordan.  UNIT-I Basics of conversions from/to Binary, decimal, octal, hexa. Number systems There are many methods or techniques which can be used to convert numbers from one base to another. We'll demonstrate here the following − ▪ Decimal to Other Base System ▪ Other Base System to Decimal ▪ Other Base System to Non-Decimal ▪ Shortcut method − Binary to Octal ▪ Shortcut method − Octal to Binary ▪ Shortcut method − Binary to Hexadecimal ▪ Shortcut method − Hexadecimal to Binary Decimal to Other Base System Steps Step 1 − Divide the decimal number to be converted by the value of the new base. Step 2 − Get the remainder from Step 1 as the rightmost digit (least significant digit) of new base number. Step 3 − Divide the quotient of the previous divide by the new base. Step 4 − Record the remainder from Step 3 as the next digit (to the left) of the new base number. Repeat Steps 3 and 4, getting remainders from right to left, until the quotient becomes zero in Step 3. The last remainder thus obtained will be the Most Significant Digit (MSD) of the new base number. Example − Decimal Number: 2910 Calculating Binary Equivalent Step Operation Result Remainder Step 1 29 / 2 14 1 Step 2 14 / 2 7 0  Step 3 7/2 3 1 Step 4 3/2 1 1 Step 5 1/2 0 1 As mentioned in Steps 2 and 4, the remainders have to be arranged in the reverse order so that the first remainder becomes the Least Significant Digit (LSD) and the last remainder becomes the Most Significant Digit (MSD). Decimal Number − 2910 = Binary Number − 111012. Other Base System to Decimal System Steps Step 1 − Determine the column (positional) value of each digit (this depends on the position of the digit and the base of the number system). Step 2 − Multiply the obtained column values (in Step 1) by the digits in the corresponding columns. Step 3 − Sum the products calculated in Step 2. The total is the equivalent value in decimal. Step Binary Number Decimal Number Step 1 111012 ((1 × 24) + (1 × 23) + (1 × 22) + (0 × 21) + (1 × 20))10 Step 2 111012 (16 + 8 + 4 + 0 + 1)10 Step 3 111012 2910 Example Binary Number − 111012 Calculating Decimal Equivalent − Binary Number − 111012 = Decimal Number − 2910 Other Base System to Non-Decimal System Steps Step 1 − Convert the original number to a decimal number (base 10). Step 2 − Convert the decimal number so obtained to the new base number. Example Octal Number − 258 Calculating Binary Equivalent − Step 1 − Convert to Decimal Step Octal Number Decimal Number Step 1 258 ((2 × 81) + (5 × 80))10 Step 2 258 (16 + 5 )10 Step 3 258 2110 Octal Number − 258 = Decimal Number − 2110 Step 2 − Convert Decimal to Binary Step Operation Result Remainder Step 1 21 / 2 10 1 Step 2 10 / 2 5 0 Step 3 5/2 2 1 Step 4 2/2 1 0  Step 5 1/2 0 1 Decimal Number − 2110 = Binary Number − 101012 Octal Number − 258 = Binary Number − 101012 Shortcut method - Binary to Octal Steps Step 1 − Divide the binary digits into groups of three (starting from the right). Step 2 − Convert each group of three binary digits to one octal digit. Example Binary Number − 101012 Calculating Octal Equivalent − Step Binary Number Octal Number Step 1 101012 010 101 Step 2 101012 28 58 Step 3 101012 258 Binary Number − 101012 = Octal Number − 258 Shortcut method - Octal to Binary Steps Step 1 − Convert each octal digit to a 3 digit binary number (the octal digits may be treated as decimal for this conversion). Step 2 − Combine all the resulting binary groups (of 3 digits each) into a single binary number. Example Octal Number − 258 Calculating Binary Equivalent − Step Octal Number Binary Number Step 1 258 210 510 Step 2 258 0102 1012 Step 3 258 0101012 Octal Number − 258 = Binary Number − 101012 Shortcut method - Binary to Hexadecimal Steps Step 1 − Divide the binary digits into groups of four (starting from the right). Step 2 − Convert each group of four binary digits to one hexadecimal symbol. Example Binary Number − 101012 Calculating hexadecimal Equivalent − Step Binary Number Hexadecimal Number Step 1 101012 0001 0101 Step 2 101012 110 510 Step 3 101012 1516 Binary Number − 101012 = Hexadecimal Number − 1516 Shortcut method - Hexadecimal to Binary Steps Step 1 − Convert each hexadecimal digit to a 4 digit binary number (the hexadecimal digits may be treated as decimal for this conversion). Step 2 − Combine all the resulting binary groups (of 4 digits each) into a single binary number. Example Hexadecimal Number − 1516 Calculating Binary Equivalent −  Step Hexadecimal Number Binary Number Step 1 1516 110 510 Step 2 1516 00012 01012 Step 3 1516 000101012 Hexadecimal Number − 1516 = Binary Number − 101012 Circuits: half adders, full adders, flip-flops This affirms that in combinational circuits the output at any moment depends only on the present input. This implies that the combinational circuit does not employ any memory, which further states that the previous state of input does not have any effect on the present state of the circuit. A combinational circuit can hold an “n” number of inputs and “m” number of outputs. Through this article on Adders, learn about the full adder, half adder, Binary Parallel Adders, Carry Look Ahead Adder, BCD Adder, Serial Adder with circuit diagrams and truth tables. Simply, a circuit in which different types of logic gates are combined is recognized as a combinational logic circuit. There are different types of combinational logic circuits, such as Adder, Subtractor, Decoder, Encoder, Multiplexer, De-multiplexer, and more. In this article we will cover adders, starting with half adders. Know all about the OR Gate here. Half Adder A Half-adder is an arithmetic circuit that needs two binary inputs and two binary outputs to perform the addition of two single bits. The input variable determines the augend and addend bits whereas the output variable generates the sum and carry. The Half-Adder is a basic building block for adding two numbers(two inputs) and produce out(two outputs). We can understand more about the function of a half-adder with the block diagram, Logical circuit, and truth table of a half-adder as shown below: The adder is used to perform OR operation of two single bit binary numbers and generates an output as follows: The logical expression for Half−adderThe log⁡ical exp⁡ression for Half−adder Sum=A¯¯¯¯B+AB¯¯¯¯=A⊕BSum=A¯B+AB¯=A⊕B Carry= ABCarry= AB Know which are the computer’s Input and Output Devices here. The half adder can be realized using universal gates i,e the NAND and NOR gates as shown below: Half adder realization using NAND gate. Half adder realization using NOR gate. Full Adder The half adder can be used to add two numbers only. To overcome this issue, the full adder was designed. The full adder is employed to add three 1-bit binary numbers (consider the inputs as A, B, and C) and generates the output as SUM and CARRY. The block diagram of Full added is as shown below: The full adder truth table and K-map implementation are presented below: The logical expression for Full−adderThe log⁡ical exp⁡ression for Full−adder The main difference between a half-adder and a full-adder is that the full-adder has three inputs and two outputs, on the other hand, a half-adder has only two inputs and two outputs. This adder is difficult to understand when compared to half-adder. The full adder circuit diagram using two half- adders is shown below. Similar to the half adder, a full-adder can also be realized using universal gates i,e the NAND and NOR gates. The total number of NAND/NOR gates required to implement a full adder is equal to 9. Learn about the AND Gate here. # Computers has two kinds of components: Hardware, consisting of its physical devices (CPU, memory, bus, storage devices,...) Software, consisting of the programs it has (Operating system, applications, utilities,...) FUNCTIONAL UNIT A computer consists of five functionally independent main parts input, memory, arithmetic logic unit (ALU), output and control unit. Functional units of computer Input device accepts the coded information as source program i.e. high level language. This is either stored in the memory or immediately used by the processor to perform the desired operations. The program stored in the memory determines the processing steps. Basically the computer converts one source program to an object program. i.e. into machine language. Finally the results are sent to the outside world through output device. All of these actions are coordinated by the control unit. The source program/high level language program/coded information/simply data is fed to a computer through input devices keyboard is a most common type. Whenever a key is pressed, one corresponding word or number is translated into its equivalent binary code over a cable & fed either to memory or processor. Joysticks, trackballs, mouse, scanners etc are other input devices. Arithmetic logic unit (ALU):- Most of the computer operators are executed in ALU of the processor like addition, subtraction, division, multiplication, etc. the operands are brought into the ALU from memory and stored in high speed storage elements called register. Then according to the instructions the operation is performed in the required sequence. The control and the ALU are may times faster than other devices connected to a computer system. This enables a single processor to control a number of external devices such as key boards, displays, magnetic and optical disks, sensors and other mechanical controllers. Output unit:- These actually are the counterparts of input unit. Its basic function is to send the processed results to the outside world. Examples:- Printer, speakers, monitor etc. Control unit:- It effectively is the nerve center that sends signals to other units and senses their states. The actual timing signals that govern the transfer of data between input unit, processor, memory and output unit are generated by the control unit. The memory, arithmetic and logic, and I/O units store and process information and perform input and output operations. The operation of these units must be coordinated in some way. This is the responsibility of the control unit. The control unit is effectively the nerve center that sends control signals to other units and senses their states. Control circuits are responsible for generating the timing signals that govern the transfers and determine when a given action is to take place. In practice, much of the control circuitry is physically distributed throughout the computer. A large set of control lines (wires) carries the signals used for timing and synchronization of events in all units. Input Unit: Computers accept coded information through input units. The most common input device is the keyboard. Whenever a key is pressed, the corresponding letter or digit is automatically translated into its corresponding binary code and transmitted to the processor. Microphones can be used to capture audio input which is then sampled and converted into digital codes for storage and processing. Similarly, cameras can be used to capture video input. Eg: touchpad, mouse, joystick Architecture of 8086(x86): The architecture of 8086 supports a 16-bit ALU , a set of 16-bit registers, and provides segmented memory addressing capability,fetched instruction queue for overlapped fetching and execution. Architecture of 8086 is pipeline type of architecture. The architecture of 8086 is divided into two functional parts i.e., i. Execution unit (EU) ii. Bus interface unit (BIU) These two units work asynchronously. Functional division of architecture speeds up the processing, since BIU and EU operate parallelly and independently i.e., EU executes the instructions and BIU fetches another instruction from the memory simultaneously. As the whole architecture is divided into two independent functional parts and both the subsystem’s operations can be overlapped, hence the architecture is PIPELINING type of architecture. EXECUTION UNIT The execution unit informs the BIU of the processor regarding from where to fetch the instructions from and then executes these instructions. The execution unit consists of the following: ▪ General purpose registers ▪ Stack pointer ▪ Base pointer ▪ Index registers ▪ ALU ▪ Flag register( FLAGS/ PSW) ▪ Instruction decoder ▪ Timing and control unit Functions of EU Tells BIU regarding from where to fetch instructions or to read data. Receives opcode of an instruction from the queue. decodes the instructions. Executes the instruction. Functions of various parts of EU Control circuitry: Directs internal operations. Instruction Decoder: Translates instructions fetched from memory into series of actions. ALU: Performs arithmetic and logical operations. FLAGS: Reflects the status of program. General purpose registers: Used to store Temporary data.  Index and Pointer registers: Specifies/ informs about offset of operand BUS INTERFACE UNIT The BIU handles transfer of data and address between the processor and memory/ I/O devices by computing address (Physical/ Effective address) and send the computed address to memory / I/O and fetches instruction codes then stores them in FIFO register set called Queue register. The BIU consists of the following: ❖ Segment Registers ❖ Instruction pointer ❖ 6-Byte instruction Queue Register Functions of BIU Handles transfer of data and address between processor and memory / I/O devices. Compute physical address and send it to memory interfaces. Fetches instruction codes and stores it in Queue Reads/Writes data from/to memory/ I/O devices Functions of various parts of BIU Segment registers : Used to hold the starting address of the segment registers. Queue register: Used to store pre fetched instructions and inputs it to EU. Instruction Pointer: Used to point to the next instruction to be executed by EU. While the EU is decoding an instruction or executing an instruction which does not require use of the buses, the BIU fetches up to six instruction bytes that will be following the present instruction from memory and stores them in the queue register simultaneously. INSTRUCTION SET ARCHITECTURE OF CPU Register Transfer Language: A digital computer system exhibits an interconnection of digital modules such as registers, decoders, arithmetic elements, and Control logic. These digital modules are interconnected with some common data and control paths to form a complete digital system. Digital modules are best defined by the registers and the operations that are performed on the data stored in them. The operations performed on the data stored in registers are called Micro-operations. A microoperation is an elementary operation performed on the information stored in one or more registers. The result of the operation may replace the previous binary information of a register or may be transferred to another register. Examples of microoperations are shift, count, clear, and load. The Register Transfer Language is the symbolic representation of notations used to specify the sequence of micro-operations. In a computer system, data transfer takes place between processor registers and memory and between processor registers and input-output systems. These data transfer can be represented by standard notations given below: o Notations R0, R1, R2..., and so on represent processor registers. o The addresses of memory locations are represented by names such as LOC, PLACE, MEM, etc. o Input-output registers are represented by names such as DATA IN, DATA OUT and so on. o The content of register or memory location is denoted by placing square brackets around the name of the register or memory location. Register Transfer: Computer registers are denoted by capital letters (sometimes followed by numerals) to denote the function of the register. The register that holds an address for the memory unit is usually called a memory address register and is denoted by MAR. Other registers are PC (for program counter), IR (for instruction register, and R1 (for processor register). An n-bit register is sequence of n-flipflops numbered from 0 through n-1, starting from 0 in the rightmost position and increasing the numbers toward the left. The most common way to represent a register is by a rectangular box with the name of the register inside, as shown in the figure below. The individual bits can be distinguished as shown in (b). The numbering of bits in a 16-bit register can be marked on top of the box as shown in (c). A16-bit register is partitioned into two parts in (d). Bits 0 through 7 are assigned the symbol L (for low byte) and bits 8 through 15 are assigned the symbol H(for high byte). The name of the 16-bit register is PC. The symbol PC (0-7) or PC (L) refers to the low-order byte and PC(8-15) or PC(H) to the high-order byte. Information transfer from one register to another is designated in symbolic form by means of a replacement operator as shown below, which denotes a transfer of the contents of register R1 into register R2. The contents of R2 are replaced by the contents of R1. By definition, the content of the source register R1 does not change after the transfer register transfer implies that circuits are available from the outputs of the source register to the inputs of the destination register. R2