Logic Gate and Combination Circuit PDF

Logic Gate and Combination Circuit V. D vin a a  Logic Gates Logic gates are called binary logic gates since they operate with binary numbers. These are the building blocks in the digital system They ar...

Logic Gate and Combination Circuit V. D vin a a  Logic Gates Logic gates are called binary logic gates since they operate with binary numbers. These are the building blocks in the digital system They are used in built in circuits A logic gate is an electronic circuit that operates on one or more inputs signals to produce standard output signals.  Basic Logic Gates There are three basic logic gates AND gate OR gate NOT gate  AND gate It performs logical multiplication operation It is an electronic circuit that generates an output signal of 1, only if all the input signals are also 1.  Truth Table for 3-input AND gate Output A B C R=A.B.C 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1  OR gate It performs logical addition operation. It is an electronic circuit that generates an output signal of 1, if any of the input signals is also 1.  Truth Table for 3-input OR gate Output A B C R=A+B+C 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 1  NOT gate This logic gate performs complement operation. It is an electronic circuit that generates the reverse of the input signal as the output signal.  Universal logic Gates Other useful gates can be made from the basic gates. The basic gates can be formed using the NAND and NOR gates. Hence they are called universal gates. There are two universal gates NAND gate NOR gate  NOR gate The abbreviation NOR is the short form of NOT-OR. The NOR function is the complement of OR function. A NOR gate has two or more inputs but only on output. Its output is given by Y= A+B It will give an output 1 only if all the inputs are 0 NOR gate  Truth Table for 3-input NOR gate Output A B C R=A+B+C 0 0 0 1 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 0  NAND gate The abbreviation NAND is short form of NOT-AND. The NAND function is the complement of the AND function A NAND gate has two or more inputs but only one output. Even if one input is 0 the output is 1. NAND gate  Truth Table for 3-input NAND gate Output A B C R=A.B.C 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 0  Compound Logic gates There are two compound logic gates XOR gate- Exclusive OR gate XNOR gate- Exclusive NOR gate  XOR gate XOR gate can also have two or more inputs but produces one output signal XOR is a special type of OR gate which is constructed with combination of AND,OR and NOT gates. XOR produces output 1 when the input combinations have odd number of 1’s In boolean algebra ⊕ sign stands for XOR operation. R= (A ⊕ B) = A.B + A.B XOR gate  Truth Table for 3-input XORgate y=A’B’C+A’BC’+AB’C’+ABC Output A B C 0 0 0 0 0 0 1 1 Minterm= 0 Complement 0 1 0 1 1 Non-Complement 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1  XNOR gate XNOR operation is the complement of XOR operation XNOR gate produces output 1 when the input combination has even number of 1’s. The output is given by: R= (A ⊕ B) = A.B + A.B XNOR gate  Truth Table for 3-input XNORgate Output A B C 0 0 0 1 Y= A’B’C’+A’BC+AB’C+ABC’ 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 0  NAND as an Universal gate Implementing NOT using only NAND g te All NAND input pins connect to the input signal R= A.A= A a  Implementing AND gate using NAND gate We require two NAND(A.B)’ gates to implement an AND (A.B) gate The rst one produces the inverted AND result and the second one acts as an inverter to obtain the normal AND output. fi  Implementing OR gate from NAND gate We require 3 NAND gate to build an OR gate We rst complement the normal inputs A and B by using two single-input NAND gate. We then feed the complemented variables to another NAND gate producing the normal OR output. R=( A’. B’)’ [ apply Demorgan’s Theorem (A.B)’=A’+B’] =(A’)’+(B’)’ [(A’)’=A] =A+B fi  NOR gate as universal gate Implementing NOT using only NOR g te All NOR input pins connect to the input signal R= (A+A) = A’.A = A’ ’ ’ a  Implementing AND gate using NOR gate We require three NOR gates to implement an AND gate We rst complement the normal inputs A and B by using two single-input NOR gate. We then feed the complemented variables to another NOR gate producing the normal OR output. R= (A’+B’)’ =(A’)’. (B’)’ =A.B fi  Implementing OR gate using NOR gate We require two NOR gates to implement an OR gate The rst one produces the inverted OR result and the second one acts as an inverter to obtain the normal OR output. fi Conversion of Boolean Expression into Logic Gates Find out the no. of inputs required. There will always be one output Based on the signs (I,e +,. ) nd out the logic gates to be used. Finally draw the circuit diagram We will be using only basic gates to draw the circuits I,e AND,OR,NOT fi  1. R=A.B+C A,B,C are the inputs R is the output “.” indicated we have to use an AND gate “+” indicates we have to use an OR gate  Examples 1. Y=AB+BC 2. R=A’+BC 3. R=A+B+C’ 4. R=(AB)’+CD+(EF)’ 5. Q=ABC+(ABC)’ 6. R=(x’+y).(x+z).(y+z) Conversion on Logic Circuits into Boolean Expression Identify the no. of inputs. Based on the logic gates give in the circuit, replace the logic gates with its symbols Finally write the boolean expression  Example D=A’.(B+C) A D B C  Example 2 Y=(A+B).(A.B)’ A B Y  Combinational Logic Circuits A combinational circuit is one in which the state of the output at any instant is entirely determined by the sates of the inputs at that time Combinational circuits are those logic circuits whose operations can be completely describes by a truth table or boolean expressions. Examples of combinational circuits are adders, subtractors, multiplexers, demultiplexers etc  Combinational Logic Circuits There are three main ways of specifying the functions: Boolean algebra: This forms the algebraic expression showing the operation of the logic circuit for each input variables. The result will be a logical output Truth Table: A truth table de nes the function of a logic gate by providing a concise list that shows all the output states in tabular form for each possible combinations of input variables that the gate could encounter. Logic Diagram: This a graphical representation of the logic circuit that shows the wiring and connections of each individual logic gates, represented by a speci c graphical symbol. fi fi  Adder Circuit The digital circuit which performs the addition of number is called Adder. Adder circuit can be of two types Half Adder and Full Adder.  Half Adder The half adder adds two single binary digits A and B.(inputs) It has two outputs, Sum(S) and Carry(C) If A and B are the input bits, then sum bit (S) is the XOR of A and B and the carry bit (C) will be the AND of A and B. The half adder can add only two input bits (A and B) and has nothing to do with the carry if there is any in the input. So if the input to a half adder have a carry, then it will be neglected it and adds only the A and B bits. That means the binary addition process is not complete and that’s why it is called a half adder.    Half Adder- Truth Table Input Output A B S(Sum) C(Carry) Sum-> XOR=A B Carry-> AND= A.B 0 0 0 0 S=A’B + AB’ 0 1 1 0 C=AB 1 0 1 0 1 1 0 1 Half Adder Sum-> XOR=A B Carry-> AND= A.B S=A’B + AB’ C=AB  Full Adder The arithmetic sum of three input bits forms a full adder. It consist of three inputs and two outputs. The rst two inputs are A and B and the third input is an input carry as C-IN. The output carry is designated as C-OUT and the normal output is designated as S which is SUM. fi  Full Adder S=A’B’Cin+A’BCin’+AB’Cin’+ABCin =A’(B’Cin+BCin’)+A(B’Cin’+BCin) =A’(B Cin)+ A(B Cin)’ Input Output =A’Y+AY’ A B Cin S(SUM) Cout =A Y A xor B xor Cin 0 0 0 0 0 Let->( B Cin) be Y 0 0 1 1 0 0 1 0 1 0 Cout=A’BCin +AB’Cin+ABCin’+ABCin =A(B’Cin+BCin’)+BCin(A’+A) 0 1 1 0 1 =A(B XOR Cin)+BCin 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Full Adder  Subtractor Circuit The logic circuit is used to subtract two binary numbers. Three bits are involved in performing th subtraction : minuend (A), subtrahend (B) and a borrow. There are two types of subtractors : half subtractors and full subtractors.  Half Subtractor It is used to subtract two bits at a time. It follows the rules of binary subtraction. There are two input(minuend & subtrahend) and two outputs (Di erence and borrow) ff  Half Subtractor- Truth Table Input Output D=A’B+AB’=A XOR B W=A’B A B D(Di erence) W (Borrow) 0 0 0 0 0 1 1 1 1 0 1 0 1 1 0 0 ff Half Subtractor  Full Subtractor It is used to perform subtraction of higher order bits. It has three inputs which are minuend (A), Subtrahend (B) and input borrow(Wi) arising due to previous subtraction Two outputs which are di erence (D) and output borrow (Wo) ff  Full Subtractor Input Output D=A’B’W + A’BW’ + AB’W’ +ABW A B Wi Di erence (D) Borrow(Wo) = A’(B’W+BW’)+A(B’W’+BW) 0 0 0 0 0 =A’(B XOR W)+A(B XOR W)’ 0 0 1 1 1 LET Y-> (B XOR W) 0 1 0 1 1 =A’Y+AY’ =A XOR Y 0 1 1 0 1 D=A XOR B XOR W 1 0 0 1 0 1 0 1 0 0 WO=A’B’W+A’BW’+A’BW+ABW 1 1 0 0 0 =W(A’B’+AB)+A’B(W’+W) =W(A XOR B)’+A’B 1 1 1 1 1 ff Full Subtractor  4-bit Adder/Subtractor Circuit In this circuit we use full adder to perform both addition and subtraction. For performing subtraction we use the 2’s complement method. The circuit consist of 4 full adders and 4 XOR gates 4 bit adder/subtractor  4-bit Adder/Subtractor Circuit When the control signal K=0 then the circuit will perform 4 bit addition. If K=1 then the circuit will perform 4 bit subtraction. For addition A0 and B0 is added so that S0 can be obtained. Similarly, A1 and B1 is added to obtain S1. When K=1, 2’s complement [1’s complement +1] of second number is added with the rst number fi  Multiplexer Multiplexer means many to one Multiplexer selects one input signal out of many input signals Multiplexer is also called as Data Selector Device Two sets of input lines- one set of input lines and other set of control lines(selectors). There is only one output line (always) If there are n selectors there will be 2n input lines. We will be discussing 4x1 MUX- 4x1 means 4 input lines, 1 output line Multiplexer -Block Diagram  Truth Table S1 S0 Y 0 0 I0 0 1 I1 1 0 I2 1 1 I3 CIRCUIT DIAGRAM  Home work Write the truth table, Boolean expression of 8x1 MUX. Also draw the circuit diagram for the same  Demultiplexer Demultiplexer performs the reverse operation of a multiplexer. There are one input, controls (control lines), and many outputs. In this circuit, out of the many outputs one output is selected and thr single input is connected with the particular output line. Demultiplexer is called as Data Distributor device. In DEMUX, for one input there are 2n output lines then there are n control lines.  Truth Table Input line is Control Line Output Channel Connected with S1 S0 O3 O2 O1 O0 I O0=S1’ S0’ I 0 0 0 0 0 1 O0 O1=S1’ S0 I O2=S1 S0’ I 0 1 0 0 1 0 O1 O3=S1 S0 I 1 0 0 1 0 0 O2 1 1 1 0 0 0 O3 LOGIC DIAGRAM  Encoder Electronic devices are required to convert alphanumeric and decimal numbers into binary codes. The process through which it is converted is called encoding. An encoder is used for encoding. The function of an encoder is to produce binary codes. There are 2n input lines and n bits of binary number corresponding to the active input  Decimal to Binary Encoder This encoder is constructed with 10 inputs (0-9) and 4 output lines. At any one time, only one input line has a value 1.  Truth Table INPUTS OUTPUT I0 I1 I2 I3 I4 I5 I6 I7 I8 I9 Y3 Y2 Y1 Y0 Y3=I8 +I9 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 Y2=I4+I5+I6+I7 0 0 1 0 0 0 0 0 0 0 0 0 1 0 Y1=I2+I3+I6+I7 0 0 0 1 0 0 0 0 0 0 0 0 1 1 Y0=I1+I3+I5+I7+I9 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 LOGIC DIAGRAM Y3=I8 +I9 Y2=I4+I5+I6+I7 Y1=I2+I3+I6+I7 Y0=I1+I3+I5+I7+I9  Octal to Binary Encoder Octal to binary encoder consist of 8 inputs (0-7) and 3 output lines. At any one time only one input line has a value of 1  Truth Table INPUTS OUTPUT D0 D1 D2 D3 D4 D5 D6 D7 Y2 Y1 Y0 Y2=D4+D5+D6+D7 1 0 0 0 0 0 0 0 0 0 0 Y1=D2+D3+D6+D7 0 1 0 0 0 0 0 0 0 0 1 Y0=D1+d3+D5+D7 0 0 1 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 1 1 1 1 Logic Diagram Y2=D4+D5+D6+D7 Y1=D2+D3+D6+D7 Y0=D1+d3+D5+D7  Decoder The inputs which are given to the computer are converted into its equivalent binary codes with the help of encoder. These codes are decoded and converted into equivalent output signals so that human beings can understand it. This process is called decoding ans it is done with the help of decoder. At any one time, only one output line has a value 1. In a decoder, for n input lines the maximum number of output lines is 2n. Example: if there are 2 input lines then we will have 22=4 output lines. This is a 2x4 decoder  2x4 Decoder- Truth Table A B Q3 Q2 Q1 Q0 Q0=A’.B’ Q1=A’.B 0 0 0 0 0 1 Q2=A.B’ Q3=A.B 0 1 0 0 1 0 1 0 0 1 0 0 1 1 1 0 0 0 2x4 Decoder- Truth Table Q0=A’B’ Q1=A’B Q2=AB’ Q3=AB  3x 8 decoder Design a 3x 8 decoder. Write the truth table and draw the logic diagram for the same. A B C Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Q0=A’B’C’ 0 0 0 0 0 0 0 0 0 0 1 Q1=A’B’C 0 0 1 0 0 0 0 0 0 1 0 Q2=A’BC’ 0 1 0 0 0 0 0 0 1 0 0 Q3=A’BC 0 1 1 0 0 0 0 1 0 0 0 Q4=AB’C’ Q5=AB’C 1 0 0 0 0 0 1 0 0 0 0 Q6=ABC’ 1 0 1 0 0 1 0 0 0 0 0 Q7=ABC 1 1 0 0 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0