Chapter 6: Synchronization Tools PDF

Chapter 6: Synchronization Tools Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018  Outline  Background  The Critical-Section Problem  Peterson’s Solution...

Chapter 6: Synchronization Tools Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018  Outline  Background  The Critical-Section Problem  Peterson’s Solution  Hardware Support for Synchronization  Mutex Locks  Semaphores  Monitors  Liveness  Evaluation Operating System Concepts – 10th Edition 6.2 Silberschatz, Galvin and Gagne ©2018  Objectives  Describe the critical-section problem and illustrate a race condition  Illustrate hardware solutions to the critical-section problem using memory barriers, compare-and-swap operations, and atomic variables  Demonstrate how software-based solutions such as mutex locks, semaphores, and others can be used to solve the critical section problem  Evaluate tools that solve the critical-section problem Operating System Concepts – 10th Edition 6.3 Silberschatz, Galvin and Gagne ©2018  Background  In a multi-programming system, hundreds of processes (or threads) run either concurrently or in parallel.  A cooperating process is one that can affect or be affected by other processes executing in the system. They can share a logical address space (both code and data) Also, the OS continuously updates various data structures to support multiple threads.  Concurrent access to shared data may result in data inconsistency or a race condition Concurrent processes may be interrupted at any time, resulting in a partially completing execution  Maintaining data consistency requires mechanisms to ensure the orderly execution of cooperating processes Process synchronization involves using tools that control access to shared data to avoid race conditions Operating System Concepts – 10th Edition 6.4 Silberschatz, Galvin and Gagne ©2018  Race Condition  Let processes P0 and P1 are creating child processes using fork() fork() returns the pid of the newly created process to the parent The kernel variable next_available_pid keeps the value of the next available process identifier Creating a race condition on kernel variable next_available_pid Without a mutual exclusion mechanism to prevent P0 and P1 from accessing the variable next_available_pid, the same pid could be assigned to P0 and P1! Operating System Concepts – 10th Edition 6.5 Silberschatz, Galvin and Gagne ©2018  Critical Section Problem  Consider system of n processes {p0, p1, … pn-1}  Each process has a segment of code called as Critical Section The code may involve changing common variables, updating table, writing file, etc. The protocol is while one process in the critical section, no other may be allowed to be in their critical section  To ensure that no two processes are executing in their critical sections at the same time Operating System Concepts – 10th Edition 6.6 Silberschatz, Galvin and Gagne ©2018  Critical Section Problem  Critical section problem is to design protocol to solve race condition by segmenting the code and controlling their access conditions Entry section: Each process must ask permission to enter critical section in entry section, Exit section: it follows the critical section, possibly with specific operations Remainder section: then follows the remainder section that include other non-critical section code of the process  General structure of process with critical section Operating System Concepts – 10th Edition 6.7 Silberschatz, Galvin and Gagne ©2018  Critical-Section Problem Solution Requirements 1. Mutual Exclusion - If process is executing in its critical section, then no other processes can be executing in their critical sections 2. Progress - If no process is executing in its critical section and there exist some processes that wish to enter their critical section, then only those processes that are not executing in their remainder sections can participate in deciding which will enter its critical section next, and this selection cannot be postponed indefinitely. 3. Bounded Waiting - A bound must exist on the number of times that other processes are allowed to enter their critical sections after a process has made a request to enter its critical section and before that request is granted Operating System Concepts – 10th Edition 6.8 Silberschatz, Galvin and Gagne ©2018  Interrupt-based Solution  Entry section: disable interrupts, so no preemption by other concurrent process is possible  Exit section: enable interrupts  Can this solve the problem? What if the critical section is code that runs for an hour? Can some processes starve, i.e., never enter their critical section? What if there are two CPUs? Operating System Concepts – 10th Edition 6.9 Silberschatz, Galvin and Gagne ©2018  Peterson’s Solution  Two-process solution  Assume that the load and store machine-language instructions are atomic; that is, cannot be interrupted  The two processes share two variables: int turn; boolean flag  The variable turn indicates whose turn it is to enter the critical section  The flag array is used to indicate if a process is ready to enter the critical section. flag[i] = true implies that process Pi is ready! Operating System Concepts – 10th Edition 6.13 Silberschatz, Galvin and Gagne ©2018  Algorithm for Process Pi while (true){ flag[i] = true; turn = j; while (flag[j] && turn = = j); flag[i] = false; } Operating System Concepts – 10th Edition 6.14 Silberschatz, Galvin and Gagne ©2018  Algorithm for Process Pi Pi Entering … Pj Entering … while (true){ while (true){ flag[i] = true; flag[j] = true; turn = j; turn = i; while (flag[j] && turn = = j) while (flag[i] && turn = = i) ; ; flag[i] = false; flag[j] = false; } } Operating System Concepts – 10th Edition 6.15 Silberschatz, Galvin and Gagne ©2018  Correctness of Peterson’s Solution  Provable that the three CS requirement are met: 1. Mutual exclusion is preserved Pi enters CS only if: either flag[j] = false or turn = i 2. Progress requirement is satisfied 3. Bounded-waiting requirement is met Operating System Concepts – 10th Edition 6.16 Silberschatz, Galvin and Gagne ©2018  Peterson’s Solution in Modern Architecture  Peterson’s solution is not guaranteed to work on modern architectures.  To improve performance, processors and/or compilers in modern system may reorder operations (instructions) in a process that have no dependencies: { x = 10; y = true; } can be reordered as follows: { y = true; x = 10; } For single-threaded this is safe as the result will always be the same. For multithreaded the reordering may produce inconsistent or unexpected results! Operating System Concepts – 10th Edition 6.17 Silberschatz, Galvin and Gagne ©2018  Modern Architecture Example  Thread 1 and Thread 2 share the following data: boolean flag = false; int x = 0; Thread 1 performs Thread 2 performs while (!flag) { ; x = 100; print x; flag = true; }  What is the expected output coming out of the print x? 100 Operating System Concepts – 10th Edition 6.18 Silberschatz, Galvin and Gagne ©2018  Modern Architecture Example (Cont.)  Since the variables flag and x are independent of each other, the instructions in thread 2 may be reordered as follows:  boolean flag = false; int x = 0; Thread 1 performs Thread 2 performs while (!flag) { ; flag = true; print x; x = 100; }  If this occurs, what would be the output now? Operating System Concepts – 10th Edition 6.19 Silberschatz, Galvin and Gagne ©2018  Modern Architecture Example (Cont.)  Since the variables flag and x are independent of each other, the instructions in thread 2 may be reordered as follows: Thread 1 performs Thread 2 performs while (!flag) {flag = true; ; x = 100;} print x;  If this occurs, what would be the output now?  Answer: 0 Operating System Concepts – 10th Edition 6.20 Silberschatz, Galvin and Gagne ©2018  Peterson Solution – reordered read and/or write turn, flag [i], flag [j] have been reordered Pi Entering … Pj Entering … while (true){ while (true){ turn = j; turn = i; flag[i] = true; flag[j] = true; while (flag[j] && turn = = j) while (flag[i] && turn = = i) ; ; flag[i] = false; flag[j] = false; } } Operating System Concepts – 10th Edition 6.21 Silberschatz, Galvin and Gagne ©2018  Peterson’s Solution Revisited  The effects of instruction reordering in Peterson’s Solution  This allows both processes to be in their critical section at the same time!  To ensure that Peterson’s solution will work correctly on modern computer architecture we must use Memory Barrier. Operating System Concepts – 10th Edition 6.22 Silberschatz, Galvin and Gagne ©2018  Hardware based solution  To ensure that Peterson’s solution will work correctly on modern computer architecture we may need support from hardware instructions:  These primitive operations can be used directly as synchronization tools, or they can be used to form the foundation of more abstract synchronization mechanisms.  For example: 1. Memory Barrier 2. Hardware Instructions 3. Atomic Variables Operating System Concepts – 10th Edition 6.23 Silberschatz, Galvin and Gagne ©2018  Memory Model  Memory model means how a computer architecture guarantees memory as they are available to application programs.  Memory models may be either: Strongly ordered – where a memory modification of one processor is immediately visible to all other processors. Weakly ordered – where a memory modification of one processor may not be immediately visible to all other processors.  Memory models vary by processor type, So, kernel developers cannot make any right assumptions regarding the visibility of modifications to memory on a shared- memory multiprocessor. Therefore, computer architectures provide instructions that can force any changes in memory to be propagated to all other processors, which is known as memory barrier or memory fences Operating System Concepts – 10th Edition 6.24 Silberschatz, Galvin and Gagne ©2018  Memory Barrier Instructions  A memory barrier is an instruction that forces any change in memory to be propagated (made visible) to all other processors. When a memory barrier instruction is performed, the system ensures that all loads and stores are completed before any subsequent load or store operations are performed. Therefore, even if instructions were reordered, the memory barrier ensures that the store operations are completed in memory and visible to other processors before future load or store operations are performed. Operating System Concepts – 10th Edition 6.25 Silberschatz, Galvin and Gagne ©2018  Use of Memory Barrier Instruction - Example  Returning to the example of Slides 6.17 - 6.18  We could add a memory barrier instruction in the Thread 1 to ensure that the value of flag is loaded before the value of x. Thread 1 now performs while (!flag) memory_barrier(); print x Thread 1 outputs 100:  Similarly, inserting memory barrier instruction in the Thread 2 guarantees that the assignment to x occurs before the assignment flag.  Thread 2 now performs x = 100; memory_barrier(); flag = true Operating System Concepts – 10th Edition 6.26 Silberschatz, Galvin and Gagne ©2018  Synchronization Hardware  Many systems provide hardware support for implementing the critical section code.  Uniprocessors – could disable interrupts Currently running code would execute without preemption The problem is:  Generally, too inefficient on multiprocessor systems  Operating systems using this not broadly scalable  We will look at some forms of hardware support: 1. Hardware instructions 2. Atomic variables Operating System Concepts – 10th Edition 6.27 Silberschatz, Galvin and Gagne ©2018  Hardware Instructions  Special hardware instructions that allow us to either test-and-modify the content of a word, or to swap the contents of two words atomically (uninterruptedly.) Test-and-Set instruction Compare-and-Swap instruction Operating System Concepts – 10th Edition 6.28 Silberschatz, Galvin and Gagne ©2018  The test_and_set Instruction  Definition boolean test_and_set (boolean *target) { boolean rv = *target; *target = true; return rv: }  Properties Executed atomically Returns the original value of passed parameter Set the new value of passed parameter to true Operating System Concepts – 10th Edition 6.29 Silberschatz, Galvin and Gagne ©2018  test_and_set() atomic instruction  Shared Boolean variable lock, which is initialized to be false  Solution: boolean test_and_set (boolean *target) { boolean rv = *target; *target = true; return rv: } lock = false; do { while (test_and_set(&lock)) ; lock = false; } while (true); Operating System Concepts – 10th Edition 6.30 Silberschatz, Galvin and Gagne ©2018  compare_and_swap () atomic Instruction  Definition int compare_and_swap(int *value, int expected, int new) { int temp = *value; if (*value == expected) *value = new; return temp; }  Properties Executed atomically Returns the original value of passed parameter value Set the variable value with the passed parameter new value only if *value == expected is true.  That is, the swap takes place only under this condition. Operating System Concepts – 10th Edition 6.31 Silberschatz, Galvin and Gagne ©2018  compare_and_swap () int compare_and_swap(int *value, int expected, int new) { int temp = *value; if (*value == expected) *value = new; return temp; } lock = 0; //initialize lock by 0. while (true){ while (compare_and_swap(&lock, 0, 1) ! = 0) ; lock = 0; } Operating System Concepts – 10th Edition 6.32 Silberschatz, Galvin and Gagne ©2018  Making compare_and_swap Atomic  On Intel x86 architectures, the assembly language statement cmpxchg is used to implement the compare_and_swap() instruction.  To enforce atomic execution, the lock prefix is used to lock the bus while the destination operand is being updated.  The general form of this instruction appears as: lock cmpxchg , Operating System Concepts – 10th Edition 6.33 Silberschatz, Galvin and Gagne ©2018  compare_and_swap ()  Do the test_and_set or compare_and_swap instructions solve the critical-section problem?  Meets mutual-exclusion requirement  But does not satisfy the bounded-waiting requirement; No guarantee that accessing the critical section by all processes will be fairly rotated Operating System Concepts – 10th Edition 6.34 Silberschatz, Galvin and Gagne ©2018  Bounded-waiting with compare-and-swap while (true) { waiting[i] = true; key = 1; while (waiting[i] && key == 1) key = compare_and_swap(&lock,0,1); //when key=0, the program breaks out of the while // loop to enter the critical section waiting[i] = false; j = (i + 1) % n; while ((j != i) && !waiting[j]) j = (j + 1) % n; if (j == i) lock = 0; else waiting[j] = false; } Operating System Concepts – 10th Edition 6.35 Silberschatz, Galvin and Gagne ©2018  Atomic Variables  Typically, hardware instructions such as compare-and-swap are not used directly for mutual exclusion rather used as building blocks for other synchronization tools.  One such tool is an atomic variable that provides atomic (uninterruptible) updates on basic data types such as integers and Booleans. Incrementing an integer in a multi-threaded system can introduce race condition  For example: Let sequence be an atomic variable Let increment() be operation on the atomic variable sequence The Command: increment(&sequence); ensures sequence is incremented without interruption: Operating System Concepts – 10th Edition 6.36 Silberschatz, Galvin and Gagne ©2018  Atomic Variables  The increment() function can be implemented as follows: void increment(atomic_int *v) { int temp; do { temp = *v; } while (temp != (compare_and_swap(v,temp,temp+1)); } Operating System Concepts – 10th Edition 6.37 Silberschatz, Galvin and Gagne ©2018  Mutex Locks  Previous solutions are complicated and generally inaccessible to application programmers  OS designers build software tools to solve critical section problem  Simplest is mutex lock Boolean variable indicating if lock is available or not  Protect a critical section by First acquire() a lock Then release() the lock Operating System Concepts – 10th Edition 6.38 Silberschatz, Galvin and Gagne ©2018  Mutex Locks  Calls to acquire() and release() must be atomic Usually implemented via hardware atomic instructions such as compare-and-swap. Operating System Concepts – 10th Edition 6.39 Silberschatz, Galvin and Gagne ©2018  Solution to CS Problem Using Mutex Locks while (true) { acquire lock critical section release lock remainder section } Operating System Concepts – 10th Edition 6.40 Silberschatz, Galvin and Gagne ©2018  Problem of Mutex Locks  But this solution requires busy waiting: Process trying to enter its critical section must loop continuously in the call to acquire(). wastes CPU cycles that some other process might be able to use productively Operating System Concepts – 10th Edition 6.41 Silberschatz, Galvin and Gagne ©2018  Semaphore  Synchronization tool that provides more sophisticated ways (than Mutex locks) for processes to synchronize their activities.  Semaphore S – integer variable  Can only be accessed via two indivisible (atomic) operations wait() and signal()  Definition of the wait() operation wait(S) { while (S value--; if (S->value < 0) { add this process to S->list; block(); } } signal(semaphore *S) { S->value++; if (S->value list; wakeup(P); } } Operating System Concepts – 10th Edition 6.48 Silberschatz, Galvin and Gagne ©2018  Liveness  Processes may have to wait indefinitely while trying to acquire a synchronization tool such as a mutex lock or semaphore.  Waiting indefinitely violates the progress and bounded-waiting criteria discussed at the beginning of this chapter.  Liveness refers to a set of properties that a system must satisfy to ensure processes make progress.  Indefinite waiting is an example of a liveness failure. Operating System Concepts – 10th Edition 6.50 Silberschatz, Galvin and Gagne ©2018  Liveness  Deadlock – two or more processes are waiting indefinitely for an event that can be caused by only one of the waiting processes  Let S and Q be two semaphores initialized to 1 P0 P1 wait(S); wait(Q); wait(Q); wait(S);...... signal(S); signal(Q); signal(Q); signal(S);  Consider if P0 executes wait(S) and P1 wait(Q). When P0 executes wait(Q), it must wait until P1 executes signal(Q)  However, P1 is waiting until P0 execute signal(S).  Since these signal() operations will never be executed, P0 and P1 are deadlocked. Operating System Concepts – 10th Edition 6.51 Silberschatz, Galvin and Gagne ©2018  Liveness  Other forms of deadlock:  Starvation – indefinite blocking A process may never be removed from the semaphore queue in which it is suspended  Priority Inversion – Scheduling problem when lower-priority process holds a lock needed by higher-priority process Solved via priority-inheritance protocol Operating System Concepts – 10th Edition 6.52 Silberschatz, Galvin and Gagne ©2018  End of Chapter 6 Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018