BCHS-W4.pdf

BASIC COMPUTER HARDWARE SERVICING O God, Creator of all things, who in Mary and Joseph gave us a marvellous example of sanctifying ordinary work, grant me, through the intercession of the Holy Family of Nazareth, the grace to study intensely in Your presence, in a consistent and orderly way, with a...

BASIC COMPUTER HARDWARE SERVICING O God, Creator of all things, who in Mary and Joseph gave us a marvellous example of sanctifying ordinary work, grant me, through the intercession of the Holy Family of Nazareth, the grace to study intensely in Your presence, in a consistent and orderly way, with an upright intention and the desire to serve others. May I always remember to offer my work to you, as I do now, so that my hours of study truly become hours of prayer, bringing me closer to You. Help me to sanctify my work so that, through my study, I may also sanctify myself and others, reaping the human and supernatural fruit You expect and attaining the joy of loving You for ever in Heaven. Amen.  MAR has 0011 0001 in decimal it is 49 Address Decoder converts the address and points to the decoded address MDR then lets you access the data in the memory unit  In READ Switch it is connected to output cell to MDR In WRITE Switch it is connected to input cell to MDR At the appropriate instant, the CPU momentarily turns on the switch that connects the MDR with the register by using the activation line, and the transfer takes place between memory and the MDR The physical connection that makes it possible to transfer data from one location in the It is a group of electrical, or, computer system to another less commonly, optical, is called a bus. conductors suitable for carrying computer signals from one location to another.  wires conductors within an integrated circuit PCI Express printed circuit Universal Serial Bus special thin clear glass Integrated Drive Electronics fibers Serial Advanced Technology Attachment Each conductor is called a line Sometimes, a conductor in each line has a name a bus might also be used each line carries a single to carry power to a module electrical signal a single line might one bit of a memory represent some address combination of functions a sequence of data bits a timing control that turns a device on and off at the proper time Four General Categories of Lines data carry the "data" that is being moved from one location to another addressing specify the recipient of data on the bus Four General Categories of Lines control provide control and timing signals for the proper synchronization and operation of the bus and of the modules and other components that are connected to the bus power provides electrical charge that supplies power  Parallel bus a bus in which there is Simplex line an individual line for unidirectional line each bit of data, address, Half-duplex line and control being used carry data one direction at Serial bus a time a bus in which data is Full-duplex line transferred sequentially, both directions one bit at a time, using a simultaneously single data line pair  Buses are also Point-to-point bus (cables) characterized by the carries signals from a single way that they specific source to a single interconnect the specific destination various components to Ports - internal connectors into which they are which external cables can be attached plugged  Multipoint bus (multidrop) used to connect several points together aka broadcast bus Requirements to handle I/O 1. There must be a means for individually addressing different peripheral devices. 2. There must be a way in which peripheral devices can initiate communication with the CPU. a) This facility will be required to allow the CPU to respond to unexpected inputs from peripherals such as keyboards, mice, and networks, and so that peripherals such as printers and floppy disk drives can convey emergency status information to the executing program. Requirements to handle I/O 3. Programmed I/O is suitable only for slow devices and individual word transfers a) For faster devices with block transfers, there must be a more efficient means of transferring the data between I/O and memory. b) Memory is a suitable medium for direct block transfers, since the data has to be in memory for a program to access it. c) Preferably this could be done without involving the CPU, since this would free the CPU to work on other tasks. Requirements to handle I/O 4. The buses that interconnect high-speed I/O devices with the computer must be capable of the high data transfer rates characteristic of modern systems. 5. The I/O system must be capable of handling devices that operate at a wide range of speeds and with varying amounts of delay. a) This includes a suitable method for synchronizing the I/O with the programs that are using the data with minimum impact on the overall performance of the system. Requirements to handle I/O 6. There must be a means for handling devices with extremely different control requirements. a) It would be desirable if I/O for each of these devices could be handled in a simple and similar way by programs in the CPU. Conditions to handle I/O 1. Formats required by different devices will be different. 2. Incompatibilities in speed between devices and CPU will make synchronization difficult, especially if there are multiple devices attempting to do I/O at the same time. 3. I/O devices and connections that support multimedia services must be capable of guaranteeing steady performance. 4. Devices such as disk drives have electromechanical control requirements that must be met, and it would tie up too much time to use the CPU to provide that control. Input from the peripheral device is transferred from the I/O controller or buffer for that peripheral device one word at a time to the I/O data register and from there to an accumulator or general-purpose register under program control individual words of output data pass from a register to the I/O data register where they can be read by the appropriate I/O controller, again under program control. Each instruction produces a single input or output  Signals emitted by hardware Interrupt lines - one or more or software when a process or special control lines to the an event needs immediate central processor attention standard I/O for a modern PC may contain as many as thirty- two interrupt lines, labeled IRQ0 through IRQ31 The presence of a message on an interrupt line will cause the computer to suspend the program being executed and jump to a special interrupt processing program. All the pertinent information about the program being suspended, including the location of the last instruction executed, and the values of data in various registers, is saved in a known part of memory, either in a special area associated with the program. PCB - Process Control Block  External Event Notifier Completion Signal Means of Allocating CPU Time Abnormal Event Indicator  External Event Notifier Keyboard Struck  Completion Signal Printer Job Complete  Means of Allocating CPU Time Time-Sharing  Abnormal Event Indicator Abnormal Events Direct Memory Access - a technique wherein CPU is bypassed when passing blocks of data. Conditions for DMA to take place There must be a method to connect together the I/O interface and memory. In some systems, both are already connected to the same bus, so this requirement is easily met. In other cases, the design must contain provisions for interconnecting the two. Conditions for DMA to take place The I/O controller associated with the particular device must be capable of reading and writing to memory. It does so by simulating the CPU's interface with memory. Specifically, the I/O controller must be able to load a memory address register and to read and write to a memory data register, whether its own or one outside the I/O controller. Conditions for DMA to take place There must be a means to avoid conflict between the CPU and the I/O controller. It is not possible for the CPU and a module that is controlling disk I/O to load different addresses into the MAR at the same instant nor it is possible for two different I/O controllers to transfer data between I/O and memory on the same bus at the same instant. Special control circuits must be included to indicate which part of the system, CPU or particular I/O controller, is in control of the memory and bus at any given instant. The I/O controller serves as an interface between the CPU and the specific device, in this case a disk drive, accepting commands from the CPU on one side and controlling the device on the other. Functions of I/O Controllers The disk controller recognizes messages addressed to it and accepts commands from the CPU, establishing what the disk drive is to do. disk controller recognizes that a block of data is to be written from memory to disk using DMA. The disk controller provides a buffer where the data from memory can be held until it can be transferred to the disk. Functions of I/O Controllers The disk controller provides the necessary registers and controls to perform a direct memory transfer. This requires that the disk controller have access to a memory address register and a memory data register separate from those of the CPU either within the disk controller or as a separate DMA controller. Functions of I/O Controllers The disk controller controls the disk drive, moving the head to the physical location on the disk where data is to be written. The disk controller copies data from its buffer to the disk. The disk controller has interrupt capability, which it uses to notify the CPU when the transfer is complete. It can also interrupt the CPU to notify it of errors or problems that arise during the transfer. Use of I/O Controllers The controller can be designed to provide the specialized control required by a particular device. The controller frees the CPU to perform other tasks while the much slower I/O operations are taking place. The presence of I/O controllers allows control of several different I/O devices to occur simultaneously. A processor-based controller can provide specialized services that would otherwise overload the system CPU with time-consuming CPU-intensive work  HAPPY MONDAY!