Application of 2nd Harmonic Laser Voltage Imaging for Timing Failure (PDF)
Document Details
Uploaded by SleekTruth
Shih Yuan Liu, Kuang Yuan Chao, Hsin Hung Chou and Wen Sheng Wu
Tags
Summary
This paper investigates the application of 2nd harmonic laser voltage imaging (LVI) for analyzing timing failures and dislocation identification. Employing laser voltage imaging and voltage probing techniques, the study explores re-thinning procedures for effective analysis, focusing on distinguishing dislocations linked to channel leakage. The techniques are detailed with specific examples and figures.
Full Transcript
The Application of 2nd Harmonic Laser Voltage Imaging for Timing Failure, Re-Thinning Techniques for Effective Dislocation Identification Shih Yuan Liu, Kuang Yuan Chao, Hsin Hung Chou and Wen Sheng Wu United...
The Application of 2nd Harmonic Laser Voltage Imaging for Timing Failure, Re-Thinning Techniques for Effective Dislocation Identification Shih Yuan Liu, Kuang Yuan Chao, Hsin Hung Chou and Wen Sheng Wu United Microelectronics Corporation, Tainan, Taiwan, ROC Phone : (886) 956728977 , Email: [email protected] Abstract-- Laser voltage imaging (LVI) and laser voltage observed, an innovative idea was provided in this paper, in probing (LVP) are laser stimulation techniques to verify a device which a re-thinning in TEM lamella preparation was applied under test (DUT) and have been widely used for circuit by EasyLift. Because the lamella was attached to TEM grid, it debugging and various frequency-dependent failure modes was able to perform lamella re-thinning and acquire TEM. In this paper, a scan chain with timing failure study was repeatedly. By performing the re-thinning procedure for TEM demonstrated by using LVI and LVP techniques, and further physical failure analysis (PFA) found dislocations in bulk silicon imaging, the deep dislocations were able to be removed from by plan view transmission electron microscopy (TEM). However, bulk silicon, while leaving the shallow ones. Moreover, after on checking the depth of dislocations by 3D-TEM, only deep 3D-TEM excludes deep dislocations, the remaining shallow dislocations were found, and it was hard to explain the dislocations, passing through the channel, could be matched phenomenon of channel leakage. to the leakage phenomenon. In this paper, it is not to introduce the methods for dislocation inspection. The major idea is how to distinguish the dislocations II. TOOL INTRODUCTION those would induce channel leakage. In this work, we presented a re-thinning technique for shallow dislocation inspection by Fig.1 showed the architecture of the D-EFA system, the using EasyLift. The EasyLift system allowed operators to Meridian WS-DP system docked to an Advantest tester for extract the lamella and attach it to a TEM grid, all within the live operation. Meridian WS-DP was a tool for full-wafer dual beam FIB chamber. Because the lamella had attached to electrical fault analysis and it was normally used for emission, TEM grid, lamella re-thinning and acquisition of TEM images LVI, LVP and dynamic laser stimulation (DLS). A solid could be performed repeatedly. Using this method makes it immersion lens (SIL) was also applied in this system. In this possible to partially remove the deep dislocations from bulk paper, we showed that LVI/LVP could be used as a great fault silicon and then perform 3D-TEM to acquire the actual depth of detection tool to scan chain failure. target of interest. A fast and efficient EasyLift NanoManipulator System was Keywords— Laser Voltage Imaging (LVI), timing failure, examined which was incorporated into Helios 450HP. The EasyLift, dislocation. EasyLift was a nanomanipulator system which was equipped I. INTRODUCTION within dual beam focused ion beam (FIB) system for in situ sample lift-out and it allowed operators to extract the lamella The LVI can be referred to as “frequency mapping”, and it and attach it to a TEM grid. It was able to repeat lamella shows the indicated locations of transistors are activated at a re-thinning and acquire TEM images anytime. specific frequency. By mapping the frequency of a region of interest (ROI), failure analysts can quickly trace circuit functionality through suspected circuitry to isolate defects with nanometer precision. Because of these characteristics of LVI, it had been widely used for timing failure debugging. Timing failure is a failure of not meeting the limits set on execution time, message delivery, clock drift rate, or clock skew in a synchronous distributed system or real-time system. In this paper, chain timing failure was detected by using LVI and LVP techniques. By tracing the 2nd harmonic signal of LVI, it could target a specific device. Eventually, it found a channel leakage by nano-probing and several dislocations in bulk silicon from plan view TEM. In order to prove the channel leakage was strongly correlated with these dislocations, a 3D-TEM was executed (In this paper, 3D-TEM Fig. 1: Meridian WS-DP system docked to an Advantest tester for live means the target had done plan view TEM first and do operation cross-section in the same lamella afterwards), but at first it only found very deep dislocations. However, in physics, the III. LVI RESULTS and DISCUSSION channel leakage should be generated from the shallow dislocations that pass through the channel but not from deep In the following section, we will present a chain fail case of ones. In order to make the shallow dislocations easy to be successful fault isolation using both LVI and LVP. In this case, a signal transmission fail could be inspected by comparing 487, and it could find the waveform had changed to input with output from tester scope and the waveform had “11101110” from “11001100” indeed. changed from “11001100” to “11101110” (Fig.2). According to the waveform behavior, the circuit designer said the failure mechanism was strongly suspected the hold time window variation caused the output data changed. The hold time window was the minimum amount of time the data input should be held steady after the clock event for reliable sampling. If the hold time had variation, the data might be changed during signal transmission. Fig. 2: The waveform behaviour from tester scope, it could find the waveform had changed from “11001100” to “11101110”. In order to find out this timing related failure, a setting of LVI as following: 1. The input shift pattern was a repeating 11001100 and loads serially into the chain with a 1.25MHz clock frequency. Fig. 4: The LVI image of 2nd harmonic frequency (5MHz) and LVP results in 1st sample. It found the 2nd harmonic (5Mz) LVI signal began from cell 2. Although the waveform would change from”11001100” 487 and the signal changed to “11101110” from “11001100” in cell 487 by to “11101110”, it had no difference to frequency (the LVP. same as 2.5MHz) but different from the duty cycle between “1” and “0”. The duty cycle of “11001100” is 50% in “1” and 50% in “0” but the duty cycle of Besides, we also presented the LVI signal with main “11101110” is 75% in “1” and 25% in “0” (Fig.2). Fig. 3 frequency (2.5MHz) in Fig.5. It could found there had no showed the signal distribution by different duty cycle, it differences of LVI between cell 488 and cell 487. It proved could find that if the duty cycle was not perfect that the main frequency (2.5MHz) of LVI only could detect symmetric, it would produce 2nd harmonic signal. the changes of frequency but not duty cycle. Conversely, if we wanted to find out the start point of waveform change, we needed to search the 2nd harmonic LVI signal (5MHz) instead of main signal (2.5MHz). 3. Start to trace the LVI signal in each cell by binary search. Fig. 5: The LVI image of main frequency (2.5MHz) in 1st sample. It proved that the main frequency (2.5MHz) of LVI only could detect the changes of frequency but not duty cycle. Fig. 3: The LVI signal distribution by different duty cycle. it can find that if the duty cycle is not perfect symmetric, it will produce 2nd harmonic signal. After checking the devices behavior of cell 487 by In 1st sample, it found the 2nd harmonic (5Mz) LVI signal nano-probing, it found a channel leakage at one device in cell began from cell 487 by binary search in Fig.4. In order to 487. Fig.6 showed the Id-Vg curve of the leakage device and check whether it matched previous results from tester, we also it found a leakage path between drain and source. probed the waveform by LVP at the input/output sites of cell Fig. 8: A 3D-TEM image for dislocations depth inspection. It only found very deep dislocations and hard to explain the phenomenon of channel leakage. A possible reason was improper region selection of 3D-TEM caused the shallow dislocations didn’t really be included in the lamella. Fig. 6: A channel leakage was detected between drain and source in device N6 of cell 487 by nano-probing. In order to find the root cause of the leakage, we performed the plan view TEM and found several dislocations in bulk silicon (Fig.7). A 3D-TEM had also executed so as to prove the channel leakage was strong correlated to these dislocations but only found very deep dislocations eventually (Fig.8). However, in physics, the channel leakage should be generated from shallow dislocations (the depth