Semiconductor Memory PDF

IT2020 Semiconductor Memory Memory is mainly characterized by its total storage capacity (in bits) as well as its organization, the method or policy of memory access, the type of access or operation, its operating speed, and permanence (or non-volatility) of the information and its cost. As...

IT2020 Semiconductor Memory Memory is mainly characterized by its total storage capacity (in bits) as well as its organization, the method or policy of memory access, the type of access or operation, its operating speed, and permanence (or non-volatility) of the information and its cost. As a purpose: o Storing the binary codes for the sequence of instructions specified by programs. o Storing binary data that the computer needs to execute instructions. As a location: o It is the location where information is kept while not in current use. o It is a collection of storage devices. Usually, each storage device holds one bit. These storage devices are grouped into groups of 8, and 8 of these storage locations can only be accessed together. o It is usually measured by the number of bytes it can hold. As storage: o When a program is entered into a computer, it is stored in memory. Then as the microprocessor starts to execute the instructions, it brings the instructions from memory one at a time. o The microprocessor reads (brings in) and/or writes (stores) the results into memory when it is done. As a type/classification: Random access memory (RAM) loses its information when the power supply to the chip stops; hence it is also called “volatile memory”. Permanent memory (NVM for Non-Volatile Memory) has, depending on the type, an information retention period generally equal to 10 years (programmable read-only memory), equal to the life of the component, or with energy source autonomy. o Static Random-Access Memory (SRAM) stores data by sustaining its logical state. o Dynamic Random-Access Memory (DRAM) stores electrical charges in stored-charge memory. Memory Cell Internal Structure Memory Cell Functions: Select – gets the desired location. DataIn – inputs data to the selected location. DataOut – grabs data from the selected location. Read/Write – reads/writes selected location. Conceptual View of a Memory Cell 8-bit register as a One-dimensional Memory Cell Array A 4x8 Two-Dimensional Memory Cell Array A 16K x 4 SRAM Chip 02 Handout 1 *Property of STI  [email protected] Page 1 of 4  IT2020 Read/Write Timing Diagrams A clock signal is a periodic logic signal that rates or synchronizes the operation of a circuit or a system such as a microprocessor, a synchronous memory, or an I/O controller. This independent source of clock called oscillator can be associated with electronics to generate all the signals of the subsets of the system like the buses, the memory, and the processors. The timing diagrams detail the evolution of the signals as a function of time. The cycle begins on the falling edge of the clock (time marker 1). The address becomes valid (usable) at time marker 2. The rising edge of the clock (time marker 3) allows temporal quantification of the maximum presentation time of the data to be written. The data read will be valid after an access time (time marker 5). The falling edge of the clock marks the end of a cycle with either the reading of the data by the master or its writing in the slave. (time marker 6). Static RAM (Flip-Flop Circuit) Static RAM Read Timing Static RAM Write Timing Access time from Address (tAA) – the time required of Write time (tW) – the time the data must be held valid in the RAM array to decode the address and provide value order to decode address and store value in memory cells. to the data bus. Dynamic RAM (Capacitor) DRAM Read operation DRAM Write operation tA (Access time) & tC (Cycle time) tDHR (Data hold from RAS) There is a bit line precharge operation that causes the difference between access time and cycle time. 02 Handout 1 *Property of STI  [email protected] Page 2 of 4  IT2020 Registers It is made up of a set of Flip-Flops whose function is to store a bit. The parallel register is the memory element of the microprocessor. It is a fast memory with a capacity of a word. The qualifier “fast” means the register operates at the speed of the component that integrates it so as not to slow it down by searching for information in the main memory or in the cache memory. It can be accessed in write and/or read and are accessible to the programmer (programmer- accessible or user-accessible register). Common Register Types Accumulator is a special register that implicitly receives the result of an operation. o It can also be used by the programmer. Auxiliary or generalized registers can be implemented to allow data to be to increase execution speed. The program counter (PC) contains the address of the next instruction, which will be executed by the microprocessor. o The other name that can be encountered is Instruction Pointer (IP). 02 Handout 1 *Property of STI  [email protected] Page 3 of 4  IT2020 During the fetch cycle, the CPU will search the main memory for the code of the instruction to be executed and store it in the instruction register (IR) so that it can be decoded. Status and control registers are made up of status indicators (condition codes) or status flags (Status flags Register). o These provide information on the current state of the processor. ▪ Zero (ZF for Zero Flag) ▪ Sign (SF for Sign Flag) also called NF (Negative Flag) ▪ Logical parity (PF for Parity Flag) ▪ Carry (CF for Carry Flag) and half-carry flag ▪ Auxiliary Flag (AF or auxiliary carry flag) or digit carry (DC indicators) ▪ Arithmetic overflow (OF for Overflow Flag or VF for oVerflow Flag) Indirection register allows indirect addressing. o It contains an address allowing access to a memory location. o It is used to implement the notion of pointer. Stack pointer register (SP). The stack pointer allows pointing to either the memory location where it is possible to store information or the last location where a backup took place. o If the processor has two operating modes, supervisor and user, there can be two separate pointers; the system and user stack pointers. Special registers - depending on the implementations, there may be feature-specific registers. o These registers are specific to virtual memory management with the basic registers of computers or the segmentation registers (code, data, extra, and stack) and descriptor table registers of the x86 computer family. o In newer generations, these registers are used to control the behavior of the processor for its self-test and debugging. References: Chapter 7 – Memory System Design. (2004). In Computer systems design and architecture (2nd ed.) [PDF file]. Prentice Hall. Retrieved on Dec. 16, 2020 from https://classes.engineering.wustl.edu/cse362/images/8/89/Ch7CSDA.pdf Darche, P. (2020). Computer engineering series: Microprocessor 1: Prolegomena – Calculation and storage functions – Models of computation and computer architecture. iSTE & Wiley. Darche, P. (2020). Computer engineering series: Microprocessor 2: Communication in a digital system. iSTE & Wiley. Darche, P. (2020). Computer engineering series: Microprocessor 3: Core Concepts – Hardware Aspects. iSTE & Wiley. de Lamadrid, J. (2018). Computer organization – Basic processor structure. CRC Press. Farahmand, F. (2016). Fundamentals of microprocessor and microcontroller [Lecture notes]. Retrieved from Sonoma State University. Toomsalu, A. (n.d.). Microprocessor Systems I – Microprocessor systems architecture [Lecture notes]. Retrieved from Tallin University of Technology – Department of Computer Engineering. 02 Handout 1 *Property of STI  [email protected] Page 4 of 4