Real vs Protected Mode Addressing
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Questions and Answers

To form a physical memory address, what must be appropriate?

  • Operating mode
  • Segment register contents (correct)
  • Interrupt vector table
  • Cache memory settings

What does TI = 0 indicate regarding a descriptor table?

  • A local descriptor table
  • An interrupt descriptor table
  • A task state segment
  • A global descriptor table (correct)

In which mode must the microprocessor operate for the DOS operating system?

  • Protected
  • Virtual
  • System Management
  • Real (correct)

An 80286 could operate in protected mode but would be limited by what?

<p>24-bit address bus (C)</p> Signup and view all the answers

In protected mode, access to the segment is allowed under what condition?

<p>Both A and B (RPL &gt;= DPL) (D)</p> Signup and view all the answers

Why should segment registers not be used as data registers?

<p>They should only contain segment addresses (B)</p> Signup and view all the answers

Given a segment register value of 1000H, what is the starting and ending address of the segment?

<p>10000, 1FFFF (B)</p> Signup and view all the answers

In protected mode, what segment information does a selector value provide, except for?

<p>Ending address (D)</p> Signup and view all the answers

What is the first 1MB of memory typically called in the context of older PCs?

<p>Real and Conventional (C)</p> Signup and view all the answers

Where does real mode memory exist?

<p>00000H - FFFFH (B)</p> Signup and view all the answers

In protected mode, what is the function of the selector?

<p>Selects the descriptor from a descriptor table (B)</p> Signup and view all the answers

For the 80286 - Core processors, where does protected mode memory exist?

<p>000000 - FFFFFFH (B)</p> Signup and view all the answers

What does 'It selects any location within the 64k byte memory segment' refer to?

<p>Offset Address (B)</p> Signup and view all the answers

What operation does the instruction MOV DS:[2000H], AL perform?

<p>Copies byte size data in AL to the memory location pointed to by DS:2000H (D)</p> Signup and view all the answers

In real mode, if a memory segment begins at 10000, where will it end?

<p>1FFFFH (D)</p> Signup and view all the answers

If CS = 2000 and IP = 1000H, what is the physical address of the next instruction to be executed?

<p>21000H (C)</p> Signup and view all the answers

In the context of segment addressing, what should be appended with zero?

<p>Segment Register (D)</p> Signup and view all the answers

Memory locations 00390H through 00393H contain, respectively, 9A, 76, 65, and 1F; DS=0030H, SI=0090H, BP=0002H. Which MOV operation will set AX = 65?

<p>MOV AX, [SI][BP] (B)</p> Signup and view all the answers

Core2 register combinations: If DS = 1A00H and ECX = 00002000H determine what will occur, in relation to memory?

<p>Memory combination = 1C000H (C)</p> Signup and view all the answers

What descriptor describes all the following in the memory segment except?

<p>boundaries (D)</p> Signup and view all the answers

Which addressing mode directly specifies the operand value?

<p>Immediate Addressing Mode (D)</p> Signup and view all the answers

Given DS = 1000H, SS = 2000, BP = 1000, DI = 0100; what memory is addressed with MOV AL, [BP+DI]?

<p>21100H (C)</p> Signup and view all the answers

What is an intersegment jump?

<p>A jump to any memory location within the entire memory system (C)</p> Signup and view all the answers

In protected mode memory, how is protection implemented concerning memory segments?

<p>By restricting access to memory segments (C)</p> Signup and view all the answers

What are sometimes called displacements or relative?

<p>Offset Addresses (B)</p> Signup and view all the answers

If DS=B9DC, SS=F7CA, ES=AB32, AX=DC5, DI=8E9, BX=D98, BP=2CE, Var1=12A and Var2=D32; Consider the instruction MOV CX, [SI+DEE]. What will be placed into CX?

<p>Memory contents at combined memory location. (D)</p> Signup and view all the answers

When calculating A9A8B; since CX and destination 16-bit ang content where is the 16-bit content positioned?

<p>A9A8C; AB (yan yung higher content which is hinahanap kasi nga 16-bit) (C)</p> Signup and view all the answers

What is the size of the first 1Mbyte of memory?

<p>Real mode (D)</p> Signup and view all the answers

What memory could 32-bit microprocessors operating in protected mode address up to _ of memory?

<p>4GB (C)</p> Signup and view all the answers

What is the effective address of the memory location that is visibly part of the instruction?

<p>Direct Mode (C)</p> Signup and view all the answers

If CS=6900; JMP[76F3CH], located at 5E333H, what is the new value of IP?

<p>76F3 (C)</p> Signup and view all the answers

MOV AX, [BX], is an example of which addressing mode?

<p>Register indirect addressing mode (C)</p> Signup and view all the answers

If CS contains 2001H and IP contains 007CH, what linear memory location does this represent?

<p>2008 (B)</p> Signup and view all the answers

What contains the location where the next instruction in the code segment should be fetched?

<p>IP (B)</p> Signup and view all the answers

In stack memory-addressing modes, to what register is the low-order 8-bits are placed in the location addressed?

<p>SP (A)</p> Signup and view all the answers

What addressing mode transfers a byte or word between a register and a memory location addressed by an index or base register?

<p>Register Indirect Addressing Mode (B)</p> Signup and view all the answers

What addressing mode moves a byte or a word between a register and the memory location addressed by an index or base register plus a displacement

<p>Register Relative Addressing Mode (D)</p> Signup and view all the answers

What addressing mode transfers a byte or a word between a register and the memory location addressed by a base register (BP or BX) plus an index register (DI or SI)?

<p>Base-Plus-Index Addressing Mode (A)</p> Signup and view all the answers

What should be added to the starting address to get the ending address?

<p>FFFFH (A)</p> Signup and view all the answers

Flashcards

Physical Memory Address

To form a physical memory address, appropriate segment register contents are required.

Physical Address Calculation

With Base=23000000, Limit=012FFH and G=1, the physical address is 242FFFFFH.

TI bit meaning

TI = 0 indicates that TI is a global descriptor table.

DOS Operating Mode

The DOS operating system requires the microprocessor to operate in real mode.

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80286 in Protected Mode.

80286 could be operated in protected mode but only has a 24-bit address bus.

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Segment: Offset Combinations

a,c and d are valid segment: offset combinations which point to a common physical address.

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Protected Mode Access

In protected mode, a segment can be accessed if Both a and b (RPL >= DPL).

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Segment Register Use

Segment registers should only contain segment addresses.

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Effective Address calculation

0CD1:02E0 = 0CFF0H

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Segment Address Range

Starting and ending address of the segment located by the segment register value, 1000H is 10000, 1FFFF.

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Selector Value

In protected mode, a selector value gives the following segment information except Ending address.

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Memory Write Operation

If SI = 1000H, MOV[SI], BH writes byte of data from BH into memory location 1000H.

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First 1MB

The first 1 Mbyte of memory is called the Real and conventional memory system.

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Real Mode Locations

Real mode memory exists at locations 00000H - FFFFFH.

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The selector role

The selector selects the descriptor from a descriptor table.

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Protected mode locations

For the 80286 – Core processors, the protected mode of memory exists at locations 000000 - FFFFFFH.

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Offset Address Role

Offset address. It selects any location within the 64k byte memory segment.

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MOV Instruction action

instruction MOV DS:[2000H], AL copies byte size data in AX to the memory.

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Address Range

In real mode, a memory segment that begins at 10000 will end at 1FFFFH.

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Next Instruction Address

CS = 2000 and IP = 1000H = 21000H

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Ending Segment Address

The ending calculated address is D6B20+FFFF = E6B1F

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Higher content

When calculated A9A8B; since CX and destination 16-bit ang content =A9A8C; AB

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Memory access instruction

The effective address of the memory location is visibly part of the instruction Direct Mode.

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Study Notes

  • To form a physical memory address, appropriate segment register contents are required.

Key Memory Values

  • Base = 23000000, Limit = 012FFH and G = 1
  • Resulting in a value of 242FFFFFH
  • 0CD1:02E0 results in OCFFOH
  • 1000H as a segment register value correlates to addresses "10000, 1FFFF"

Operating Mode

  • The DOS operating system requires the microprocessor to operate in real mode.
  • The 80286 could be operated in protected mode but only has a 24-bit address bus.
  • In real mode, memory exists at locations 00000H - FFFFFH.
  • In real mode, a memory segment that begins at 10000 will end at 1FFFFH.
  • In protected mode, the 80286 – Core processors' memory exists at locations 000000 - FFFFFFH.

Segment Access and Addressing

  • TI = 0 indicates a global descriptor table.
  • Segment: offset address combinations point to a common physical address such as A1B2:000C, A1B0:002C, and A1B1:001C.
  • In protected mode, segment access is allowed if RPL >= DPL
  • Segment registers should only contain segment addresses.
  • A selector value in protected mode gives segment information, excluding the ending address.
  • Memory locations 00390H through 00393H contain 9A, 76, 65, and 1F.
  • With DS=0030H, SI=0090H, BP=0002H, then:
    • MOV AX, [SI] = 00390 = 9A
    • MOV AX, [SI+1] = 00391 = 76
    • MOV AX, [SI][BP] = 00392 = 65

Instructions and Registers

  • If SI = 1000H, MOV[SI], BH writes a byte of data from BH into memory location 1000H.
  • Instruction MOV DS:[2000H], AL copies byte size data in AX to the memory.
  • With CS = 2000 and IP = 1000H, the result is 21000H.
  • DS=B9DC, SS=F7CA, AX=DC5, DI=8E9, BP=2CE, SI=97D, Var1=12A, AX=3DF9 and Var2=D32; MOV [BP+DI], AX.
  • Adding BP and DI, then adding it onto SS, then adding to AX: answer is F8857H (considering bits of registers BP & DI).
  • The first 1Mbyte of memory is called the real and conventional memory system.

Selectors and Descriptors

  • The selector selects the descriptor from a descriptor table and selects any location within the 64k byte memory segment.
  • A descriptor describes all in the memory segment except boundaries.

Addressing Modes

  • Immediate Addressing Mode directly specifies the operand value.
  • Offset Address are sometimes called displacements or relative.
  • Segment Register should be appended with zero.
  • Ending address of segment located by segment register value D6B2H is D6B20+FFFF = E6B1F.
  • Ending address of segment located by segment register value E44AH is F449F.
  • The addressing mode where you directly specify the operand value is the Immediate Addressing Mode.

Jumps

  • Intersegment Jump is a jump to any memory location within the entire memory system.
  • For CS=6900; JMP[76F3CH], located at 5E333H is the new value of IP
  • After Far jump, IP = bytes 2 and 3 of the instruction with a value close to 4F3C/DF3C
  • CS = D82AH; JMP [5F] located at DF78 AB25H is a short jump (CS + (Displacement + IP) D82FF

Memory Protection

  • In protected mode, memory protection is implemented by restricting access to memory segments through privilege levels and access rights.

Memory Addressing Calculations

  • With DS = 1000H, SS = 2000, BP = 1000, DI = 0100; MOV AL, [BP+DI] results in -21100H
  • ADD instruction stores a value 1308h at offset value 9F71h, computed address 7CB3H requires (Computed address-Offset) + FFFF or 82BBFFH.
  • DS=B9DC, SS=F7CA, ES=AB32, AX=DC5, DI=8E9, BX=D98, BP=2CE, Var1=12A and Var2=D32; MOV CX, [SI+DEE]
  • When calculating A9A8B; since CX and destination 16-bit ang content, then A9A8C; AB is where the higher content which is hinahanap kasi nga 16-bit
  • Effective address of the memory location is visibly part of the Direct Mode instruction.

Indirect Addressing

  • In stack memory-addressing modes, the low-order 8-bits are placed in the location addressed by SP-2
  • The instruction tranfers a byte or word between a register and a memory location addressed by an index or base register (Register Indirect addressing mode).
  • moves a byte or a word between a register and the memory location addressed by an index or base register plus a displacement = Register Relative Addressing Mode
  • transfers a byte or a word between a register and the memory location addressed by a base register (BP or BX) plus an index register (DI or SI) = Base-Plus-Index Addressing Mode
  • should be added to the starting address to get the ending address = FFFFH
  • MOV AX, [BX], is an example ofRegister indirect addressing mode Contains the location where the next instruction in the code segment should be fetched = IP
  • TM=036H, EBP=106B C443H, ESI=A34C 6A91, EDI=8BED C437H; DS=0044H; MOV TM [EBP][EDI+ECH], SI = 9C598E5C
  • Var=B387, ECX=9612 E846, ESI=497C D1B4, EDI=4C97 B528, EBX=BEB8 4BE5H, DS=0036; MOV EBP, Var3[ECX][EDI-A981] = E2AB55455

Memory Capacity

  • 32-bit microprocessors in protected mode can address up to 4GB of memory.

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Description

Explanation of physical memory addressing using segment registers. Explores real mode (DOS) and protected mode. Includes key memory values and operating mode considerations for microprocessors like the 80286 and core processors.

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