Parallel Processing and Computer Architecture
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Questions and Answers

What is the term for a collection of lines that connects several devices?

  • Peripheral connection wires
  • Network cables
  • Bus (correct)
  • Internal wires

    • What is the composition of a complete microcomputer system?

  • Microprocessor, memory, and peripheral equipment (correct)
  • Peripheral equipment and memory
  • Microprocessor and peripheral equipment
  • Microprocessor and memory

    • What is another term for the Program Counter in a CPU?

  • Data counter
  • File pointer
  • Instruction pointer (correct)
  • Memory pointer

    • How many bits are there in a single byte?

    <p>8</p> Signup and view all the answers

    What operation is not performed by the CPU?

    <p>Data transfer</p> Signup and view all the answers

    What is the relationship between access time and CPU operation time?

    <p>Access time is longer than CPU operation time</p> Signup and view all the answers

    What type of memory addressing scheme is used in a system where memory address refers to successive memory words?

    <p>Word addressable</p> Signup and view all the answers

    What happens when a pipeline changes the order of read/write access to operands?

    <p>Data hazards occur</p> Signup and view all the answers

    Parallel processing may occur in which of the following streams?

    <p>Both in the instruction stream and data stream</p> Signup and view all the answers

    What is the primary factor that determines the cost of a parallel processing system?

    <p>Circuit Complexity</p> Signup and view all the answers

    What is the purpose of the NOP instruction?

    <p>To provide a small delay in the program</p> Signup and view all the answers

    What is a characteristic of RISC (Reduced Instruction Set Computer) instruction set?

    <p>One instruction is executed per cycle</p> Signup and view all the answers

    In a daisy-chaining priority method, devices are connected in which order?

    <p>Serial</p> Signup and view all the answers

    What is a characteristic of CISC (Complex Instruction Set Computer) instruction set?

    <p>Variable format instructions</p> Signup and view all the answers

    Where is a copy of the instructions placed during execution?

    <p>Cache</p> Signup and view all the answers

    What is a processor that performs fetch or decoding of different instructions during the execution of another instruction called?

    <p>Pipe-lining</p> Signup and view all the answers

    What is the ultimate goal of a compiler?

    <p>To reduce the clock cycles for a programming task</p> Signup and view all the answers

    What technique improves the clock rate of the processor?

    <p>All of the above</p> Signup and view all the answers

    What is the reference system used to find the performance of a system as of 2000?

    <p>Ultra SPARC 10</p> Signup and view all the answers

    What is the purpose of an optimizing compiler?

    <p>To take advantage of the type of processor and reduce its process time</p> Signup and view all the answers

    What is stored in the cache when performing a looping operation?

    <p>Instructions</p> Signup and view all the answers

    What is the average number of steps taken to execute the set of instructions made to be less than one by?

    <p>Super-scaling</p> Signup and view all the answers

    If a processor clock is rated as 1250 million cycles per second, what is its clock period?

    <p>8 * 10 ^ -10 sec</p> Signup and view all the answers

    What does SPEC stand for?

    <p>System Performance Evaluation Corporation</p> Signup and view all the answers

    Who is not credited with the development of the first computer?

    <p>Alan Turing</p> Signup and view all the answers

    What is the fastest storage unit in a typical memory hierarchy?

    <p>Register</p> Signup and view all the answers

    Which type of cache miss does not occur in a fully associative cache?

    <p>Conflict miss</p> Signup and view all the answers

    Which type of miss can occur even in an infinite cache?

    <p>Cold start miss</p> Signup and view all the answers

    What is stored in a Translation Lookaside Buffer (TLB)?

    <p>Physical addresses</p> Signup and view all the answers

    What is the speedup of a parallel program that achieves an efficiency of 75% on 32 processors?

    <p>24</p> Signup and view all the answers

    What is the pipelining strategy implemented in?

    <p>Instruction prefetch</p> Signup and view all the answers

    Which algorithm is a better choice for pipelining?

    <p>Merge-Sort Algorithm</p> Signup and view all the answers

    What is the primary function of the control unit in the CPU?

    <p>To decode program instructions</p> Signup and view all the answers

    What is a dedicated computer?

    <p>A computer assigned to one and only one task</p> Signup and view all the answers

    What is the most common addressing technique used by a CPU?

    <p>All of the above</p> Signup and view all the answers

    What is the purpose of a pipeline in a CPU?

    <p>To improve instruction fetch and decode</p> Signup and view all the answers

    Which code is used in present-day computing and was developed by IBM Corporation?

    <p>EBCDIC code</p> Signup and view all the answers

    Where is the address of the instruction following the CALL instruction stored?

    <p>On the stack</p> Signup and view all the answers

    What type of interrupt is initiated by an instruction?

    <p>Software interrupt</p> Signup and view all the answers

    Where are interrupts typically generated from?

    <p>I/O devices</p> Signup and view all the answers

    Study Notes

    Parallel Processing

    • A collection of lines that connects several devices is called a bus.
    • A complete microcomputer system consists of a microprocessor, memory, and peripheral equipment.
    • The program counter is also called an instruction pointer.

    Microprocessor and Memory

    • A single byte consists of 8 bits.
    • The CPU does not perform data transfer operations.
    • Access time of memory is longer than the time required for performing a single CPU operation.
    • Memory address refers to the successive memory words, and the machine is called a word addressable machine.

    Pipelining

    • A pipeline is similar to an automobile assembly line.
    • Data hazards occur when the pipeline changes the order of read/write access to operands.
    • Processors of all computers, whether micro, mini, or mainframe, have a control unit.

    Parallel Processing

    • Parallel processing may occur in the instruction stream and/or data stream.
    • The cost of parallel processing is primarily determined by circuit complexity.
    • An instruction to provide a small delay in a program is called a NOP (no operation) instruction.

    Instruction Set Architecture (ISA)

    • A characteristic of RISC (Reduced Instruction Set Computer) instruction set is one instruction per cycle.
    • In daisy-chaining priority method, all devices that can request an interrupt are connected in series.
    • A characteristic of CISC (Complex Instruction Set Computer) is variable format instructions.

    Cache Memory

    • A copy of instructions is placed in the cache during execution.
    • The clock rate of the processor can be improved by improving the IC technology of the logic circuits.
    • An optimizing compiler takes advantage of the type of processor and reduces its process time.

    Performance Evaluation

    • SPEC stands for System Performance Evaluation Corporation.
    • As of 2000, the reference system to find the performance of a system is Ultra SPARC 10.

    Pipeline Implementation

    • Pipeline implementation involves fetching instructions, decoding instructions, fetching operands, and executing instructions.

    Addressing Techniques

    • The most common addressing techniques employed by a CPU are immediate, direct, indirect, and register addressing.

    Interrupts

    • Interrupts which are initiated by an instruction are internal.
    • Interrupts are generated by I/O devices.

    Cache Memory Hierarchy

    • The fastest storage unit in a usual memory hierarchy is a register.
    • A cold start miss even occurs in infinite caches.

    Translation Lookaside Buffer (TLB)

    • A TLB stores physical addresses.

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    Related Documents

    parllel processing.pdf

    Description

    Test your knowledge of computer architecture and parallel processing concepts, including microcomputers, buses, and peripheral equipment. Explore the basics of microprocessors and memory.

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