Questions and Answers
What is the term for a collection of lines that connects several devices?
Bus
What is the composition of a complete microcomputer system?
Microprocessor, memory, and peripheral equipment
What is another term for the Program Counter in a CPU?
Instruction pointer
How many bits are there in a single byte?
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What operation is not performed by the CPU?
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What is the relationship between access time and CPU operation time?
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What type of memory addressing scheme is used in a system where memory address refers to successive memory words?
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What happens when a pipeline changes the order of read/write access to operands?
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Parallel processing may occur in which of the following streams?
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What is the primary factor that determines the cost of a parallel processing system?
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What is the purpose of the NOP instruction?
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What is a characteristic of RISC (Reduced Instruction Set Computer) instruction set?
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In a daisy-chaining priority method, devices are connected in which order?
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What is a characteristic of CISC (Complex Instruction Set Computer) instruction set?
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Where is a copy of the instructions placed during execution?
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What is a processor that performs fetch or decoding of different instructions during the execution of another instruction called?
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What is the ultimate goal of a compiler?
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What technique improves the clock rate of the processor?
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What is the reference system used to find the performance of a system as of 2000?
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What is the purpose of an optimizing compiler?
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What is stored in the cache when performing a looping operation?
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What is the average number of steps taken to execute the set of instructions made to be less than one by?
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If a processor clock is rated as 1250 million cycles per second, what is its clock period?
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What does SPEC stand for?
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Who is not credited with the development of the first computer?
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What is the fastest storage unit in a typical memory hierarchy?
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Which type of cache miss does not occur in a fully associative cache?
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Which type of miss can occur even in an infinite cache?
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What is stored in a Translation Lookaside Buffer (TLB)?
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What is the speedup of a parallel program that achieves an efficiency of 75% on 32 processors?
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What is the pipelining strategy implemented in?
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Which algorithm is a better choice for pipelining?
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What is the primary function of the control unit in the CPU?
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What is a dedicated computer?
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What is the most common addressing technique used by a CPU?
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What is the purpose of a pipeline in a CPU?
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Which code is used in present-day computing and was developed by IBM Corporation?
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Where is the address of the instruction following the CALL instruction stored?
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What type of interrupt is initiated by an instruction?
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Where are interrupts typically generated from?
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Study Notes
Parallel Processing
- A collection of lines that connects several devices is called a bus.
- A complete microcomputer system consists of a microprocessor, memory, and peripheral equipment.
- The program counter is also called an instruction pointer.
Microprocessor and Memory
- A single byte consists of 8 bits.
- The CPU does not perform data transfer operations.
- Access time of memory is longer than the time required for performing a single CPU operation.
- Memory address refers to the successive memory words, and the machine is called a word addressable machine.
Pipelining
- A pipeline is similar to an automobile assembly line.
- Data hazards occur when the pipeline changes the order of read/write access to operands.
- Processors of all computers, whether micro, mini, or mainframe, have a control unit.
Parallel Processing
- Parallel processing may occur in the instruction stream and/or data stream.
- The cost of parallel processing is primarily determined by circuit complexity.
- An instruction to provide a small delay in a program is called a NOP (no operation) instruction.
Instruction Set Architecture (ISA)
- A characteristic of RISC (Reduced Instruction Set Computer) instruction set is one instruction per cycle.
- In daisy-chaining priority method, all devices that can request an interrupt are connected in series.
- A characteristic of CISC (Complex Instruction Set Computer) is variable format instructions.
Cache Memory
- A copy of instructions is placed in the cache during execution.
- The clock rate of the processor can be improved by improving the IC technology of the logic circuits.
- An optimizing compiler takes advantage of the type of processor and reduces its process time.
Performance Evaluation
- SPEC stands for System Performance Evaluation Corporation.
- As of 2000, the reference system to find the performance of a system is Ultra SPARC 10.
Pipeline Implementation
- Pipeline implementation involves fetching instructions, decoding instructions, fetching operands, and executing instructions.
Addressing Techniques
- The most common addressing techniques employed by a CPU are immediate, direct, indirect, and register addressing.
Interrupts
- Interrupts which are initiated by an instruction are internal.
- Interrupts are generated by I/O devices.
Cache Memory Hierarchy
- The fastest storage unit in a usual memory hierarchy is a register.
- A cold start miss even occurs in infinite caches.
Translation Lookaside Buffer (TLB)
- A TLB stores physical addresses.
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