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Questions and Answers
Which plane is commonly used in MOS IC chip fabrication?
Which plane is commonly used in MOS IC chip fabrication?
What type of defect is characterized by an atom missing at a lattice site?
What type of defect is characterized by an atom missing at a lattice site?
Which type of defect extends in one direction through the crystal?
Which type of defect extends in one direction through the crystal?
What is a Frenkel defect composed of?
What is a Frenkel defect composed of?
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Which factor primarily allows vacancies and self-interstitials to move through the crystals?
Which factor primarily allows vacancies and self-interstitials to move through the crystals?
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What is the nature of vacancies and self-interstitials in materials?
What is the nature of vacancies and self-interstitials in materials?
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Which of the following describes an area defect?
Which of the following describes an area defect?
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What occurs when vacancies and interstitials migrate to the surface of the wafer?
What occurs when vacancies and interstitials migrate to the surface of the wafer?
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What does the vacancy concentration formula represent?
What does the vacancy concentration formula represent?
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What is the activation energy for vacancy formation in Silicon?
What is the activation energy for vacancy formation in Silicon?
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At what temperature (in °C) is the vacancy concentration in Silicon calculated in the example provided?
At what temperature (in °C) is the vacancy concentration in Silicon calculated in the example provided?
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Which type of defect is characterized by geometric faults in the crystal lattice?
Which type of defect is characterized by geometric faults in the crystal lattice?
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What is an edge dislocation?
What is an edge dislocation?
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What is the resistivity of n-type Silicon with a dopant concentration of $1 \times 10^{15}/cm^3$?
What is the resistivity of n-type Silicon with a dopant concentration of $1 \times 10^{15}/cm^3$?
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What process can lead to dislocation formation?
What process can lead to dislocation formation?
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Which type of silicon has a higher resistivity at the same dopant concentration?
Which type of silicon has a higher resistivity at the same dopant concentration?
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What is true about intrinsic carriers in a silicon lattice?
What is true about intrinsic carriers in a silicon lattice?
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Which statement best describes a stacking fault?
Which statement best describes a stacking fault?
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What characterizes single crystal silicon wafers?
What characterizes single crystal silicon wafers?
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What is the most significant characteristic of area defects in crystals?
What is the most significant characteristic of area defects in crystals?
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Which of the following describes polycrystalline materials?
Which of the following describes polycrystalline materials?
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What is the primary structural element of a crystal?
What is the primary structural element of a crystal?
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How do the properties of a wafer get affected during processing?
How do the properties of a wafer get affected during processing?
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What happens to a silicon wafer under stress?
What happens to a silicon wafer under stress?
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What is the concentration of oxygen in ppm after converting from $9.92 x 10^3 / cm^3$?
What is the concentration of oxygen in ppm after converting from $9.92 x 10^3 / cm^3$?
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What is the purpose of outdiffusion in the intrinsic gettering process?
What is the purpose of outdiffusion in the intrinsic gettering process?
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What units are used to express the width of the denuded zone (Ld) in silicon?
What units are used to express the width of the denuded zone (Ld) in silicon?
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Which parameter is NOT required to calculate the width of the denuded zone (Ld)?
Which parameter is NOT required to calculate the width of the denuded zone (Ld)?
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At what minimum concentration level must oxygen be reduced to, during the intrinsic gettering process?
At what minimum concentration level must oxygen be reduced to, during the intrinsic gettering process?
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What happens during the precipitation step of intrinsic gettering?
What happens during the precipitation step of intrinsic gettering?
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What would likely happen if the annealing temperature is too low during the gettering process?
What would likely happen if the annealing temperature is too low during the gettering process?
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How is the total time during the intrinsic gettering process usually expressed?
How is the total time during the intrinsic gettering process usually expressed?
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Which process is primarily used to produce wafers larger than 200mm?
Which process is primarily used to produce wafers larger than 200mm?
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What is the purity level of electronic grade silicon (EGS) produced from TCS?
What is the purity level of electronic grade silicon (EGS) produced from TCS?
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At what temperature does EGS melt during the Czochralski process?
At what temperature does EGS melt during the Czochralski process?
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What gas is used in the reaction to form liquid silicon hydrochloride from MGS?
What gas is used in the reaction to form liquid silicon hydrochloride from MGS?
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What is the byproduct of the reaction between metallurgic grade silicon and hydrogen chloride?
What is the byproduct of the reaction between metallurgic grade silicon and hydrogen chloride?
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What is the purpose of the seed in the Czochralski method?
What is the purpose of the seed in the Czochralski method?
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Which method is preferred for producing extremely high purity silicon?
Which method is preferred for producing extremely high purity silicon?
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What is produced at the end of the wafer manufacturing process?
What is produced at the end of the wafer manufacturing process?
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What is the distinction between homoepitaxy and heteroepitaxy?
What is the distinction between homoepitaxy and heteroepitaxy?
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What does the formula $Nov = No e^{-\frac{E_a}{kT}}$ calculate?
What does the formula $Nov = No e^{-\frac{E_a}{kT}}$ calculate?
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Which method is associated with ingot crystal growth?
Which method is associated with ingot crystal growth?
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What does the variable $Cs$ represent in the equation $Cs = kCo(1-X)k^{-1}$?
What does the variable $Cs$ represent in the equation $Cs = kCo(1-X)k^{-1}$?
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What is the significance of the variable $k$ in the context provided?
What is the significance of the variable $k$ in the context provided?
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Study Notes
Semiconductor Basics
- Semiconductors have conductivity between conductors (metals) and insulators (rubber, wood)
- Common semiconductors are silicon (Si) and Germanium (Ge)
- These are group IV elements in the periodic table, with 4 electrons in their outermost shell
- In a crystal structure of Si, each atom is covalently bonded to 4 other atoms, sharing electron pairs
- When an electron leaves an atom, it becomes a free electron, conducting current
- The "hole" left by the electron allows another electron to "jump in", creating a net flow of electrons and electric current
- Two types of current carriers exist: electrons and holes
- Higher carrier density results in higher conductivity
- Conductivity can be controlled by adding impurities (dopants), a process called doping
- Group III elements (e.g., Boron) create "holes" (p-type)
- Group V elements (e.g., Phosphorus) supply extra electrons (n-type)
- Higher dopant concentration leads to higher conductivity/lower resistivity
- Undoped Si has intrinsic carriers, while doped Si has extrinsic carriers
Crystal Structure
- Single crystal silicon wafers are most common in IC fabrication
- Process characteristics depend on crystal perfection
- Materials are classified as:
- Single crystal (monocrystalline)
- Polycrystalline
- Amorphous
- Single crystal (monocrystalline)
- Atoms occupy well-defined, regular positions
- Most semiconductor substrates are single crystal (Si wafer)
- Polycrystalline
- Collection of small single crystals (grains) randomly oriented
- Grain size and orientation may change during processing
- Amorphous
- Atoms have no long-range order
Crystal Defects
- Silicon wafers used in IC fabrication have imperfections (defects)
- Defects are classified as:
- Point defects (no directional extent)
- Line defects (extend in one direction)
- Area defects (2-D)
- Volume defects (3-D)
- Point defects include vacancies (missing atoms) and interstitials (atoms in between lattice sites)
- Frenkel defect: a vacancy-interstitial combination
- Point defects and interstitials can move in the crystal, particularly at high temperatures, or migrate to the surface
- Thermal excitation creates vacancies (and holes) and electrons
- Vacancies and interstitials are intrinsic defects
- Line defects are dislocations
- Dislocations are geometric faults in the lattice structure, creating an extra line or plane of atoms
- Can arise from uneven heating, cooling, or non-uniform film deposition
- Edge dislocations are the simplest type; extra plane terminated at crystal edge
- Dislocations can lead to the agglomeration of point defects.
- Area defects include grain boundaries in polycrystalline materials
- Stacking fault is a type of area defect, where a plane of atoms is inserted in a non-regular pattern
- Volume defects include precipitates (irregular 3D defects)
- Defects are undesirable in active regions (transistors), but can be beneficial as gettering sites, trapping impurities in inactive regions.
- Intrinsic gettering uses oxygen precipitates in Si wafers to trap impurities
- Typical oxygen concentration in Si wafers is 10 to 40 ppm
Wafer Manufacturing
- Wafer manufacturing begins with sand.
- Carbon reacts with sand to produce crude silicon (metallurgical-grade silicon) with ~99% purity
- Metallurgical-grade silicon is ground and reacted with hydrogen chloride, creating liquid silicon hydrochloride (TCS) with >99.9999% purity.
- Then reacted with hydrogen to form electronic-grade silicon (EGS) with >99.9999% purity.
- EGS is then used to produce single-crystal silicon ingots.
Wafer Preparation
- The silicon ingot undergoes pretreatment.
- Ingots are sliced into wafers.
- Wafer preparation includes the following steps
- Ingot treatment
- Slicing
- Surface grinding
- Edge rounding
- Laser marking
- Double-sided lapping
- Cleaning and etching
- Thermal donor annealing
- Chemical mechanical polishing (CMP)
- Epitaxy (only for epitaxial wafers)
Crystal Growth - CZ method
- EGS is melted in quartz crucible, slowly rotated, at very high temperatures for crystal growth
- A seed crystal is slowly lowered into molten material.
- The seed slowly withdraws, bringing some molten Si with it, which solidifies around the seed to create a single crystal ingot.
- The diameter of the ingot and pull rate are related
- Introducing dopants allows tailored resistivity in the ingots
- Impurities tend to segregate at the solid/liquid interfaces
- K is the segregation coefficient (Cs/Cl); K<1 means impurity concentration in the solid is lower than in melt
- Dopant concentration varies along the ingot length.
Crystal Growth - Float Zone method
- Very high purity silicon crystals; limitations on the ingot size
- Uses a polycrystalline silicon bar in a furnace; a heating coil melts one section while the seed section solidifies; this process repeats to form a single-crystal ingot.
- The molten silicon must able to support the weight of the entire rod.
- This method is limited to specific ingot sizes
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Description
Test your knowledge on MOS IC chip fabrication and crystalline defects. This quiz covers various concepts, including types of defects, vacancy concentrations, and dislocation mechanisms. Perfect for students studying materials science and semiconductor physics.
