MET2304 GPTM Timer Modules and Registers
45 Questions
0 Views

Choose a study mode

Play Quiz
Study Flashcards
Spaced Repetition
Chat to lesson

Podcast

Play an AI-generated podcast conversation about this lesson

Questions and Answers

What is a primary function of timers in embedded systems?

  • Task scheduling through periodic interrupts (correct)
  • Increasing memory storage
  • Enhancing graphical performance
  • Improving processor speed

    • How many 16/32-bit General-Purpose Timer Modules are available in the TM4C123G?

  • Four
  • Ten
  • Six (correct)
  • Eight

    • What base address corresponds to Timer 3A in TM4C123G?

  • 0x4003.2000
  • 0x4003.3000 (correct)
  • 0x4003.1000
  • 0x4003.4000

    • In TM4C123G, what capability do Timers A and B offer?

    <p>Independent operation as 16-bit timers</p> Signup and view all the answers

    What kind of measurements can timers in embedded systems provide?

    <p>Pulse period or width</p> Signup and view all the answers

    Which timing function is NOT typically associated with timers in embedded systems?

    <p>Data encryption</p> Signup and view all the answers

    What is the significance of the 32-bit operation mode for Timer A and Timer B?

    <p>They allow for higher resolution in timing applications</p> Signup and view all the answers

    Which component is directly related to Timer 0A on the TM4C123G?

    <p>T0CCP0</p> Signup and view all the answers

    What is the primary function of the Timer Interval Load Register when counting DOWN?

    <p>Loads the starting countdown value into the Timer.</p> Signup and view all the answers

    Which register is used to configure the timer mode for Periodic operation?

    <p>TAMR</p> Signup and view all the answers

    What value should the Count Direction bit (TnCDIR) be set to in order to configure the timer to count UP?

    <p>1</p> Signup and view all the answers

    In 32-bit mode operation, how is the Timer Interval Load Register structured?

    <p>It presents the upper 16 bits in GPTMTBILR.</p> Signup and view all the answers

    What is the reset value of the Timer Interval Load Register?

    <p>0xFFFF.FFFF</p> Signup and view all the answers

    Which bits should be modified to change the mode of the timer to Periodic mode?

    <p>TIMER0-&gt;TAMR |= 0x02;</p> Signup and view all the answers

    In which register is the upper bound for the timeout event set when the timer counts UP?

    <p>GPTMTAILR</p> Signup and view all the answers

    What happens to the Timer counter upon reset?

    <p>It has the highest count value possible.</p> Signup and view all the answers

    In Periodic Mode when counting DOWN, how does the pre-scaler function?

    <p>As a true pre-scaler containing LSB bits.</p> Signup and view all the answers

    What happens to the timer count frequency when the pre-scaler is used in Periodic Mode, counting DOWN?

    <p>The timer count slows down.</p> Signup and view all the answers

    In which scenario does the pre-scaler act as a timer extension rather than a true pre-scaler?

    <p>When the timer counts UP.</p> Signup and view all the answers

    How many bits does the pre-scaler add when functioning as a timer extension in Periodic Mode counting UP?

    <p>8 bits.</p> Signup and view all the answers

    What is the output characteristic of the pre-scaler when it is used in Input Edge Count and PWM Mode?

    <p>It functions as a timer extension regardless of count direction.</p> Signup and view all the answers

    What does the timer effectively become when the pre-scaler is active in Periodic Mode counting UP?

    <p>A concatenated 24-bit timer.</p> Signup and view all the answers

    Which of the following statements is true about the pre-scaler in a concatenated timer mode?

    <p>The pre-scaler is not used.</p> Signup and view all the answers

    What is the bit-width of the pre-scaler when in 16-bit mode for counting DOWN?

    <p>8 bits.</p> Signup and view all the answers

    What is the size of the Timer Register when it becomes a 24-bit Timer?

    <p>24 bits</p> Signup and view all the answers

    At what frequency does the counter operate if the Pre-scaler value is set to 0xFF with a system clock of 80MHz?

    <p>312,500 Hz</p> Signup and view all the answers

    In the context of the Timer Pre-scale Register, what is the purpose of the PRE-SCALER?

    <p>To extend the counting capacity of timers</p> Signup and view all the answers

    What do the TAPSR and TBPSR registers represent in the Timer operation?

    <p>GPTM Timer Prescale (8-bits)</p> Signup and view all the answers

    When counting down in Periodic Count DOWN Mode, what does the pre-scaler actually do?

    <p>Counts down to 0 before the timer starts counting down</p> Signup and view all the answers

    What is the effect of setting the maximum Preload (TAILR) value to 0xFFFF in a 16-bit Timer?

    <p>Increases the largest possible count period</p> Signup and view all the answers

    If a timer operates at a frequency of 312,500 Hz, what is the corresponding count interval?

    <p>209.7152 ms</p> Signup and view all the answers

    What is the reset value of the Timer Pre-scale Register (GPTMTAPR, GPTMTBPR)?

    <p>0x0000.0000</p> Signup and view all the answers

    What type of registers do each GPTM module contain?

    <p>Control &amp; Status Registers</p> Signup and view all the answers

    Which register is responsible for the timer control configuration?

    <p>GPTMCTL</p> Signup and view all the answers

    How many groups of registers are there for the GPTM module?

    <p>Three</p> Signup and view all the answers

    What does the GPTM Configuration Register (GPTMCFG) do?

    <p>It configures the global operation of the GPTM module</p> Signup and view all the answers

    Which of these is NOT a timer interrupt control/status register?

    <p>GPTMTAMR</p> Signup and view all the answers

    What does the prescale match register (GPTMTAPMR) do?

    <p>Reflects the prescale value used in counting</p> Signup and view all the answers

    Which base address corresponds to TIMER1?

    <p>0x40031000UL</p> Signup and view all the answers

    What kind of structure is defined for the TIMER0?

    <p>Struct</p> Signup and view all the answers

    Which register provides the current value of the timer for Timer A?

    <p>GPTMTAR</p> Signup and view all the answers

    What is the purpose of the GPTM Prescale Value Register (GPTMTAPV)?

    <p>To set the prescale factor for Timer A</p> Signup and view all the answers

    Which of the following is true regarding GPTMTAMR and GPTMTBMR?

    <p>They configure the timer mode for Timer A and Timer B respectively</p> Signup and view all the answers

    What type of access does the GPTM Timer Register (GPTMTAR) provide?

    <p>Read-only</p> Signup and view all the answers

    What is the reset value of the Configuration Register (GPTMCFG)?

    <p>0x0000.0000</p> Signup and view all the answers

    Study Notes

    GPTM Timer Modules

    • The TM4C123G microcontroller has six General Purpose Timer Modules (GPTM).
    • There are six 16/32-bit GPTMs and six 32/64-bit GPTMs.
    • In MET2304 we focus on the 16/32-bit GPTMs, namely Timer 0 to 5.
    • Each 16/32-bit GPTM contains two 16-bit timers: Timer A and Timer B.
    • They operate independently as separate timers or can work together as one 32-bit timer.

    GPTM Timer Registers

    • Each GPTM module has a set of control and status registers, some of which have A and B variants.
    • Timer registers can be grouped by:
      • Timer Control/Configuration
      • Timer Count Status
      • Timer Interrupt Control/Status
    • Key configuration registers: GPTMCFG, GPTMCTL, GPTMTAMR, GPTMTBMR, GPTMTAILR, GPTMTBILR, GPTMTAMATCHR, GPTMTBMATCHR, GPTMTAPR, GPTMTBPR
    • Key status registers: GPTMTAR, GPTMTBR, GPTMTAV, GPTMTBV, GPTMTAPV, GPTMTBPV
    • Key interrupt registers: GPTMIMR, GPTMMIS, GPTMICR

    Timer Data Structure

    • Each GPTM module has a corresponding data structure defined in the TM4C123GH6PM7.h file.
    • These data structures provide access to the registers using a specific naming convention for each timer module (e.g. TIMER0, TIMER1, etc.)

    Timer Configuration Registers

    • GPTMCFG: Configures the global operation of the GPTM module, including:
      • TACDIR & TBCDIR: Determine the count direction (up or down).
      • TAMR & TBMR: Set the timer mode (e.g. capture mode, periodic mode).
    • GPTMCTL: Controls the timer module, including:
      • GPTMCTL.TAEN & GPTMCTL.TBEN: Enable Timer A and Timer B respectively.
    • GPTMTnMR: (Tn = A or B) defines the timer operation mode and direction:
      • TnMR [1:0]: 0x2 for periodic timer mode.
      • TnCDIR: 1 for count-up, 0 for count-down.

    Timer Interval Load Register

    • GPTMTAILR & GPTMTBILR: Load the starting countdown value or upper bound for the timeout event depending on count direction.
    • In 16-bit mode, GPTMAILR is a 16-bit register, while in 32-bit mode, GPTMTAILR and GPTMTBILR work together as a 32-bit register.

    GPTM Periodic Mode

    • To configure a GPTM timer in periodic mode:
      • Clear the 2 least significant bits of the TnMR register.
      • Set the Mode bits (TnMR[1:0]) to 0x2.
    • Counting direction is defined by TnCDIR bit.
    • GPTMTAILR & GPTMTBILR register values determine count interval/period.
    • The timer counts up or down at the system clock frequency.

    GPTM Pre-scaler

    • Pre-scaler extends the count range, especially in periodic and one-shot modes.
    • In periodic mode, the pre-scaler acts as a true pre-scaler in count-down mode, forming the LSB bits.
    • In count-up mode, the pre-scaler acts as a timer extension holding the MSB bits.
    • The pre-scaler is not used in concatenated timer modes (16/32 or 32/64 bits).

    Timer Pre-scaler in Periodic Mode

    • Count DOWN: The pre-scaler counts down from the ILR value to 0 before the timer counts down by 1, effectively slowing down the timer count frequency (True Pre-scaler).
    • Count UP: The pre-scaler forms the MSB bits, extending the timer counter to 24 bits. The timer operates as a single, concatenated 24-bit counter.

    Timer Pre-scale Register

    • GPTMTAPR & GPTMTBPR: Extend the timer count range, particularly for non-concatenated 16-bit timers.
    • GPTMTAPS & GPTMTBPS: Provide a snapshot of the current prescaler value, enabling real-time observation of prescaler behavior.

    Pre-Scalar in Timer Operation

    • In periodic count-down mode, the pre-scaler acts as a true pre-scaler, slowing down the counter frequency.
    • The timer resolution and count interval are directly affected by the pre-scaler value.
    • The maximum preload value (TAILR or TBILR) determines the largest achievable count period/interval.

    Studying That Suits You

    Use AI to generate personalized quizzes and flashcards to suit your learning preferences.

    Quiz Team

    Related Documents

    FA24 05-1 TIMER (PART1-PERIODIC MODE) V2.0 PDF

    Description

    This quiz focuses on the General Purpose Timer Modules (GPTMs) available in the TM4C123G microcontroller as covered in MET2304. Learn about the structure, functionality, and operation of the 16/32-bit timers, their registers, and key configurations. Test your understanding of timer control, status, and interrupts.

    Use Quizgecko on...
    Browser
    Open
    Browser
    Browser