Computer Architecture: Register Reference Instructions Quiz and Flashcards

What is the operation code for register reference instructions?

In a memory reference instruction, what are the leftmost four bits equivalent to in hexadecimal?

For an input-output instruction, what is the leftmost four bits equivalent to in hexadecimal?

In a register reference instruction, what is done with the AC register?

What is the significance of bit 15 in determining the instruction type?

What happens if the 3-bit opcode is equal to 111 in an instruction?

What does the OUTR register hold?

Which register holds the address of the next instruction in memory?

How many bits does the OUTR register hold?

What determines which register's output is placed on the bus lines in the common bus system?

Which register holds intermediate data?

In the common bus system, what does the DR's output represent when S2S1S0 = 011?

What is the purpose of the OUTR register in the context provided?

What is the initial state of the output flag FGO?

What happens when the output flag FGO is cleared to 0?

Why does the computer not load a new character into OUTR when FGO is 0?

What role does OUTR play during the output process?

How does the OUTR register differ from the INPR register in its function?

Registers

Accumulator (AC) is also called a processor register.
Instruction Register (IR) holds a 16-bit instruction.
Temporary Register (TR) holds intermediate or temporary data.

12-bit Registers

Address Register (AR) holds an address for memory.
Program Counter (PC) holds the address of the next instruction in memory.

8-bit Registers

Input Register (INPR) holds an 8-bit character from an input device.
Output Register (OUTR) holds an 8-bit character for an output device.

Common Bus System

The outputs of seven registers and memory are connected to a common bus.
The specific output selected for the bus lines is determined by the binary value of the selection variables S2, S1, and S0.

Register Reference Instructions

Register-reference instructions are recognized by the operation code 111 with a 0 in the leftmost bit (bit 15) of the instruction.
An operand from memory is not needed; therefore, the other 12 bits are used to specify the operation or test to be executed.

Input-Output Instructions

Input-output instructions do not need a reference to memory and are recognized by the operation code 111 with a 1 in the leftmost bit of the instruction.
The remaining 12 bits are used to specify the type of input-output operation or test performed.

Input Process

The input register INPR consists of eight bits and holds alphanumeric input information.
The 1-bit input flag FGI is a control flip-flop that is set to 1 when new information is available in the input device and is cleared to 0 when the information is accepted by the computer.

Output Process

The output register OUTR works similarly to the input process, but the direction of information flow is reversed.
The output flag FGO is set to 1 initially, and the computer checks the flag bit; if it is 1, the information from AC is transferred into OUTR and FGO is cleared to 0.

Learn about memory reference instructions for ADD operation and register reference instructions in computer architecture. Understand the format and characteristics of register reference instructions, which involve operations on the AC register without the need for memory operands.