Memory Optimizations Quiz

Memory Optimizations

• Amdahl's law states that memory capacity should grow linearly with processor speed, but this has not been the case.
• Optimizations include:
  • Multiple accesses to the same row
  • Synchronous DRAM (SDRAM) with a clocked interface, burst mode, and critical word first
  • Wider interfaces
  • Double data rate (DDR)
  • Multiple banks on each DRAM device

DDR Memory

• DDR2:
  • Lower power consumption (2.5 V → 1.8 V)
  • Higher clock rates (266 MHz, 333 MHz, 400 MHz)
• DDR3:
  • 1.5 V
  • 800 MHz
• DDR4:
  • 1-1.2 V
  • 1333 MHz
• GDDR5 is a graphics memory based on DDR3
• DDR5 starts at 4800MT/s, with planned speeds up to 8800MT/s, representing a 50% increase in bandwidth over DDR4.

Dual Inline Memory Modules (DIMMs)

• DIMMs are used to organize DRAM devices into multiple banks for high bandwidth.

Reducing Power in SDRAMs

• Methods include:
  • Lower voltage
  • Low power mode (ignoring clock, only refreshing)

Graphics Memory (GDRAMs or GSDRAMs)

• Achieve 2-5 times bandwidth per DRAM compared to standard DRAM.

Random Access Memory (RAM)

SRAM

• Requires low power to retain bit
• Requires 6 transistors/bit
• No need to refresh
• Access time is close to cycle time

DRAM

• Must be re-written after being read
• Must be periodically refreshed (every ~ 8 ms)
• One transistor/bit
• Address lines are multiplexed:
  • Upper half of address: row access strobe (RAS)
  • Lower half of address: column access strobe (CAS)

Internal Organization of DRAM

• Typical 16-Mbit DRAM (4M X 4) organized in banks
• Only 4 bits are written at a time; more bits require more DRAM devices.

Memory Technology

• Performance metrics:
  • Latency (concern for cache)
  • Bandwidth (concern for multiprocessors and I/O)
  • Access time
  • Cycle time
• SRAM is used for cache due to low latency
• DRAM is used for main memory, organized in banks for high bandwidth
• PMDs use Flash memory due to modest storage needs and balance of power and performance.

Stacked/Embedded DRAMs

• Stacked DRAMs in the same package as the processor
• High Bandwidth Memory (HBM)

Flash Memory

• Type of EEPROM
• Types: NAND (denser) and NOR (faster)
• NAND Flash:
  • Reads are sequential, reading entire pages (0.5 to 4 KiB)
  • 25 us for first byte, 40 MiB/s for subsequent bytes
  • Faster than magnetic disk (300 to 500X)

NAND Flash Memory

• Must be erased (in blocks) before being overwritten
• Nonvolatile, can use as little as zero power
• Limited number of write cycles (~100,000)
• Relatively inexpensive ($2/GiB) compared to SDRAM and magnetic disk.