Intel 8086 Microprocessor Quiz
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Questions and Answers

What is the maximum size of a segment in Intel 8086?

  • 128 Kbytes
  • 64 Kbytes (correct)
  • 512 Kbytes
  • 256 Kbytes

What is the purpose of the segment register in Intel 8086?

  • To provide the starting address of a segment (correct)
  • To hold the contents of a specific memory location
  • To store the offset address of a memory location
  • To control the flow of data between the processor and memory

Which of the following is NOT an advantage of memory segmentation?

  • Increases the speed of memory access significantly (correct)
  • Permits program relocation
  • Facilitates use of separate memory areas for program, data and stack
  • Allows the memory addressing capacity to be 1 Mbyte

What is the maximum size of a memory space that can be addressed by the Intel 8086 processor?

<p>1 Mbyte (A)</p> Signup and view all the answers

What is the difference between Linear Addressing and Segmented Addressing?

<p>Linear Addressing allows access to the entire memory space in one go, while Segmented Addressing divides the memory into segments (D)</p> Signup and view all the answers

Which of the following register pairs is used to determine the 20-bit physical address for the destination in string instructions?

<p>ES and DI (D)</p> Signup and view all the answers

What is the purpose of the Stack Pointer (SP) register?

<p>To keep track of the top of the stack (D)</p> Signup and view all the answers

If the Code Segment Register (CS) holds the value 1000H and the Instruction Pointer (IP) holds the value 2000H, what is the physical address of the next instruction to be executed?

<p>12000H (C)</p> Signup and view all the answers

Which set of registers are accessible to the programmer in the 8086 microprocessor?

<p>Registers shown in the programmer's model (B)</p> Signup and view all the answers

How many bits wide are the registers in the 8086 microprocessor?

<p>16-bit (D)</p> Signup and view all the answers

What does the term '16-bit' refer to in the context of the 8086 microprocessor?

<p>The size of the ALU, internal registers, and most instructions. (C)</p> Signup and view all the answers

Which of the following is NOT a stated function of the general purpose registers in the 8086?

<p>Storing segment base addresses (D)</p> Signup and view all the answers

What is the main function of the AX register?

<p>16-bit accumulator (C)</p> Signup and view all the answers

How many memory locations can the 8086 microprocessor directly access?

<p>1,048,576 (1Mb) (D)</p> Signup and view all the answers

What is the size of a segment in the 8086 memory segmentation model?

<p>64 Kbytes (C)</p> Signup and view all the answers

What is the purpose of the multiplexed address and data bus in the 8086?

<p>To reduce the number of pins needed on the chip. (D)</p> Signup and view all the answers

What is the purpose of the Code Segment (CS) register?

<p>Holds the upper 16-bits of the starting address of the code segment (C)</p> Signup and view all the answers

Which of the following is a correct description of the 8086 clock requirement?

<p>It requires a single-phase clock with a 33% duty cycle. (B)</p> Signup and view all the answers

In the 8086, what is the role of the Bus Interface Unit (BIU)?

<p>To manage the fetching of instructions and data from memory. (D)</p> Signup and view all the answers

Which registers are used as memory pointers in the 8086?

<p>Pointers and index registers (C)</p> Signup and view all the answers

How many bits are the segment registers in the 8086?

<p>16-bit (C)</p> Signup and view all the answers

In which mode does the CPU itself issue control signals in the Intel 8086?

<p>Minimum mode. (C)</p> Signup and view all the answers

What is the primary function of the Execution Unit (EU) in the 8086 architecture?

<p>To execute instructions and perform operations. (B)</p> Signup and view all the answers

How does the 8086 handle the storage of a 16-bit word in memory?

<p>It stores the word in two consecutive memory locations. (C)</p> Signup and view all the answers

Which unit in the 8086 microprocessor is responsible for fetching instructions from memory?

<p>Bus Interface Unit (BIU) (C)</p> Signup and view all the answers

What is the primary function of the Execution Unit (EU) in the 8086 microprocessor?

<p>Decoding and executing instructions (B)</p> Signup and view all the answers

The 8086 microprocessor uses a technique called pipelining to improve performance. What does pipelining involve?

<p>Fetching the next instruction while the current one is being executed (A)</p> Signup and view all the answers

Which of the following is NOT a component of the Bus Interface Unit (BIU) in the 8086 microprocessor?

<p>Arithmetic Logic Unit (ALU) (A)</p> Signup and view all the answers

What is the width of the data bus and address bus in the 8086 microprocessor?

<p>16-bit data bus, 20-bit address bus (C)</p> Signup and view all the answers

Where are instructions held before being executed by the EU, after being fetched from memory by the BIU?

<p>Instruction queue (A)</p> Signup and view all the answers

Which component within the Execution Unit (EU) translates the instruction fetched from memory into a series of actions for the EU to perform?

<p>Instruction decoder (A)</p> Signup and view all the answers

Besides general purpose registers, segment, pointer and index registers, which other register is part of the 8086 programmer's model?

<p>Flag register (D)</p> Signup and view all the answers

Which registers are used to generate the 20-bit physical address, in association with the code and stack segments?

<p>IP, BP and SP (B)</p> Signup and view all the answers

If the result of an ALU operation is zero, which flag will be set?

<p>Zero Flag (ZF) (B)</p> Signup and view all the answers

Which flag is specifically used for single-stepping a program during debugging?

<p>Trap Flag (TF) (C)</p> Signup and view all the answers

What does the Direction Flag (DF) control?

<p>The direction of string processing (C)</p> Signup and view all the answers

Under what condition is the Carry Flag (CF) set?

<p>When there is a carry out of the most significant bit (MSB) during addition or a borrow during subtraction (D)</p> Signup and view all the answers

What is the purpose of the Auxiliary Flag (AF)?

<p>To indicate overflow out of bit 3 for BCD operations. (A)</p> Signup and view all the answers

When is the Overflow Flag (OF) set during an addition operation?

<p>When there is a carry into the MSB and no carry out, or vice-versa (B)</p> Signup and view all the answers

What happens when the Interrupt Flag (IF) is set?

<p>Specific types of interrupts are allowed to be recognized by the processor (A)</p> Signup and view all the answers

What is the range of physical addresses that the 8086 CPU can access?

<p>00000H to FFFFFH (A)</p> Signup and view all the answers

Which type of address consists of a segment value and an offset address?

<p>Logical address (A)</p> Signup and view all the answers

Given CS = 3499H and IP = 2500H, what is the logical address?

<p>3499H:2500H (B)</p> Signup and view all the answers

What is the maximum range for an offset address in 8086?

<p>0000H to FFFFH (B)</p> Signup and view all the answers

In the context of memory segmentation, which segment is used for storing instruction codes?

<p>Code Segment (B)</p> Signup and view all the answers

What does the segment override prefix allow a programmer to do?

<p>Change the default segment used in the code (B)</p> Signup and view all the answers

What is the function of segment registers like CS, DS, and SS?

<p>To provide address space for a specific memory segment (B)</p> Signup and view all the answers

If DS = 3499H and the offset = 3FB9H, what is the resulting physical address?

<p>(3499H &lt;&lt; 4) + 3FB9H (C)</p> Signup and view all the answers

Flashcards

Memory Addressing in 8086

The 8086 can access 1,048,576 memory locations, each capable of holding one byte of data.

8086 Data Bus

The 8086 can handle both 8-bit and 16-bit data transfers using its 16-bit data bus.

8086 Operating Modes

The 8086 operates in two modes: Minimum mode with internal control and Maximum mode with external bus controller.

8086 Multiprogramming

The 8086 is designed to handle multiple processes in memory simultaneously, switching between them quickly.

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Bus Interface Unit (BIU)

The 8086 has a dedicated unit called BIU responsible for memory and I/O operations.

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Execution Unit (EU)

The Execution Unit (EU) is responsible for executing instructions within the 8086.

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8086 Multiplexed Bus

The 8086 employs multiplexed address and data bus lines to reduce pin count, but this can lead to slower data transfers.

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8086 Registers

The 8086 has a set of fourteen 16-bit registers used for storing data and program counters.

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Pipelining

A technique where the processor fetches the next instruction while the current instruction is being executed, speeding up program execution.

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Instruction Queue

A collection of registers in the BIU that hold instructions fetched from memory ahead of time, allowing the EU to access instructions quickly.

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Segment Registers

A specialized group of registers in the 8086 processor responsible for storing segment addresses, which are used to locate data and instructions in memory.

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Instruction Pointer (IP)

A register in the BIU that holds the address of the next instruction to be executed.

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Arithmetic Logic Unit (ALU)

A 16-bit arithmetic and logic unit (ALU) within the EU that performs calculations and logical operations on data.

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General Purpose Registers

A set of registers in the EU that hold data used in calculations and program control.

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Flag Register

A flip-flop that indicates a specific condition during instruction execution or controls processor operations.

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Carry Flag (CF)

Indicates a carry-out from the Most Significant Bit (MSB) in addition or a borrow in subtraction.

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Parity Flag (PF)

Shows whether the result of a byte or lower byte of a word operation has an even number of ones.

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Auxiliary Flag (AF)

Indicates an overflow from bit 3 and is used for BCD operations.

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Zero Flag (ZF)

Set if the result of the ALU is zero or a register becomes zero after increment or decrement operations.

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Sign Flag (SF)

Set if the Most Significant Bit (MSB) of the result is 1.

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Overflow Flag (OF)

Indicates an overflow condition if the result is out of range, like a carry-in and no carry-out or vice-versa.

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Trap Flag (TF)

Used for single-stepping through a program for debugging. When set, a trap is executed after each instruction.

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AX Register

A 16-bit register that serves as the primary accumulator for arithmetic and logical operations. It can also access its lower 8 bits individually as the AL register.

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BX Register

A 16-bit register often used to store offset addresses, which help the CPU locate specific memory locations. It plays a key role in certain addressing modes.

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CX Register

A 16-bit register that acts as a default counter for string and loop instructions. Helps efficiently process repeating sequences of data.

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DX Register

A 16-bit register used to hold data, variables, and intermediate results. It also acts as a secondary accumulator for specific tasks.

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CS (Code Segment) Register

A 16-bit segment register that points to the current code segment, which contains the instructions being executed.

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Pointers and Index Registers

Registers (BP, SP, SI, DI) used as memory pointers. They help navigate and access specific memory locations. Unlike general purpose registers, they cannot be accessed as a low or high byte.

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Linear Addressing

A way of organizing memory where the entire memory space is accessed as a continuous block, often using a single address register.

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Segmented Addressing

A memory organization method that divides memory into segments, each with its own address space. The processor uses a segment register to access a specific segment and an offset within that segment.

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20-bit Physical Address Generation

The 8086 processor combines the content of a segment register (giving the base address) and a 16-bit offset register (specifying location within a segment) to generate a 20-bit physical address.

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Stack Pointer (SP)

A 16-bit register used to store the base address of the stack segment. It points to the top of the stack, where data is pushed and popped.

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Source Index (SI)

A register that can be used for multiple purposes, including storing a source address in memory when working with data from the data segment.

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Destination Index (DI)

A register used to determine the destination address in memory for string instructions. It's used with the Extra Segment (ES) to create a 20-bit physical address.

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What is a physical address?

The 20-bit address that is actually sent to the memory chips, enabling the 8086 to access physical memory locations.

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What is an offset address?

A 16-bit address within a 64KB segment, specifying a location within that segment.

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What is a logical address?

A combination of a segment value and an offset address, used by the 8086 to locate a specific memory location. It is a logical representation of a memory address.

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What is the function of CS and IP?

It's the combination of the segment value (CS) and the offset address (IP) that defines the location of the next instruction to be executed.

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How does the 8086 access data in memory using DS and BX/BP?

They are used for accessing data in memory. The DS register holds the segment value and the offset address (BX or BP) points to the specific data location within that segment.

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What is the stack segment (SS)?

A specialized segment used for stack operations. It defines the location of the stack in memory.

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What is the stack pointer (SP) register?

It defines the offset address within the stack segment. It points to the top of the stack.

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What is a segment override prefix?

The 8086 utilizes a segment override prefix to access a memory location using a different segment register than the default one. This gives programmers flexibility in memory management.

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Study Notes

Chapter Two: 8086 Microprocessor Architecture and Assembly Language

  • The 8086 microprocessor is a 16-bit processor.
  • 16-bit refers to the ALU, internal registers, and most instructions designed for 16-bit binary words.
  • The 8086 has a 16-bit data bus for reading and writing data to memory/ports in 16 or 8-bit chunks.
  • Its 20-bit address bus allows access to 1,048,576 (1MB) memory locations. Each location is a byte wide.
  • 16-bit words are stored in consecutive memory locations.
  • The 8086 can access 2^16 (~65,536) I/O ports.
  • It has 14 16-bit registers.

Chapter Outline

  • Features of the 8086
  • Architecture of the 8086
  • Register Organization
  • Bus Operation
  • Memory Segmentation

8086 Features

  • Multiplexed address and data bus to reduce pins, but slower data transfer.
  • Uses a single-phase clock with a 33% duty cycle for optimized internal timing. Clock rates include 5MHz for 8086, 8MHz for 8086-2, and 10MHz for 8086-1.
  • Supports bit, byte, word, and block operations.
  • Arithmetic and logic operations are possible on bits, bytes, words, and decimal numbers, including multiplication and division.
  • Can operate in minimum or maximum mode. Minimum mode uses the CPU to control signals. Maximum uses external bus controller 8288.
  • Has 6-byte instruction cache or queue.
  • Supports multiprogramming.

8086 Architecture

  • Organized as two separate processors: BIU (Bus Interface Unit) and EU (Execution Unit).
  • BIU handles all external bus operations.
  • EU fetches, decodes, and executes instructions.
  • BIU contains instruction queue for faster program execution
  • EU includes control circuitry, instruction decoder, and ALU.

Register Organization

  • Powerful set of registers.
  • Registers include: General-purpose registers, Segment registers, Pointers and index registers, and Flag register.
  • Figure 2.4 shows the register organization.
  • Programmer's model of the 8086 registers. All registers are 16-bits wide.
  • General-purpose registers: AX, BX, CX, DX used for data, variables, and temporary results.
  • General purpose registers can be used as counters, and for specific addressing modes.
  • AX is both a 16-bit and 8-bit accumulator.
  • BX is used to store offsets during addressing modes.
  • CX is a default counter for loops or strings

Segment Registers

  • The 8086 uses memory segmentation to access 1MB of memory using 16-bit registers
  • The maximum segment size is 64 KB.
  • Four 16-bit segment registers (CS, DS, SS, ES) select active segments at any given time.
  • CS (Code Segment) : Holds starting address of code segment.
  • DS (Data Segment): Data segment start address.
  • SS (Stack Segment): Stack segment start address..
  • ES (Extra Segment): Extra segment start address.

Pointers and Index Registers

  • Used as memory pointers.
  • 16-bit wide. (IP,BP,SP,SI,DI).
  • Needed to generate 20-bit physical addresses
  • IP: Instruction Pointer. Offset from code segment.
  • BP: Base Pointer. Offset from stack segment, useful in addressing modes.
  • SP: Stack Pointer. Offset from the stack segment.
  • SI: Source Index. Used as offset in data segment, often for strings.
  • DI: Destination Index. Also used for offset in data segment, often with strings

Flag Register

  • Contains 9 flags (6 are key) indicating conditions after instruction execution or controlling operations.
  • CF (Carry Flag): Overflowed bit after addition or borrow bit in subtraction.
  • PF (Parity Flag): If result in byte operation or lower word byte has even number of 1s.
  • AF (Auxiliary Carry Flag): Bit 3 overflow in BCD operations.
  • ZF (Zero Flag): Result of operation is zero.
  • SF (Sign Flag): If MSB of result is 1.
  • OF (Overflow Flag): Result is out of range.
  • TF (Trap Flag): For single stepping through a program.
  • IF (Interrupt Flag): Enable interruptions.
  • DF (Direction Flag): For string processing direction (high to low or low to high)

Memory Segmentation

  • Memory is divided into segments (64KB) for addressing.
  • Using segment registers, 20-bit physical addresses are generated from 16-bit logical addresses.
  • Offset address is associated with the pointer register or index register for a specific memory location within a segment.
  • Logical address = Segment : Offset

Generation of 20-Bit Addresses

  • The 8086 uses segment registers and offset registers to generate 20-bit physical addresses.
  • Offset registers include IP, SP, BP, SI, and DI. Instruction pointer (IP), holds the offset from the code segment. Stack pointer (SP) and Base pointer (BP) hold offsets relative to the stack segment. Source index (SI) and Destination Index (DI), hold offsets related to data segment.

Logical and Physical Addresses

  • Logical address = Segment register: Offset address
  • Physical address = (Segment value * 16)+ Offset value

Examples on Flags

  • Example 2.1 shows flag register contents after an addition.
  • Quiz 2 demonstrates flag register changes based on instruction series

Additional Topics

  • Bus operation
  • Memory Segmentation (default, alternate segments, and override prefixes)

Assignments

  • Assignment 1 contains questions involving logical, physical addressing, and calculation within different segments.

Examples

  • Examples on how to determine the physical address

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Description

Test your knowledge on the Intel 8086 microprocessor with this quiz. Covering concepts like memory segmentation, addressing modes, and register functionalities, this quiz evaluates your understanding of the architecture and capabilities of the 8086. Perfect for students and enthusiasts eager to assess their grasp of microprocessor fundamentals.

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