FET Fixed Bias Configuration

• FET biasing involves nonlinear relationships between input and output due to the squared term in Shockley's Equation.
• Nonlinear functions yield curves, unlike linear relationships.
• The nonlinear relationship between drain current (ID) and gate-source voltage (VGS) makes DC analysis complex.
• The input controlling variable for a BJT transistor is current, while for an FET it is voltage.
• Relationships applicable to DC analysis of FET amplifiers:

DC Analysis

• IG = 0 A
• ID = IS
• Applies to JFETs, depletion-type MOSFETs, and MESFETs:
  • ID = IDSS (1 - VGS/VP)^2
• Applies to enhancement-type MOSFETs and MESFETs:
  • ID = k(VGS - VT)^2
• Fixed Bias Configuration is one of the simplest biasing arrangements for n-channel JFETs.
• It can be solved directly using math or a graph.

Fixed Bias Configuration

• Includes AC levels Vi and Vo, and uses coupling capacitors (C1 and C2).
• Coupling capacitors are open circuits for DC, and short circuits for AC analysis.
• The resistor R_G ensures V_i appears at the input to the FET amplifier.
• The zero drop across R_G means it is replaced by a short-circuit equivalent for DC analysis.
• The negative terminal of the battery connected to VGS indicates opposite polarity to VGG.
• Applying Kirchhoff's voltage law: -VGG - VGS = 0, therefore VGS = -VGG.
• Since VGG is a fixed DC supply, VGS is fixed in magnitude, hence the name "fixed-bias".
• The level of drain current ID is now controlled by Shockley's equation.
• As VGS is fixed, magnitude is substituted into Shockley's equation to calculate ID.
• Choosing VGS = VP/2 results in drain current of IDSS/4.
• For analysis, three points (IDSS, VP, and the described intersection) are sufficient.
• The fixed VGS level is superimposed as a vertical line at VGS = -VGG.
• At any point on the vertical line, the level of VGS is – VGG and Ip must be determined.
• The intersection of the two curves is the common solution/operating point.
• Once the network is constructed and operating, DC levels of ID and VGS are the quiescent values.
• Drain-to-source voltage can be determined by applying Kirchhoff's voltage law: VDS = VDD - IDRD.

Single Subscript Voltages

• Single-subscript voltages refer to voltage at a point relative to ground.
• For the configuration: Vs = 0V
• Using double-subscript notation:
  • VDS = VD - VS
  • VD = VDS + VS = VDS + 0V, therefore VD = VDS
  • VGS = VG - VS
  • VG = VGS + VS = VGS + 0V, therefore VG = VGS

Self Bias Configuration

• Self-bias eliminates the need for two DC supplies.
• The controlling gate-to-source voltage is determined by the voltage across a resistor Rs.
• For DC analysis, the capacitor is an open circuit, and RG is a short circuit equivalent since IG = 0 A.
• The current through Rs is the source current ISS = ID and VRS = IDRS.
• Applying Kirchhoff’s voltage in closed loop: -VGS - VRS = 0 so VGS = -VRS thus VGS = -IDRS.
• Self Bias configuration voltage VGS is a function of the output current ID.
• Mathematical solution obtained by substituting in Shockley's equation.
• ID = IDSS[1 + (IDRS/VP)]^2, subsequently ID^2 + K1ID + K2 = 0
• To identify two points on the graph, a straight-line can be drawn between the two points.
• Applying Ip = 0 A results in VGs = -IDRS = (0 A)RS = 0 V.
• To find two points in (7.10), one point on the straight-line is defined by Ip=0 A and VGs = 0 V.
• Shockley's equation requires level of VGs or ID be chosen and the level of the other quantity determined with Eq. (7.10).
• An example is choosing I_D level equal to half saturation level, which is ID = IDSS/2.
• Thus $V_{GS}=-I_DR_S = \frac{-I_{DSS}R_S}{2}$
• Straight line is then drawn and the quiescent point is obtained at the intersection.
• Kirchhoff's voltage law will determine the level of $V_{DS}$ VR_S + V_DS + V_RD - V_DD = 0
  • Therefore $V_{DS} = V_{DD} - V_{RS} - V_{RD} = V_{DD} - I_SR_S - I_DR_D$

Voltage-Divider Bias

• Applied to BJT transistor amplifiers, and also to FET amplifiers.
• All capacitors, including bypass capacitor, are replaced by open circuit equivalents.
• The source VDD is two equivalent sources.
• A condition applies since IG = 0 A as K's current requires IR1 = IR2
• Applying Kirchhoff's voltage law gives: VG - VGS - VRS = 0, and subsequently VGS = VG - VRS.
• VGS = VG - IDRS