Digital Logic Fundamentals

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What is the output of a NOT gate when the input is 0?

Undefined
0
Inverted input
1 (correct)

An AND gate produces a high output when which of the following conditions is met?

All inputs are low
At least one input is low
All inputs are high (correct)
At least one input is high

Which gate complements the OR gate?

XOR Gate
AND Gate
NOR Gate (correct)
NAND Gate

What condition must be met for a NAND gate to produce a low output?

All inputs are high (A) Signup and view all the answers

When does the XOR gate produce a high output?

When the number of high inputs is odd (D) Signup and view all the answers

Which of the following is a characteristic of a buffer?

It passes the input directly to the output (C) Signup and view all the answers

What is the primary function of an NMOS inverter?

To produce the logical complement of its input (D) Signup and view all the answers

What characterizes the operation of the XOR gate?

Outputs high when the number of high inputs is odd (B) Signup and view all the answers

Which factor does NOT affect the propagation delay in digital circuits?

Ambient noise levels (C) Signup and view all the answers

Which statement accurately describes the operation of the XNOR gate?

Outputs high when the number of high inputs is even (A) Signup and view all the answers

What does the rising propagation delay (tPLH) specifically measure?

Time taken for the output to transition from low to high (A) Signup and view all the answers

In the context of CMOS technology, why is an NMOS inverter used in conjunction with a PMOS inverter?

To create a complete inverter with pull-up and pull-down capabilities (B) Signup and view all the answers

What effect does lower propagation delay have on the maximum operating frequency of a digital circuit?

It increases the maximum operating frequency (D) Signup and view all the answers

What is the primary function of the NMOS transistor in a CMOS inverter?

To provide a low-resistance path to ground when the input is high. (A) Signup and view all the answers

During which condition does the PMOS transistor in a CMOS inverter allow voltage to pass through to the output?

When the input is low (logic 0). (B) Signup and view all the answers

What characteristic of CMOS technology contributes to its low power consumption?

The ideal condition with no direct current flowing when transistors are off. (A) Signup and view all the answers

What role does the NMOS transistor play in the functioning of NMOS logic gates?

Provides a path to ground for pulling output low. (D) Signup and view all the answers

Which statement accurately describes the NMOS NOR gate's output behavior?

The output is LOW when all inputs are HIGH. (B) Signup and view all the answers

What distinguishes a CMOS inverter from a standard NMOS inverter?

CMOS inverters utilize complementary NMOS and PMOS transistors. (D) Signup and view all the answers

What unique feature of CMOS inverters allows them to drive large numbers of inputs?

Low output impedance and high input impedance. (B) Signup and view all the answers

What is the result of the complementary operation in a CMOS inverter?

Achieving both pull-up and pull-down functions efficiently. (A) Signup and view all the answers

How does the voltage transfer characteristic (VTC) of a CMOS inverter typically behave?

It exhibits a sharp transition between logic 0 and logic 1. (A) Signup and view all the answers

What characteristic of CMOS logic gates helps them resist noise interference?

High noise margins (C) Signup and view all the answers

When is the output of a CMOS NAND gate LOW?

When all inputs are HIGH (C) Signup and view all the answers

Which statement best describes the operation of a BJT inverter?

It outputs LOW when input is HIGH (C) Signup and view all the answers

What is a primary disadvantage of BJT inverters compared to CMOS technology?

They have higher power consumption (D) Signup and view all the answers

What type of connection do the PMOS transistors use in a CMOS NOR gate?

Series connection (B) Signup and view all the answers

How do CMOS logic gates achieve low power consumption?

By avoiding current flow in steady state (A) Signup and view all the answers

Which CMOS gate produces a HIGH output only when all inputs are HIGH?

CMOS AND Gate (B) Signup and view all the answers

What is the main function of a CMOS inverter?

To invert the logic level of a signal (C) Signup and view all the answers

Which type of logic gate has the output LOW only when all inputs are LOW?

CMOS NOR Gate (D) Signup and view all the answers

What is a key characteristic of TTL technology?

It uses bipolar junction transistors (BJTs) as the main switching elements. (B) Signup and view all the answers

Which voltage level typically represents a HIGH (logic 1) signal in TTL?

2.4V to 5V (A) Signup and view all the answers

What is the primary limitation of TTL gates regarding fan-out?

They can only drive a limited number of inputs due to current-sinking output. (A) Signup and view all the answers

How do NAND gates differ from AND gates in terms of output?

NAND gates have a LOW output only when at least one input is LOW. (D) Signup and view all the answers

What is the Boolean expression that describes the output of a two-input NAND gate?

Y = A NAND B (C) Signup and view all the answers

What is a common application of NAND gates in digital circuits?

Used in the configurations of flip-flops and registers. (A) Signup and view all the answers

What is the power consumption characteristic of TTL compared to CMOS?

TTL consumes more power than CMOS. (B) Signup and view all the answers

Which of the following statements is TRUE regarding TTL outputs?

TTL outputs have a defined current-sinking capability. (C) Signup and view all the answers

NOT Gate Function

The NOT gate produces an output that is the opposite of its input.

AND Gate Output

An AND gate produces a high output only if all inputs are high.