CPU Design and Organization

CPU Design Overview

• Covered topics include basic digital computer components, ALU design, and ALSU design.

Basic Components of a Digital Computer

• Key components of a digital computer are I/O devices, CPU, and Memory.
• The CPU contains a control unit and processor unit.
• The processor unit includes Arithmetic Logic Shift Unit (ALSU), registers, and internal buses.
• The control unit can be hardwired or microprogrammed.

Basic CPU Organization

• The Central Processing Unit (CPU) is a general-purpose instruction set processor and the control component of a digital computer.
• It interprets instruction codes from memory, performs arithmetic, logic, and control operations using data from registers, memory, or I/O interfaces
• The CPU provides a bus system for transferring instructions, data, and control information to connected modules.
• A typical CPU is divided into the processor unit and the control unit.
• A processor unit contains an Arithmetic Logic Shift Unit (ALSU), registers, and internal buses for data transfer.
• A control unit is made up of a program counter, an instruction register, and timing and control logic.
• The control logic can be implemented via hardwiring or microprogramming.
• Hardwired control units use registers, decoders, and gates to implement the logic required for executing instructions.
• Microprogrammed control units employ a control memory to store microinstructions and a sequencer to execute them.

ALU Design

• An Arithmetic Logic Unit (ALU) is a combinational circuit that performs basic arithmetic and logic operations.
• It uses selection lines to choose a specific operation.
• K selection variables can specify up to 2^k distinct operations via decoded selection lines.
• A typical 4-bit ALU block diagram includes Data input A, Data input B, Input carry, Operation select, Mode select and a Data output F
• The mode select input (S2) distinguishes between arithmetic and logic operations.
• Function select inputs (S0 and S1) select the specific arithmetic or logic operation.
• Input/output carries are relevant only during arithmetic operations.
• The input carry can double the number of arithmetic operations.
• ALU design occurs in three stages: arithmetic section, logic section, and combined arithmetic logic unit.

AU (Arithmetic Unit) Design

• The basic arithmetic circuit component is a parallel adder.
• A parallel adder is built from cascaded full-adder circuits.
• Different arithmetic operations are attained by controlling the data inputs.
• One set of parallel adder inputs can be controlled using two selection lines.
• n-bit arithmetic circuits consist of two inputs (A and B) and one output (F).
• Input carry Cin (C) goes to the carry input in the least significant position of the full-adder circuit.
• The output of the parallel adder is based on the sum: F = A + Y + C, where C is 0 or 1.

Controlling Arithmetic Operations

• Various arithmetic operations can be achieved by controlling the Y value using selection lines SO and S1.
• Specific operations when Cin = 0:
  • When S1=0 and S0=0, Y is all 0's and the result is F = A (Transfer).
  • When S1=0 and S0=1, Y is B and the result is F = A+B (add).
  • When S1=1 and S0=0, Y is B' and the result is F = A+B' (A plus the complement of B).
  • When S1=1 and S0=1, Y is all 1's and the result is F = A-1 (decrement).
• Specific operations when Cin = 1:
  • When S1=0 and S0=0, Y is all 0's and the result is F = A+1 (increment).
  • When S1=0 and S0=1, Y is B and the result is F = A+B+1.
  • When S1=1 and S0=0, Y is B' and the result is F = A+B'+1 (subtract).
  • When S1=1 and S0=1, Y is all 1's and the result is F = A (transfer).
• Inserting all 0's into the Y inputs, the output equation becomes F = A + 0 + C.
  • This will result in the equations F = A and F = A + 1
  • Second case the value is increased by 1
• Arithmetic subtraction is achieved when obtaining F = A + B' + 1 = A-B when Cin = 1, using two's complement (-B= +1).
• Inserting all 1's into the inputs of Y makes for F = A - 1 when Cin = 0; and when Cin = 1, transfer of A occurs.
• For minimal logic gates, a K-map helps simplify equations.
• Four full adder circuits make up a 4-bit arithmetic logic diagram

Design of Logic Unit (LU)

• Logic operations manipulate operands on a bit-by-bit basis.
• Four basic logic operations: AND, OR, XOR, and the complement.

Design of ALU

• The logic circuit can combine with the arithmetic circuit to produce an arithmetic logic unit (ALU).
• SO and S1 selection variables can be the same for both circuits if using a third selection variable S2 to distinguish the two.
• n-bit ALU requires repeating the circuit n times, connecting Ci+1 to the next stage's input carry C.
• The input carry to the first stage, Cin, is a selection variable for arithmetic operations.
• The ALU in the diagram supports eight arithmetic and four logic operations selected using cin.

ALU Operations

• There is a table of twelve distinct operations that an ALU can perform.

Shift Unit Design

• Block diagram of Arithmetic Logic Shift Unit.
• Variables
  • n=4. the number of bits
  • Input A
  • Input B
  • K is output
• In shift unit we use multiplexers.
• The number of multiplexers can equal the Number of bits of shift unit.
• The size of each multiplexer depends on the number of operations in the function table