Computer Organization: Lecture 1 Introduction

• Lecture 1 is an introduction to computer organization

Terminology

• A bit is a binary digit with a value of 0 or 1
• A byte is 8 bits
• A nibble is half a byte, or 4 bits
• A word is two bytes, or 16 bits
• A kilobyte is 2^10 bytes, equivalent to 1024 bytes, often abbreviated as K
• A megabyte is 2^20 bytes, approximately 1,048,576 bytes, or a little over 1 million bytes
• A gigabyte is 2^30 bytes, over 1 billion bytes
• A terabyte is 2^40 bytes, over 1 trillion bytes
• 16 megabytes of memory is equal to 16 x 2^20 = 2^4 x 2^20 = 2^24 bytes

Internal organization of computers

• Every computer can be broken down into three parts:
• CPU (central processing unit)
• Memory
• I/O (input/output) devices

CPU (The microprocessor)

• The CPU executes information stored in memory
• A program in memory instructs the CPU
• CPUs fetch instructions from memory and execute them
• All CPUs have resources to fetch and execute

Arithmetic Logic Unit (ALU)

• The ALU performs arithmetic functions and logic functions
• Arthmetic functions include add, subtract, multiply, and divide
• Logic functions include AND, OR, and NOT

Registers

• The CPU uses registers to store information temporarily
• Registers inside the CPU can be 8-bit, 16-bit, 32-bit, or even 64-bit
• More/bigger registers generally make a better, more expensive CPU

Program Counter

• Every CPU has a program counter, PC
• The PC is key for instruction sequencing in a program
• The PC holds the memory address of the next instruction CPU will fetch an execute
• After fetching, the PC increments for the next instruction
• For control flow changes, the PC updates to the target address
• The contents of the program counter are placed on the address bus
• The program counter is called IP, or the instruction pointer on the IBM PC

Control Unit

• The control unit generates the control signals within the CPU to execute an instruction
• The control unit consists of:
• Instruction register
• Instruction decoder
• Control and timing unit

Instruction register (IR)

• The IR holds the machine code of the instruction
• When the CPU executes a program, it reads each instruction and stores it in the IR

Instruction decoder

• The instruction decoder interprets the instruction fetched into the instruction register
• The instruction decoder decodes the opcode to find out what to do and how many cycles are required

Control and timing unit

• The control unit generates signals to carry out the instruction
• The control unit causes connections between blocks of the CPU to be opened or closed to direct data

System Bus

• The CPU connects to memory and I/O through strips of wire called a bus
• The bus carries information
• There are three types of buses:
• Address bus
• Data bus
• Control bus

Data Bus

• Data buses are bidirectional, as the CPU must use them to receive or send data
• Increasing bus size can provide a better pathway, but it is more expensive
• Data bus sizes vary between 8 and 64 bits
• Apple 2 used an 8-bit data bus
• Cray used a 64-bit data bus
• An 8-bit bus can send 1 byte a time
• A 16-bit bus can send 2 bytes at a time

Address Bus

• The address bus is unidirectional
• The address bus is used to send out addresses
• The more address buses, the more devices can be connected to the CPU
• The number of address buses for a CPU determines the number of locations it can communicate with
• The number of locations is equal to 2^x
• x is the number of address lines
• For example, 16 address lines can provide a total of 2^16 or 65,536 (64K) of addressable memory

Control Bus

• Consists of individual lines used to carry the control information from/to the CPU and external devices
• Read line
• Write line
• Interrupt lines
• The Read control line indicates that the CPU wants to read from the memory or IO devices
• The Write control indicates that the CPU wants to write to the memory or IO device
• The control bus can also include clock lines for timing synchronization

Device Recognition

• For a device to be recognized by the CPU, it must be assigned a unique address,
• The CPU puts the address on the address bus for the decoding circuitry to find the device
• Then the CPU uses the data bus to get data from or send data to that device
• The control buses provide read or write control signals
• The address bus and data bus determine the capability of a given CPU

Input/ Output Devices

• Used to enter/obtain data from the CPU
• IO devices are the medium through which the user and the machine communicate
• The input device sends information/data to the CPU
• The output device is the device by which the CPU sends the result or the data to the user
• Keyboards and mouses are input devices
• Monitors and printers are output devices

RAM and ROM

• Two commonly used types of memory in microcomputers, called primary memory
• RAM (random access memory)
• ROM (read-only memory)
• Disks are called secondary memory

RAM

• Stands for "random access memory"
• Sometimes called read/write memory

ROM

• Stands for "read-only memory"
• ROM contains programs and information essential to operation
• Information in ROM is fixed and permanent, cannot be changed, and is nonvolatile
• Holds information such as tables for character patterns or programs for displaying information

RAM vs ROM

• RAM is used for temporary storage of programs
• RAM data is lost when the computer is turned off, ie. RAM is volatile memory
• RAM stores temporary information like the OS and other application packages
• Programs are loaded from the hard drive into RAM to be processed by the CPU
• The CPU cannot get the information from the disk directly because the disk is too slow

Memory Organization

• Memory chips are organized into a number of locations within the IC
• Locations can hold 1, 4, 8, or 16 bits internally, depending on how the chip is designed
• The number of bits that each location can hold is always equal to the number of data pins (data bus lines) on the chip
• The number of locations within a memory IC always equals 2 to the power of the number of address pins
• The total number of bits that a memory chip can store is equal to the number of locations x the number of data bits per location
• A memory chip contains 2^x locations (x = the number of address pins or size of the address bus)
• Each location contains y bits (y = the number of data pins on the chip or size of the data bus)
• The entire memory chip size = 2^x × y bits
• For example, a memory chip has 12 address pins and 4 data pins:
• This memory chip has 2^12 = 4,096 locations (4K)
• Each location can hold 4 bits of data
• Its memory size is 4,096 x 4 bits (or 4K x 4) = 16,384 bits

Types of ROM

• Different types of read-only memory include:
• Programmable ROM (PROM)
• Erasable Programmable ROM (EPROM)
• Electrically Erasable Programmable ROM (EEPROM)
• Flash Memory

PROM (Programmable ROM) and OTP

• PROM is a user-programmable memory, where the user can burn information into it
• For every bit of the PROM, there exists a fuse
• PROM is programmed by blowing the fuses
• A PROM where the information burned is wrong must be discarded
• PROMs are one-time programmable (OTP)
• To program a PROM requires a ROM burner or ROM programmer

EPROM (Erasable Programmable ROM) and UV-EPROM

• EPROM allows for making changes to the contents of PROM
• One can program the memory chip and erase it thousands of times
• EPROM is useful during development of the prototype of a microprocessor-based project
• A widely used EPROM is called UV-EPROM, where UV stands for ultraviolet
• UV-EPROM chips have a window through which the programmer can shine ultraviolet (UV) radiation to erase its contents
• Erasing its contents can take up to 20 minutes
• EPROM is also referred to as UV-erasable EPROM or simply UV-EPROM
• To program a UV-EPROM chip:
• Its contents must be erased, by removing it from its socket and placing it in EPROM erasure equipment for 15-20 minutes
• Program (burn code or data) UV-EPROM chip, place it in the ROM burner equipment (programmer)
• Then put it back its socket

EPROM Disadvantages

• Only there is an EPROM burner; there is also separate EPROM erasure equipment
• Cannot be erased/programmed while it is in system board
• 27XX always refers to UV-EPROM chips (27128, 27256 ...)
• 27128-25 refers to UV-EPROM with a capacity of 128K bits and access time of 250 nanoseconds

EEPROM (Electrically Erasable Programmable ROM)

• EEPROM has several advantages over EPROM
• Its method of erasure is electrical and thus instant, as opposed to 20 minutes to UV-EPROM
• One can select which byte to erase
• One can program and erase the EEPROM contents while it is still in the system board
• The designer must incorporate the circuitry to program the EEPROM into the system board
• The cost per bit for EEPROM is much higher than for UV-EPROM

Flash memory EPROM

• Flash EPROM has become a popular user-programmable memory chip in the early 1990s
• The erasure of the entire contents takes less than a second, hence its name, Flash memory
• Erasure method is electrical, so it is sometimes referred to as Flash EEPROM
• The major difference between EEPROM and Flash memory is that when Flash memory's contents are erased, the entire device is erased
• Recently, many Flash memories divide the contents into blocks and the erasure is done block by block
• Flash memory has no byte erasure option

Flash Memory vs EEPROM difference

• Flash memories erases in blocks, EEPROM erases one byte at a time
• Flash's R/W speeds are faster because of block-level operations
• Flash R/W speeds are slower since each byte must be individually modified
• Flash memory is generally cheaper
• EEPROM is more expensive because of the increased precision required in manufacture
• Flash is used in program and data storage, EEPROM is for data storage
• Flash generally is up to GB in size, while EEPROM is up to KB to MB

RAM (Random Access Memory)

• RAM is called volatile memory
• RAM is also referred to as RAWM (read and write memory)
• Two main types of RAM are:
• Static RAM (SRAM)
• Dynamic RAM (DRAM)

SRAM (Static RAM)

• Storage cells in static RAM memory are made of flip-flops
• Data does not need to be refreshed
• Each cell requires at least 6 transistors to build, and holds only 1 bit of data
• The use of 4-transistor cells has given birth to a high-capacity SRAM, but its capacity is far below DRAM

DRAM (Dynamic RAM)

• Since 1970, the need for huge, inexpensive read/write has been a major preoccupation
• In 1970, Intel Corporation introduced the first dynamic RAM
• Density (capacity) was 1024 bits and capacitor was used to store it
• Each data store cuts down the number of transistors needed to build the cell
• DRAM requires constant refreshing due to leakage
• SRAM individual cells are made of flip-flops
• Each flip-flop requires six transistors
• Since 1970, the capacity of DRAM has exploded
• After the 1 Kbit (1024) chip came the 4Kbit in 1973, and then the 16K chip in 1976
• The 1980s saw the introduction of 64K, 256K, and finally 1M and 4M memory chips
• The 1990s saw 16M, 64M, 256M, and the beginning of 1 G-bit DRAM chips
• In the 2000s, 2G-bit chips are standard

DRAM Advantages

• High density (capacity)
• Cheaper cost per bit
• Lower power consumption per bit

DRAM Disadvantages

• Must be refreshed periodically because capacitor cell loses its charge
• Data cannot be accessed while DRAM is being refreshed

Memory address decoding

• Memory chips have one or more pins called CS (chip select)
• This must be activated for a memory's contents to be accessed
• The CS pin with RD/WR along allows the flow of data in or out of the memory chip
• The chip select is also referred to as chip enable (CE)
• Take these points when connecting:
• The data bus of the CPU is connected directly to the data pins of the memory chip
• Control signals RD (read) and WR (memory write) from the CPU are connected to OE (output enable) and WE (write enable) pins of the memory chip, respectively
• The CPU provides the address of the data desired
• The lower bits of the addresses from the CPU go directly to the memory chip address pins, the upper ones are used to activate the CS pin using decoder

Pipelining

• In early microprocessors, the CPU could either fetch or execute at a given time
• CPU had to fetch an instruction, execute it; then fetch the next instruction, and execute it, and so on
• Pipelining simplifies this to allow the CPU to fetch and execute at the same time.
• An instruction fetches while the previous instruction executes

Von Neumann and Harvard architectures

• Basic models on which computer systems are based
• Significant difference is how the CPU is separated from memory
• In both these architectures, memory is accessed by two different ways

Von Neumann architecture

• Als known as Princeton architecture, and was proposed by John Von Neumann in 1945
• Data and programs are stored on the same memory block
• The computer architecture uses a single memory unit within which both data and instructions get stored

Harvard architecture

• Data and instructions do not share the same memory i.e., are present in different memory blocks.
• CPU operates in a similar manner as in Von Neumann architecture
• Separate buses are used for data transferring and instruction fetching, resulting in faster execution
• separate memories for both data and instructions helps in the minimisation of execution time
• The central processing unit must be more efficient to handle buses and simultaneous transfer

Von Neumann vs Harvard key differences

• Von Neumann uses a single memory for both data and instructions, while Harvard uses seperate memory units
• Von Neumann architecture has lower hardware requirements, while Harvard architecture needs more hardware
• Von Neumann architecture uses a common bus for data and instructions, Harvard uses seperate sets of buses
• Harvard architecture allows simultaneous data transfer and instruction fetching, while Von Neumann uses a single bus for both
• Harvard architecture's speed is faster
• Harvard architecture is more expensive, slower, but uses space more efficiently

Computer Organization: CISC and RISC architectures

• Two instruction set architectures:
• Complex Instruction Set Computer (CISC)
• Reduced Instruction Set Computer (RISC)

Reduced Instruction Set Computer (RISC)

• This type of microprocessor architecture uses a small set of instructions of uniform length
• Designed to make hardware simpler by using an instruction set composed of a few basic steps for loading, evaluating, and storing operations
• Reduce the cycles per instruction at the cost of the number of instructions per program
• Example of RISC: AVR microcontroller family

Complex Instruction Set Computer (CISC)

• This type of microprocessor architecture offers hundreds of instructions of variable sizes
• One instruction will do all loading, evaluating, and storing operations
• Minimize the number of instructions per program
• Increase in the number of cycles per instruction
• Example of CISC: Intel x86 CPUs

Main characteristic of RISC:

• Simpler instruction, hence simple instruction decoding
• Code size is large, so the program written for RISC needs to take more space in
• Memory
• Fixed sized instructions. Instruction comes undersize of one word
• Execution time is very short
• More general purpose registers
• Transistors are used for more registers
• Simple addressing modes
• Can perform only register to register operations

Main characteristic of CISC:

• Complex instruction, hence complex instruction decoding
• Code size is small, so takes up less space
• Variable sized instructions
• Larger instruction word size
• Execution time is longer
• Less number of general purpose registers
• Transistors are used for storing complex instructions
• Complex addressing modes
• Can perform register to register or register to memory operations

Microcontroller vs Microprocessor

• Both are single-chip integrated circuits that execute computing logic, and both types of processors are found inside millions of electronic devices
• Microcontrollers are self-contained, while Microprocessors wired connections

Microcontroller includes

• self-contained of
• CPU
• Memory
• Interrupt controls
• Timers
• Serial ports
• Bus controls
• I/O peripheral ports
• ADC and any necessary components all present on the same chip
• No external circuits are required
• Designed to run a single dedicated application
• Based on the Harvard architecture
• Less complexity, less computing power, and require less memory
• Lower cost
• Ideal for embedded systems
• Low power consumption
• Run at much lower clocking speeds of 200 MHz or less
• Ex: AVR Microcontroller

Microprocessor contains

• CPU
• wired connections to other supporting external chips components such as
• Memory
• Serial interface
• I/O peripheral ports
• Timers
• ADC components
• Using external peripherals upgrades components
• Designed to perform a variety of computational tasks
• General computing applications
• Based on the Von Neumann architecture
• More complex to perform a variety of computational tasks, more powerful
• Requires more external memory
• Higher cost
• Used in personal computers
• Much more power consumption
• Can run at a very high speed (up to 4 GHz)
• Ex: 8086 Microprocessor