Computer Organization and Architecture Chapter 1

Computer Organization and Architecture

Introduction to Computer Organization and Architecture

• Computer Architecture refers to the attributes of a system that have a direct impact on the logical execution of a program. • Examples: instruction set, number of bits used to represent various data types, I/O mechanisms, and memory addressing techniques.
• Computer Organization refers to the operational units and their interconnections that realize the architectural specifications. • Examples: control signals, interfaces between computer and peripherals, and the memory technology being used.
• The distinction between computer architecture and organization can be seen in the example of a multiply instruction: • The availability of a multiply instruction is a computer architecture issue. • The implementation of the multiply instruction is a computer organization issue.

Structure and Function

• Structure refers to the way in which components relate to each other.
• Function refers to the operation of individual components as part of the structure.
• All computer functions can be categorized into four main categories: • Data processing • Data storage • Data movement • Control

Functional View of a Computer

• A computer can be viewed as a functional system consisting of four main components: • Central Processing Unit (CPU) • Main Memory • I/O • System Interconnections

Designing for Performance

• Microprocessor speed has increased significantly over the years.
• Techniques to improve performance: • Pipelining • On-board cache and cache hierarchy • Branch prediction • Data flow analysis • Speculative execution
• Performance mismatch between processor speed and memory access speed.

Computer Components

• The Control Unit (CU) and the Arithmetic and Logic Unit (ALU) constitute the Central Processing Unit (CPU).
• The CPU, main memory, I/O, and system interconnections are the four main components of a computer.

Computer Function

• The basic function performed by a computer is the execution of a program, which consists of a set of instructions stored in memory.
• The two main steps of the instruction cycle: • Fetch • Execute

Interrupts

• Interrupts are a mechanism by which other modules (e.g. I/O) may interrupt the normal sequence of processing.
• Types of interrupts: • Program interrupt • Timer interrupt • I/O interrupt • Hardware failure interrupt

Interconnection Structures

• The interconnection structure refers to the collection of paths connecting the various modules.
• Different types of connections are used for different units: • Memory • Input/Output • CPU

Bus Interconnection

• A bus is a communication pathway connecting two or more devices.
• Buses can be single or multiple, and can be grouped into channels.
• Bus interconnection schemes: • Single bus structure • Multiple bus structure
• Bus types: • Dedicated bus • Multiplexed bus
• Bus arbitration: • Centralized arbitration • Distributed arbitration### Computer Organization and Architecture

Introduction to CPU

• The Central Processing Unit (CPU) is the part of the computer that performs the bulk of data processing operations.
• The CPU is divided into two parts: the processor unit and the control unit.
• The processor unit consists of an arithmetic unit, a logic unit, a number of registers, and internal buses that provide a data path for transfer of information between registers and the arithmetic logic unit.

Processor Unit

• The processor unit performs arithmetic and logical operations on data.
• The block diagram of the processor unit shows two sets of multiplexers that select registers for input data, a decoder that selects the destination register, and an arithmetic logic unit (ALU) operation selector that determines the particular operation to be performed.
• An example of the operation of the processor unit is the execution of the instruction R3 = R1 + R2.

Control Unit

• The control unit is the heart of the CPU and consists of a program counter, instruction register, timing and control logic, and control memory.
• The control unit decides what the instructions mean and directs the necessary data to be moved from memory to the ALU.
• The control unit communicates with both the ALU and main memory and coordinates all activities of the processor unit, peripheral devices, and storage devices.

CPU Structure and Function

• The CPU must perform the following tasks: fetch instructions, interpret instructions, fetch data, process data, and write data.
• The CPU uses a small amount of internal memory, called registers, to fulfill these requirements.
• The CPU consists of an arithmetic and logic unit (ALU) that performs the actual computation or processing of data, and a control unit that controls the movement of data and instructions into and out of the CPU.

Register Organization

• Registers are at the top of the memory hierarchy and serve two functions: user-visible registers and control and status registers.
• User-visible registers enable the machine- or assembly-language programmer to minimize main-memory references by optimizing use of registers.
• Control and status registers are used by the control unit to control the operation of the CPU and by privileged OS programs to control the execution of programs.

Instruction Cycle

• The basic instruction cycle consists of fetch, execute, and interrupt sub-cycles.
• The fetch cycle reads the next instruction from memory into the CPU.
• The execute cycle interprets the opcode and performs the indicated operation.
• The interrupt cycle saves the current process state and services the interrupt.

Data Flow

• Data flow in the CPU depends on the CPU design and the sequence of events.
• The fetch cycle data flow involves moving the program counter to the memory address register, reading the memory, and moving the result to the memory buffer register and then to the instruction register.
• The indirect cycle data flow involves decoding the instruction, transferring the memory reference to the memory address register, reading the memory, and moving the result to the memory buffer register and then to the instruction register.
• The execute cycle data flow involves transferring data among registers, reading or writing from memory or I/O, and invoking the ALU.
• The interrupt cycle data flow involves saving the current contents of the program counter, loading the interrupt routine address, and loading the memory with the saved program counter.

Arithmetic and Logic Unit (ALU)

• The ALU is the combinational circuit that performs arithmetic and logical operations on data.
• The ALU is interconnected with the rest of the processor, and data are presented to the ALU in registers.
• The ALU may also set flags as the result of an operation, and the flag values are stored in registers within the processor.
• The design of the ALU has three stages: design of the arithmetic section, design of the logical section, and design of the control unit.### Logic Unit
• A logic unit is a digital circuit that performs logical operations such as AND, OR, XOR, and NOT.
• The functional table for a logic unit is as follows:
  • S1 S0: output
  • 0 0: Ai && Bi (AND)
  • 0 1: Ai || Bi (OR)
  • 1 0: Ai XOR Bi (XOR)
  • 1 1: Ai' (NOT)

Arithmetic Logic Unit (ALU)

• An ALU is a digital circuit that performs both arithmetic and logical operations.
• The block diagram of an ALU shows a combined circuit of an ALU where n data inputs from A are combined with n data inputs from B to generate the result of an operation at the G output line.
• The ALU has a number of selection lines used to determine the operation to be performed.
• The mode select S2 differentiates between arithmetic and logical operations.
• The two functions select S1 and S0 specify the particular arithmetic and logical operations to be performed.
• With three selection lines, it is possible to specify arithmetic operation with S2 at 0 and logical operation with S2 at 1.

Instruction Formats

• An instruction format is a group of bits that define various processor operations such as add, subtract, complement, shift, etc.
• The operation code field (Opcode) of an instruction is a group of bits that define various processor operations.
• The bits that define the mode field of an instruction code specify a variety of alternatives for choosing the operands from the given address.
• The types of instruction formats are:
  • Single accumulator organization: uses one address field and the instruction format is simple.
  • General register organization: uses three register address fields and the instruction format is complex.
  • Stack organization: the instruction consists of an operation code with no address field.

Addressing Modes

• Addressing modes specify a rule for interpreting or modifying the address field of the instruction before the operand is actually referenced.
• The addressing modes are:
  • Implied Addressing Mode: the operand is specified implicitly in the definition of the instruction.
  • Immediate Addressing Mode: the operand is specified in the instruction itself.
  • Register Addressing Mode: the operands are in registers that reside within the CPU.
  • Register Indirect Addressing Mode: the instruction specifies a register in the CPU whose contents give the address of the operand in memory.
  • Auto-increment or Auto-decrement Addressing Mode: the register is incremented or decremented after its value is used to access memory.
  • Direct Addressing Mode: the effective address is equal to the address part of the instruction.
  • Indirect Addressing Mode: the address field of the instruction gives the address where the effective address is stored in memory.
  • Displacement Addressing Mode: combines the capabilities of direct addressing and register indirect addressing.
  • Relative Addressing Mode: the address field of the instruction is added to the content of a specific register in the CPU to obtain the effective address.

Instruction Formats and Addressing Modes

• The number of address fields in an instruction format depends on the internal organization of the computer's registers.
• Computers may have instructions of several different lengths containing varying numbers of addresses.
• The types of instructions are:
  • Three-address instruction: specifies two operand locations and a result location.
  • Two-address instruction: specifies one operand location and a result location.
  • One-address instruction: the accumulator contains one of the operands and is used to store the result.
  • Zero-address instruction: does not use an address field for the instruction, like ADD, SUB, MUL, DIV, etc.